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The AS3722_GPIO_INV bit will always be blindly overwritten by
as3722_pinctrl_gpio_set_direction() and will be ignored when
setting the value of the GPIO in as3722_gpio_set() since the
enable_gpio_invert flag is never set. This will cause an
initially inverted GPIO to toggle when requested as an output,
which could be problematic if, for example, the GPIO controls
a critical regulator.
Instead of setting up the enable_gpio_invert flag, just leave
the invert bit alone and check it before setting the GPIO value.
Cc: <stable@vger.kernel.org> # v3.14+
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull bulk pin control changes from Linus Walleij:
"This has been queued and tested for a while. Lots of action here,
like in the GPIO tree, embedded stuff like this is really hot now it
seems. Details in the signed tag. I'm especially happy about the
Qualcomm driver as it is used in such a huge subset of mobile handsets
out there, and these platforms in general need better upstream support
- New driver for the Qualcomm TLMM pin controller and its msm8x74
subdriver.
- New driver for the Broadcom Capri BCM281xx SoC.
- New subdriver for the imx25 pin controller.
- New subdriver for the Tegra124 pin controller.
- Lock GPIO lines as IRQs for select combined pin control and GPIO
drivers for baytrail and sirf.
- Some semi-big refactorings and extenstions to the sirf driver.
- Lots of patching, cleanup and fixing in the Renesas "PFC" driver
and associated subdrivers as usual. It is settling down a little
bit now it seems.
- Minor fixes and incremental updates here and there as usual"
* tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
pinctrl: sunxi: Honor GPIO output initial vaules
pinctrl: capri: add dependency on OF
ARM: bcm11351: Enable pinctrl for Broadcom Capri SoCs
ARM: pinctrl: Add Broadcom Capri pinctrl driver
pinctrl: Add pinctrl binding for Broadcom Capri SoCs
pinctrl: Add void * to pinctrl_pin_desc
pinctrl: st: Fix a typo in probe
pinctrl: Fix some typos and grammar issues in the documentation
pinctrl: sirf: lock IRQs when starting them
pinctrl: sirf: put gpio interrupt pin into input status automatically
pinctrl: sirf: use only one irq_domain for the whole device node
pinctrl: single: fix infinite loop caused by bad mask
pinctrl: single: fix pcs_disable with bits_per_mux
pinctrl: single: fix DT bindings documentation
pinctrl: as3722: Set pin to output mode for some function
pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync
pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6
pinctrl: sunxi: Add Allwinner A20 clock output pin functions
pinctrl/lantiq: fix typo
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If pins are used for function output like pwm, clk32k,
power good etc then set it as output mode default.
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This switches the two members of struct gpio_chip that were
defined as unsigned foo:1 to bool, because that is indeed what
they are. Switch all users in the gpio and pinctrl subsystems
to assign these values with true/false instead of 0/1. The
users outside these subsystems will survive since true/false
is 1/0, atleast we set some kind of more strict typing example.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The AS3722 is a compact system PMU suitable for mobile phones, tablets etc.
Add a driver to support accessing the GPIO, pinmux and pin configuration
of 8 GPIO pins found on the ams AS3722 through pin control driver and
gpiolib.
The driver will register itself as the pincontrol driver and gpio driver.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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