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* pinctrl: st: remove gpiochip in failure casesPramod Gurav2014-09-231-0/+1
| | | | | | | | | | | | This patch releases gpiochip related resources by calling gpiochip_remove when gpiochip_irqchip_add fails. Cc: Maxime Coquelin <maxime.coquelin@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: clean up after enable refactoringLinus Walleij2014-09-041-3/+3
| | | | | | | | | | | | | | | | | commit 2243a87d90b42eb38bc281957df3e57c712b5e56 "pinctrl: avoid duplicated calling enable_pinmux_setting for a pin" removed the .disable callback from the struct pinmux_ops, making the .enable() callback the only remaining callback. However .enable() is a bad name as it seems to imply that a muxing can also be disabled. Rename the callback to .set_mux() and also take this opportunity to clean out any remaining mentions of .disable() from the documentation. Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Fan Wu <fwu@marvell.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'pinctrl-v3.17-1' of ↵Linus Torvalds2014-08-081-11/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl updates from Linus Walleij: "This is the bulk pin control changes for the v3.17 merge development cycle: - get rid of the .disable() callback from the driver callback vtable. This callback was abused and counterintuitive since a pin or group of pins can be said to always be in some setting, and never really disabled. We now only enable a certain muxing, and move between some certain muxings, we never "disable" a mux setting - some janitorial moving the MSM, Samsung and Nomadik and drivers to their own subdirectories for a clearer view in the subsystem. This will continue - kill off the use of the return value from gpiochip_remove(), this will be done in parallel in the GPIO subsystem and hopefully not trigger too many unchecked return value warnings before we get rid of this altogether - a huge set of changes and improvements to the Allwinner sunxi drivers especially for their latest A23 and A31 SoCs, and some ground work for the new sun8i platform family - a large set of Rockchip driver improvements adding support for the RK3288 SoC - advances in migration of older Freescale platforms to pin control, especially i.MX1 - Samsung and Exynos improvements - support for the Qualcomm MSM8960 SoC - use the gpiolib irqchip helpers for the ST SPEAr and Intel Baytrail drivers - a bunch of nice janitorial work done with cppcheck" * tag 'pinctrl-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (61 commits) pinctrl: baytrail: Convert to use gpiolib irqchip pinctrl: sunxi: number gpio ranges starting from 0 pinctrl: sunxi: use gpiolib API to mark a GPIO used as an IRQ pinctrl: rockchip: add drive-strength control for rk3288 pinctrl: rockchip: add separate type for rk3288 pinctrl: rockchip: set is_generic in pinconf_ops pinctrl: msm: drop negativity check on unsigned value pinctrl: remove all usage of gpio_remove ret val in driver/pinctl pinctrl: qcom: Make muxing of gpio function explicit pinctrl: nomadik: move all Nomadik drivers to subdir pinctrl: samsung: Group all drivers in a sub-dir sh-pfc: sh73a0: Introduce the use of devm_regulator_register sh-pfc: Add renesas,pfc-r8a7791 to binding documentation pinctrl: msm: move all qualcomm drivers to subdir pinctrl: msm: Add msm8960 definitions pinctrl: samsung: Allow pin value to be initialized using pinfunc pinctrl: samsung: Allow grouping multiple pinmux/pinconf nodes pinctrl: exynos: Consolidate irq_chips of GPIO and WKUP EINTs pinctrl: samsung: Handle GPIO request and free using pinctrl helpers pinctrl: samsung: Decouple direction setting from pinctrl ...
| * pinctrl: pinctrl-st.c: Cleaning up values that are never usedRickard Strandqvist2014-07-111-4/+2
| | | | | | | | | | | | | | | | | | | | Remove variable that are never used This was found using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: pinctrl-st.c: Cleaning up if unsigned is less than zeroRickard Strandqvist2014-07-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | Remove checking if a unsigned is less than zero This was found using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: st: add IRQCHIP_SKIP_SET_WAKE flagDavid PARIS2014-07-111-0/+1
| | | | | | | | | | | | | | | | | | no .irq_set_wake API is available for pinctrl-st driver. Add the IRQCHIP_SKIP_SET_WAKE flag to inform irq handler not to call this API. Signed-off-by: David Paris <david.paris@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: avoid duplicated calling enable_pinmux_setting for a pinFan Wu2014-07-111-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | What the patch does: 1. Call pinmux_disable_setting ahead of pinmux_enable_setting each time pinctrl_select_state is called 2. Remove the HW disable operation in pinmux_disable_setting function. 3. Remove the disable ops in struct pinmux_ops 4. Remove all the disable ops users in current code base. Notes: 1. Great thanks for the suggestion from Linus, Tony Lindgren and Stephen Warren and Everyone that shared comments on this patch. 2. The patch also includes comment fixes from Stephen Warren. The reason why we do this: 1. To avoid duplicated calling of the enable_setting operation without disabling operation inbetween which will let the pin descriptor desc->mux_usecount increase monotonously. 2. The HW pin disable operation is not useful for any of the existing platforms. And this can be used to avoid the HW glitch after using the item #1 modification. In the following case, the issue can be reproduced: 1. There is a driver that need to switch pin state dynamically, e.g. between "sleep" and "default" state 2. The pin setting configuration in a DTS node may be like this: component a { pinctrl-names = "default", "sleep"; pinctrl-0 = <&a_grp_setting &c_grp_setting>; pinctrl-1 = <&b_grp_setting &c_grp_setting>; } The "c_grp_setting" config node is totally identical, maybe like following one: c_grp_setting: c_grp_setting { pinctrl-single,pins = <GPIO48 AF6>; } 3. When switching the pin state in the following official pinctrl sequence: pin = pinctrl_get(); state = pinctrl_lookup_state(wanted_state); pinctrl_select_state(state); pinctrl_put(); Test Result: 1. The switch is completed as expected, that is: the device's pin configuration is changed according to the description in the "wanted_state" group setting 2. The "desc->mux_usecount" of the corresponding pins in "c_group" is increased without being decreased, because the "desc" is for each physical pin while the setting is for each setting node in the DTS. Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead of enabling "c_grp_setting" in pinctrl-1, the desc->mux_usecount will keep increasing without any chance to be decreased. According to the comments in the original code, only the setting, in old state but not in new state, will be "disabled" (calling pinmux_disable_setting), which is correct logic but not intact. We still need consider case that the setting is in both old state and new state. We can do this in the following two ways: 1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin setting" repeatedly 2. "Disable"(calling pinmux_disable_setting) the "same pin setting", actually two setting instances, ahead of enabling them. Analysis: 1. The solution #2 is better because it can avoid too much iteration. 2. If we disable all of the settings in the old state and one of the setting(s) exist in the new state, the pins mux function change may happen when some SoC vendors defined the "pinctrl-single,function-off" in their DTS file. old_setting => disabled_setting => new_setting. 3. In the pinmux framework, when a pin state is switched, the setting in the old state should be marked as "disabled". Conclusion: 1. To Remove the HW disabling operation to above the glitch mentioned above. 2. Handle the issue mentioned above by disabling all of the settings in old state and then enable the all of the settings in new state. Signed-off-by: Fan Wu <fwu@marvell.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: st: Fix irqmux handlerMaxime COQUELIN2014-07-151-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | st_gpio_irqmux_handler() reads the status register to find out which banks inside the controller have pending IRQs. For each banks having pending IRQs, it calls the corresponding handler. Problem is that current code restricts the number of possible banks inside the controller to ST_GPIO_PINS_PER_BANK. This define represents the number of pins inside a bank, so it shouldn't be used here. On STiH407, PIO_FRONT0 controller has 10 banks, so IRQs pending in the two last banks (PIO18 & PIO19) aren't handled. This patch replace ST_GPIO_PINS_PER_BANK by the number of banks inside the controller. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: <stable@vger.kernel.org> #v3.15+ Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Use ARRAY_SIZE for STiH415 dataMaxime COQUELIN2014-04-221-2/+2
| | | | | | | | This patch completes the one that used ARRAY_SIZE for STiH407 and STiH416 for setting ninput_delays and noutput_delays fields. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Use const qualifier when requiredMaxime COQUELIN2014-04-221-12/+12
| | | | | | | | This patch adds const qualifier where applicable. Reported-by: Joe Perches <joe@perches.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: use gpiolib irqchip helpersLinus Walleij2014-04-221-81/+19
| | | | | | | | | | | | | | | | | | | | | | | | This lets the gpiolib core handle the irqchip set-up and chained IRQ on the primary (behind the mux) IRQ chip in the st pinctrl driver. Default irq type is set to level low at irqchip add time. The v1 was sent by Linus (https://lkml.org/lkml/2014/4/4/287). Two changes were necessary to make it to work properly on STiH416: 1 - dev reference was not passed to the gpio_chip struct, causing a panic. 2 - gpiochip_irqchip_add passed IRQ_TYPE_NONE as default type, which caused lot of warnings at init time. I choose IRQ_TYPE_LEVEL_LOW as default. Cc: Srinivas Kandagatla <srinivas.kandagatla@gmail.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maxime COQUELIN <maxime.coquelin@st.com>
* pinctrl: st: switch IRQ locking to resource callbacksLinus Walleij2014-04-221-9/+7
| | | | | | | | | | In the mass-conversion to the new irqchip callbacks, this in-transit IRQ support was missed. Fix it. Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com> Cc: Maxime COQUELIN <maxime.coquelin@st.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Fix error check for of_irq_to_resource usageSrinivas Kandagatla2014-03-121-1/+1
| | | | | | | | | | | | This patch fixes an error check while using of_irq_to_resource. of_irq_to_resource returns non-zero interrupt number on success and zero on error. The driver was using error check is wrong way. Without this patch the driver will configure interrupt zero if there is no interrupt specified in the node. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Use ARRAY_SIZE instead of raw value for number of delaysMaxime COQUELIN2014-03-121-2/+2
| | | | | | | | | | This patch replaces the raw values with ARRAY_SIZE for assigning the ninput_delays and noutput_delays fields of STiH416's st_pctl_data struct. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: add pinctrl support for the STiH407 SoCGiuseppe Cavallaro2014-03-121-0/+17
| | | | | | | | | | | This patch adds the initial support for pinctrl based on H407 SoC. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Enhance the controller to manage unavailable registersGiuseppe Cavallaro2014-03-121-43/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new logic inside the st pinctrl to manage an unsupported scenario: some sysconfig are not available! This is the case of STiH407 where, although documented, the following registers from SYSCFG_FLASH have been removed from the SoC. SYSTEM_CONFIG3040 Output Enable pad control for all PIO Alternate Functions and SYSTEM_ CONFIG3050 Pull Up pad control for all PIO Alternate Functions Without managing this condition an imprecise external abort will be detect. To do this the patch also reviews the st_parse_syscfgs and other routines to manipulate the registers only if actually available. In any case, for example the st_parse_syscfgs detected an error condition but no action was made in the st_pctl_probe_dt. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Add software edge trigger interrupt supportSrinivas Kandagatla2014-02-101-2/+114
| | | | | | | | | | | | ST pin controller does not have hardware support for detecting edge triggered interrupts, It only has level triggering support. This patch attempts to fake up edge triggers from hw level trigger support in software. With this facility now the gpios can be easily used for keypads, otherwise it would be difficult for drivers like keypads to work with level trigger interrupts. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Add Interrupt supportSrinivas Kandagatla2014-02-101-2/+223
| | | | | | | | | | | | | | | | | | | | | | | | This patch add interrupt support to the pincontroller driver. ST Pincontroller GPIO bank can have one of the two possible types of interrupt-wirings. First type is via irqmux, single interrupt is used by multiple gpio banks. This reduces number of overall interrupts numbers required. All these banks belong to a single pincontroller. _________ | |----> [gpio-bank (n) ] | |----> [gpio-bank (n + 1)] [irqN]-- | irq-mux |----> [gpio-bank (n + 2)] | |----> [gpio-bank (... )] |_________|----> [gpio-bank (n + 7)] Second type has a dedicated interrupt per gpio bank. [irqN]----> [gpio-bank (n)] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Fix a typo in probeSrinivas Kandagatla2014-01-151-4/+4
| | | | | | | | | Probe function had commas instead of semi-colons on some of the lines. This patch just fixes those lines. No functional chagnes done in this patch. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Pass all configs to driver on pin_config_set()Sherman Yin2013-08-281-4/+7
| | | | | | | | | | | | | | | | | | | | | When setting pin configuration in the pinctrl framework, pin_config_set() or pin_config_group_set() is called in a loop to set one configuration at a time for the specified pin or group. This patch 1) removes the loop and 2) changes the API to pass the whole pin config array to the driver. It is now up to the driver to loop through the configs. This allows the driver to potentially combine configs and reduce the number of writes to pin config registers. All c files changed have been build-tested to verify the change compiles and that the corresponding .o is successfully generated. Signed-off-by: Sherman Yin <syin@broadcom.com> Reviewed-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Matt Porter <matt.porter@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Staticize local symbolsSachin Kamat2013-08-071-4/+4
| | | | | | | | Symbols used only in this file are made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Convert to use devm_ioremap_resourceSachin Kamat2013-08-071-5/+3
| | | | | | | | | devm_request_and_ioremap is deprecated. Use devm_ioremap_resource instead. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Remove unnecessary use of of_match_ptr macroAxel Lin2013-06-301-1/+1
| | | | | | | | | This is a DT only driver and st_pctl_of_match is always compiled in. Hence of_match_ptr is unnecessary. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
* pinctrl: st: fix return value checkWei Yongjun2013-06-281-4/+4
| | | | | | | | | | | | | In case of error, the function pinctrl_register() returns NULL not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. The function syscon_regmap_lookup_by_phandle() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* pinctrl: st: Add pinctrl and pinconf support.Srinivas KANDAGATLA2013-06-251-0/+1403
This patch add pinctrl support to ST SoCs. About hardware: ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle pin configurations. Each multi-function pin is controlled, driven and routed through the PIO multiplexing block. Each pin supports GPIO functionality (ALT0) and multiple alternate functions(ALT1 - ALTx) that directly connect the pin to different hardware blocks. When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO block. Otherwise the PIO multiplexing block configures these parameters and retiming the signal. About driver: This pinctrl driver manages both PIO and PIO-mux block using pinctrl, pinconf, pinmux, gpio subsystems. All the pinctrl related config information can only come from device trees. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>