| Commit message (Expand) | Author | Age | Files | Lines |
... | |
* | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering | Takeshi Kihara | 2019-01-21 | 1 | -14/+18 |
* | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 | Takeshi Kihara | 2019-01-21 | 1 | -5/+5 |
* | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 | Takeshi Kihara | 2019-01-21 | 1 | -2/+2 |
* | pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length | Geert Uytterhoeven | 2018-12-18 | 1 | -2/+1 |
* | pinctrl: sh-pfc: Print actual field width for variable-width fields | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: sh7734: Fix shifted values in IPSR10 | Geert Uytterhoeven | 2018-12-18 | 1 | -8/+8 |
* | pinctrl: sh-pfc: sh7734: Remove bogus IPSR10 value | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: sh7269: Add missing PCIOR0 field | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configuration | Geert Uytterhoeven | 2018-12-18 | 1 | -2/+7 |
* | pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurations | Geert Uytterhoeven | 2018-12-18 | 1 | -4/+4 |
* | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field width | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: sh7734: Add missing IPSR11 field | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: r8a77980: Add missing MOD_SEL0 field | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: r8a77970: Add missing MOD_SEL0 field | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: r8a7794: Remove bogus IPSR9 field | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: Validate pins/marks in pin groups at build time | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+2 |
* | pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group | Geert Uytterhoeven | 2018-12-18 | 1 | -0/+1 |
* | pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group | Geert Uytterhoeven | 2018-12-18 | 1 | -3/+0 |
* | pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b group | Geert Uytterhoeven | 2018-12-18 | 1 | -2/+1 |
* | pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 group | Geert Uytterhoeven | 2018-12-18 | 1 | -0/+1 |
* | pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii group | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
* | pinctrl: sh-pfc: r8a77990: Fix IOCTRL reg state after s2ram on R-Car E3 | Geert Uytterhoeven | 2018-12-18 | 1 | -0/+1 |
* | pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins | Geert Uytterhoeven | 2018-12-18 | 1 | -5/+18 |
* | pinctrl: sh-pfc: r8a77980: Add QSPI pins, groups, and functions | Dmitry Shifrin | 2018-11-20 | 1 | -0/+70 |
* | pinctrl: sh-pfc: r8a77990: Add CAN FD pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -2/+37 |
* | pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -2/+49 |
* | pinctrl: sh-pfc: r8a77965: Add CAN FD pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -0/+42 |
* | pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -0/+58 |
* | pinctrl: sh-pfc: r8a7796: Add I2C{0,3,5} pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -21/+77 |
* | pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -22/+75 |
* | pinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -21/+74 |
* | pinctrl: sh-pfc: Add physical pin multiplexing helper macros | Ulrich Hecht | 2018-11-19 | 1 | -0/+22 |
* | pinctrl: sh-pfc: r8a77995: Remove unused PINMUX_IPSR_{MSEL2,PHYS}() | Geert Uytterhoeven | 2018-11-19 | 1 | -6/+0 |
* | pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions | Takeshi Kihara | 2018-11-19 | 1 | -2/+368 |
* | pinctrl: sh-pfc: r8a77990: Add VIN[4|5] groups/functions | Jacopo Mondi | 2018-11-13 | 1 | -2/+298 |
* | pinctrl: sh-pfc: r8a77965: Add VIN[4|5] groups/functions | Jacopo Mondi | 2018-11-13 | 1 | -0/+270 |
* | pinctrl: sh-pfc: r8a7796: Fix VIN versioned groups | Jacopo Mondi | 2018-11-13 | 1 | -12/+12 |
* | pinctrl: sh-pfc: r8a7795: Fix VIN versioned groups | Jacopo Mondi | 2018-11-13 | 1 | -12/+12 |
* | pinctrl: sh-pfc: r8a7792: Fix VIN versioned groups | Jacopo Mondi | 2018-11-13 | 1 | -3/+3 |
* | pinctrl: sh-pfc: Add optional arg to VIN_DATA_PIN_GROUP | Jacopo Mondi | 2018-11-13 | 1 | -7/+8 |
* | pinctrl: sh-pfc: r8a77970: Add QSPI pins, groups, and functions | Dmitry Shifrin | 2018-11-13 | 1 | -0/+70 |
* | pinctrl: sh-pfc: r8a77990: Add voltage switch operations for SDHI | Takeshi Kihara | 2018-11-13 | 1 | -2/+33 |
* | pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions | Takeshi Kihara | 2018-11-13 | 1 | -2/+216 |
* | pinctrl: sh-pfc: r8a77470: Add SDHI support | Fabrizio Castro | 2018-11-06 | 1 | -2/+160 |
* | pinctrl: sh-pfc: Reduce kernel size for narrow VIN channels | Geert Uytterhoeven | 2018-11-06 | 3 | -12/+25 |
* | pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions | Takeshi Kihara | 2018-11-06 | 1 | -2/+238 |
* | pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions | Takeshi Kihara | 2018-11-06 | 1 | -2/+205 |
* | pinctrl: sh-pfc: r8a77470: Add QSPI1 pin groups | Fabrizio Castro | 2018-11-05 | 1 | -0/+33 |
* | pinctrl: sh-pfc: r8a77470: Add VIN pin groups | Fabrizio Castro | 2018-11-05 | 1 | -0/+184 |
* | pinctrl: sh-pfc: r8a77470: Add DU1 pin groups | Fabrizio Castro | 2018-11-05 | 1 | -0/+108 |