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* pinctrl: fix pxa2xx.c build warningsRandy Dunlap2020-02-041-0/+1
| | | | | | | | | | | | | | | | | Add #include of <linux/pinctrl/machine.h> to fix build warnings in pinctrl-pxa2xx.c. Fixes these warnings: In file included from ../drivers/pinctrl/pxa/pinctrl-pxa2xx.c:24:0: ../drivers/pinctrl/pxa/../pinctrl-utils.h:36:8: warning: `enum pinctrl_map_type' declared inside parameter list [enabled by default] enum pinctrl_map_type type); ^ ../drivers/pinctrl/pxa/../pinctrl-utils.h:36:8: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Link: http://lkml.kernel.org/r/0024542e-cba9-8f13-6c18-32d0050a6007@infradead.org Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'pinctrl-v5.6-1' of ↵Linus Torvalds2020-01-2952-1124/+3177
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes, nothing too exciting about this. Some changes hit arch/sh and arch/arm but are well isolated and acknowledged by the respective arch maintainers. Core changes: - Dropped the chained IRQ setup callback into GPIOLIB as we got rid of the last users of that in this changeset. New drivers: - New driver for Ingenic X1830. - New driver for Freescale i.MX8MP. Driver enhancements: - Fix all remaining Intel drivers to pass their IRQ chips along with the GPIO chips. - Intel Baytrail allocates its irqchip dynamically. - Intel Lynxpoint is thoroughly rewritten and modernized. - Aspeed AST2600 pin muxing and configuration is much improved. - Qualcomm SC7180 functions are updated and wakeup interrupt map is provided. - A whole slew of Renesas SH-PFC cleanups and improvements. - Fix up the Intel DT bindings to use the generic YAML DT bindings schema (a first user of this)" * tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits) pinctrl: madera: Remove extra blank line pinctrl: qcom: Don't lock around irq_set_irq_wake() pinctrl: mvebu: armada-37xx: use use platform api gpio: Drop the chained IRQ handler assign function pinctrl: freescale: Add i.MX8MP pinctrl driver support dt-bindings: imx: Add pinctrl binding doc for i.MX8MP pinctrl: tigerlake: Tiger Lake uses _HID enumeration pinctrl: sunrisepoint: Add Coffee Lake-S ACPI ID pinctrl: iproc: Use platform_get_irq_optional() to avoid error message pinctrl: dt-bindings: Fix some errors in the lgm and pinmux schema pinctrl: intel: Pass irqchip when adding gpiochip pinctrl: intel: Add GPIO <-> pin mapping ranges via callback pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq pin to output pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pins pinctrl: sunrisepoint: Add missing Interrupt Status register offset pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers pinctrl: artpec6: fix __iomem on reg in set pinctrl: ingenic: Use devm_platform_ioremap_resource() pinctrl: ingenic: Factorize irq_set_type function pinctrl: ingenic: Remove duplicated ingenic_chip_info structures ...
| * pinctrl: madera: Remove extra blank lineCharles Keepax2020-01-241-1/+0
| | | | | | | | | | | | Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20200122111150.11033-1-ckeepax@opensource.cirrus.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: qcom: Don't lock around irq_set_irq_wake()Stephen Boyd2020-01-241-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to hold the local pinctrl lock here to set irq wake on the summary irq line. Doing so only leads to lockdep warnings instead of protecting us from anything. Remove the locking. WARNING: possible circular locking dependency detected 5.4.11 #2 Tainted: G W ------------------------------------------------------ cat/3083 is trying to acquire lock: ffffff81f4fa58c0 (&irq_desc_lock_class){-.-.}, at: __irq_get_desc_lock+0x64/0x94 but task is already holding lock: ffffff81f4880c18 (&pctrl->lock){-.-.}, at: msm_gpio_irq_set_wake+0x48/0x7c which lock already depends on the new lock. the existing dependency chain (in reverse order) is: -> #1 (&pctrl->lock){-.-.}: _raw_spin_lock_irqsave+0x64/0x80 msm_gpio_irq_ack+0x68/0xf4 __irq_do_set_handler+0xe0/0x180 __irq_set_handler+0x60/0x9c irq_domain_set_info+0x90/0xb4 gpiochip_hierarchy_irq_domain_alloc+0x110/0x200 __irq_domain_alloc_irqs+0x130/0x29c irq_create_fwspec_mapping+0x1f0/0x300 irq_create_of_mapping+0x70/0x98 of_irq_get+0xa4/0xd4 spi_drv_probe+0x4c/0xb0 really_probe+0x138/0x3f0 driver_probe_device+0x70/0x140 __device_attach_driver+0x9c/0x110 bus_for_each_drv+0x88/0xd0 __device_attach+0xb0/0x160 device_initial_probe+0x20/0x2c bus_probe_device+0x34/0x94 device_add+0x35c/0x3f0 spi_add_device+0xbc/0x194 of_register_spi_devices+0x2c8/0x408 spi_register_controller+0x57c/0x6fc spi_geni_probe+0x260/0x328 platform_drv_probe+0x90/0xb0 really_probe+0x138/0x3f0 driver_probe_device+0x70/0x140 device_driver_attach+0x4c/0x6c __driver_attach+0xcc/0x154 bus_for_each_dev+0x84/0xcc driver_attach+0x2c/0x38 bus_add_driver+0x108/0x1fc driver_register+0x64/0xf8 __platform_driver_register+0x4c/0x58 spi_geni_driver_init+0x1c/0x24 do_one_initcall+0x1a4/0x3e8 do_initcall_level+0xb4/0xcc do_basic_setup+0x30/0x48 kernel_init_freeable+0x124/0x1a8 kernel_init+0x14/0x100 ret_from_fork+0x10/0x18 -> #0 (&irq_desc_lock_class){-.-.}: __lock_acquire+0xeb4/0x2388 lock_acquire+0x1cc/0x210 _raw_spin_lock_irqsave+0x64/0x80 __irq_get_desc_lock+0x64/0x94 irq_set_irq_wake+0x40/0x144 msm_gpio_irq_set_wake+0x5c/0x7c set_irq_wake_real+0x40/0x5c irq_set_irq_wake+0x70/0x144 cros_ec_rtc_suspend+0x38/0x4c platform_pm_suspend+0x34/0x60 dpm_run_callback+0x64/0xcc __device_suspend+0x310/0x41c dpm_suspend+0xf8/0x298 dpm_suspend_start+0x84/0xb4 suspend_devices_and_enter+0xbc/0x620 pm_suspend+0x210/0x348 state_store+0xb0/0x108 kobj_attr_store+0x14/0x24 sysfs_kf_write+0x4c/0x64 kernfs_fop_write+0x15c/0x1fc __vfs_write+0x54/0x18c vfs_write+0xe4/0x1a4 ksys_write+0x7c/0xe4 __arm64_sys_write+0x20/0x2c el0_svc_common+0xa8/0x160 el0_svc_handler+0x7c/0x98 el0_svc+0x8/0xc other info that might help us debug this: Possible unsafe locking scenario: CPU0 CPU1 ---- ---- lock(&pctrl->lock); lock(&irq_desc_lock_class); lock(&pctrl->lock); lock(&irq_desc_lock_class); *** DEADLOCK *** 7 locks held by cat/3083: #0: ffffff81f06d1420 (sb_writers#7){.+.+}, at: vfs_write+0xd0/0x1a4 #1: ffffff81c8935680 (&of->mutex){+.+.}, at: kernfs_fop_write+0x12c/0x1fc #2: ffffff81f4c322f0 (kn->count#337){.+.+}, at: kernfs_fop_write+0x134/0x1fc #3: ffffffe89a641d60 (system_transition_mutex){+.+.}, at: pm_suspend+0x108/0x348 #4: ffffff81f190e970 (&dev->mutex){....}, at: __device_suspend+0x168/0x41c #5: ffffff81f183d8c0 (lock_class){-.-.}, at: __irq_get_desc_lock+0x64/0x94 #6: ffffff81f4880c18 (&pctrl->lock){-.-.}, at: msm_gpio_irq_set_wake+0x48/0x7c stack backtrace: CPU: 4 PID: 3083 Comm: cat Tainted: G W 5.4.11 #2 Hardware name: Google Cheza (rev3+) (DT) Call trace: dump_backtrace+0x0/0x174 show_stack+0x20/0x2c dump_stack+0xc8/0x124 print_circular_bug+0x2ac/0x2c4 check_noncircular+0x1a0/0x1a8 __lock_acquire+0xeb4/0x2388 lock_acquire+0x1cc/0x210 _raw_spin_lock_irqsave+0x64/0x80 __irq_get_desc_lock+0x64/0x94 irq_set_irq_wake+0x40/0x144 msm_gpio_irq_set_wake+0x5c/0x7c set_irq_wake_real+0x40/0x5c irq_set_irq_wake+0x70/0x144 cros_ec_rtc_suspend+0x38/0x4c platform_pm_suspend+0x34/0x60 dpm_run_callback+0x64/0xcc __device_suspend+0x310/0x41c dpm_suspend+0xf8/0x298 dpm_suspend_start+0x84/0xb4 suspend_devices_and_enter+0xbc/0x620 pm_suspend+0x210/0x348 state_store+0xb0/0x108 kobj_attr_store+0x14/0x24 sysfs_kf_write+0x4c/0x64 kernfs_fop_write+0x15c/0x1fc __vfs_write+0x54/0x18c vfs_write+0xe4/0x1a4 ksys_write+0x7c/0xe4 __arm64_sys_write+0x20/0x2c el0_svc_common+0xa8/0x160 el0_svc_handler+0x7c/0x98 el0_svc+0x8/0xc Fixes: 6aced33f4974 ("pinctrl: msm: drop wake_irqs bitmap") Cc: Douglas Anderson <dianders@chromium.org> Cc: Brian Masney <masneyb@onstation.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200121180950.36959-1-swboyd@chromium.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: mvebu: armada-37xx: use use platform apiPeng Fan2020-01-231-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | platform_irq_count() and platform_get_irq() is the more generic way (independent of device trees) to determine the count of available interrupts. So use this instead. As platform_irq_count() might return an error code (which of_irq_count doesn't) some additional handling is necessary. Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/1576672860-14420-1-git-send-email-peng.fan@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: freescale: Add i.MX8MP pinctrl driver supportAnson Huang2020-01-233-0/+353
| | | | | | | | | | | | | | | | | | | | Add the pinctrl driver support for i.MX8MP. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/1579052348-32167-2-git-send-email-Anson.Huang@nxp.com Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Merge tag 'intel-pinctrl-v5.6-1' of ↵Linus Walleij2020-01-239-520/+1479
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.6-1 * Tiger Lake appears to have _HID enumeration, thus driver has been updated * Coffee Lake-S has the same IP as Sunrisepoint, thus ID has been added * Baytrail has got more clean ups and bug fixes, such as direct IRQ handling * Lynxpoint GPIO has been converted to true pin control driver * The common driver now uses IRQ chip enumeration via GPIO chip The following is an automated git shortlog grouped by driver: baytrail: - Replace WARN with dev_info_once when setting direct-irq pin to output - Do not clear IRQ flags on direct-irq enabled pins - Reuse struct intel_pinctrl in the driver - Use local variable to keep device pointer - Keep pointer to struct device instead of its container - Use GPIO direction definitions - Move IRQ valid mask initialization to a dedicated callback - Group GPIO IRQ chip initialization - Allocate IRQ chip dynamic cherryview: - Use GPIO direction definitions intel: - Pass irqchip when adding gpiochip - Add GPIO <-> pin mapping ranges via callback - Share struct intel_pinctrl for wider use - Use GPIO direction definitions lynxpoint: - Update summary in the driver - Switch to pin control API - Add GPIO <-> pin mapping ranges via callback - Implement ->pin_dbg_show() - Add pin control operations - Reuse struct intel_pinctrl in the driver - Add pin control data structures - Implement intel_gpio_get_direction callback - Implement ->irq_ack() callback - Move ownership check to IRQ chip - Move lp_irq_type() closer to IRQ related routines - Move ->remove closer to ->probe() - Extract lp_gpio_acpi_use() for future use - Convert unsigned to unsigned int - Switch to memory mapped IO accessors - Keep pointer to struct device instead of its container - Relax GPIO request rules - Assume 2 bits for mode selector - Use standard pattern for memory allocation - Use %pR to print IO resource - Drop useless assignment - Correct amount of pins - Use raw_spinlock for locking - Move GPIO driver to pin controller folder sunrisepoint: - Add Coffee Lake-S ACPI ID - Add missing Interrupt Status register offset tigerlake: - Tiger Lake uses _HID enumeration
| | * pinctrl: tigerlake: Tiger Lake uses _HID enumerationMika Westerberg2020-01-161-297/+250
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Turns out that Tiger Lake GPIO will be enumerated using _HID method where there is only a single ACPI device and multiple BARs so rework the driver to support that scheme instead. Fixes: c9ccf71fc807 ("pinctrl: intel: Add Intel Tiger Lake pin controller support") Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: sunrisepoint: Add Coffee Lake-S ACPI IDMika Westerberg2020-01-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Coffee Lake-S PCH has the same GPIO hardware than Sunrisepoint-H PCH but the ACPI ID is different. Add this new ACPI ID to the list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: intel: Pass irqchip when adding gpiochipLinus Walleij2020-01-091-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: intel: Add GPIO <-> pin mapping ranges via callbackLinus Walleij2020-01-091-13/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When IRQ chip is instantiated via GPIO library flow, the few functions, in particular the ACPI event registration mechanism, on some of ACPI based platforms expect that the pin ranges are initialized to that point. Add GPIO <-> pin mapping ranges via callback in the GPIO library flow. Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq ↵Hans de Goede2020-01-091-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pin to output Suspending Goodix touchscreens requires changing the interrupt pin to output before sending them a power-down command. Followed by wiggling the interrupt pin to wake the device up, after which it is put back in input mode. On Cherry Trail device the interrupt pin is listed as a GpioInt ACPI resource so we can do this without problems as long as we release the IRQ before changing the pin to output mode. On Bay Trail devices with a Goodix touchscreen direct-irq mode is used in combination with listing the pin as a normal GpioIo resource. This works fine, but this triggers the WARN in byt_gpio_set_direction-s output path because direct-irq support is enabled on the pin. This commit replaces the WARN call with a dev_info_once call, fixing a bunch of WARN splats in dmesg on each suspend/resume cycle. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pinsHans de Goede2020-01-091-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Suspending Goodix touchscreens requires changing the interrupt pin to output before sending them a power-down command. Followed by wiggling the interrupt pin to wake the device up, after which it is put back in input mode. On Bay Trail devices with a Goodix touchscreen direct-irq mode is used in combination with listing the pin as a normal GpioIo resource. This works fine, until the goodix driver gets rmmod-ed and then insmod-ed again. In this case byt_gpio_disable_free() calls byt_gpio_clear_triggering() which clears the IRQ flags and after that the (direct) IRQ no longer triggers. This commit fixes this by adding a check for the BYT_DIRECT_IRQ_EN flag to byt_gpio_clear_triggering(). Note that byt_gpio_clear_triggering() only gets called from byt_gpio_disable_free() for direct-irq enabled pins, as these are excluded from the irq_valid mask by byt_init_irq_valid_mask(). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: sunrisepoint: Add missing Interrupt Status register offsetBoyan Ding2020-01-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 179e5a6114cc ("pinctrl: intel: Remove default Interrupt Status offset") removes default interrupt status offset of GPIO controllers, with previous commits explicitly providing the previously default offsets. However, the is_offset value in SPTH_COMMUNITY is missing, preventing related irq from being properly detected and handled. Fixes: f702e0b93cdb ("pinctrl: sunrisepoint: Provide Interrupt Status register offset") Link: https://bugzilla.kernel.org/show_bug.cgi?id=205745 Cc: stable@vger.kernel.org Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: lynxpoint: Update summary in the driverAndy Shevchenko2019-12-131-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reflect in the driver that it is now a pin control one. While here, update copyright years and authors. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Switch to pin control APIAndy Shevchenko2019-12-132-57/+13
| | | | | | | | | | | | | | | | | | | | | | | | When all preparations are done, we may switch to pin control API. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Add GPIO <-> pin mapping ranges via callbackAndy Shevchenko2019-12-131-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When IRQ chip is instantiated via GPIO library flow, the few functions, in particular the ACPI event registration mechanism, on some of ACPI based platforms expect that the pin ranges are initialized to that point. Add GPIO <-> pin mapping ranges via callback in the GPIO library flow. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Implement ->pin_dbg_show()Andy Shevchenko2019-12-131-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | The introduced callback ->pin_dbg_show() is useful for debugging. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Add pin control operationsAndy Shevchenko2019-12-131-1/+314
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add implementation for: - pin control, group information retrieval: count, name and pins - pin muxing: - function information (count, name and groups) - mux setting - GPIO control (enable, disable, set direction) - pin configuration: - pull disable, up and down - any other option is treated as not supported. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Reuse struct intel_pinctrl in the driverAndy Shevchenko2019-12-131-24/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | We may use now available struct intel_pinctrl in the driver. No functional change implied. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Add pin control data structuresAndy Shevchenko2019-12-131-2/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to implement pin control for Intel Lynxpoint, we need data structures in which to store and pass along pin, community and SoC data information. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Implement intel_gpio_get_direction callbackAndy Shevchenko2019-12-131-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allows querying GPIO direction from the pad config register. If the pad is not in GPIO mode, return an error. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Implement ->irq_ack() callbackAndy Shevchenko2019-12-131-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of playing tricks with registers in the interrupt handler, utilize the IRQ chip core for ACKing interrupts properly. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Move ownership check to IRQ chipAndy Shevchenko2019-12-131-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is nothing wrong with requesting pin that owned by ACPI. The only difference is how interrupt status will be reflected. It means that in ACPI mode we may not use pin as GPIO-backed IRQ. Taking above into consideration, move the check from GPIO to IRQ chip callback. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Move lp_irq_type() closer to IRQ related routinesAndy Shevchenko2019-12-131-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidate IRQ routines for better maintenance. While here, rename lp_irq_type() to lp_irq_set_type() to be in align with a callback name. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Move ->remove closer to ->probe()Andy Shevchenko2019-12-131-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Consolidate ->remove and ->probe() callbacks for better maintenance. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Extract lp_gpio_acpi_use() for future useAndy Shevchenko2019-12-131-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | We may need this function for other features in the pin control driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Convert unsigned to unsigned intAndy Shevchenko2019-12-131-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | Simple type conversion with no functional change implied. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Switch to memory mapped IO accessorsAndy Shevchenko2019-12-131-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | Convert driver to use memory mapped IO accessors. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Keep pointer to struct device instead of its containerAndy Shevchenko2019-12-131-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to keep pointer to struct platform_device, which is container of struct device, because the latter is what have been used everywhere outside of ->probe() path. In any case we may derive pointer to the container when needed. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Relax GPIO request rulesAndy Shevchenko2019-12-131-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A pin in native mode still can be requested as GPIO, though we assume that firmware has configured it properly, which sometimes is not the case. Here we allow turning the pin as GPIO to avoid potential issues, but issue warning that something might be wrong. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Assume 2 bits for mode selectorAndy Shevchenko2019-12-131-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | New generations can use 2 bits for mode selector. Update the code to support it. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Use standard pattern for memory allocationAndy Shevchenko2019-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pattern foo = kmalloc(sizeof(*foo), GFP_KERNEL); has an advantage when foo type is changed. Since we are planning a such, better to be prepared by using standard pattern for memory allocation. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Use %pR to print IO resourceAndy Shevchenko2019-12-131-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace explicit casting by pointer to struct resource with specifier replacement to %pR to print the IO resource. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Drop useless assignmentAndy Shevchenko2019-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to assign ret variable in ->probe(). Drop useless assignment. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Correct amount of pinsAndy Shevchenko2019-12-131-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we count from 0 it's possible to get into off-by-one error. That's what had happened to this driver. So, correct amount of pins and related typos in the code. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Use raw_spinlock for lockingAndy Shevchenko2019-12-131-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Intel Lynxpoint pinctrl driver implements irqchip callbacks which are called with desc->lock raw_spinlock held. In mainline this is fine because spinlock resolves to raw_spinlock. However, running the same code in -rt we will get a BUG() asserted. This is because in -rt spinlocks are preemptible so taking the driver private spinlock in irqchip callbacks causes might_sleep() to trigger. In order to keep -rt happy but at the same time make sure that register accesses get serialized, convert the driver to use raw_spinlock instead. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lynxpoint: Move GPIO driver to pin controller folderAndy Shevchenko2019-12-133-0/+482
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move Lynxpoint GPIO driver under Intel pin control umbrella for further transformation to a real pin control driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: baytrail: Reuse struct intel_pinctrl in the driverAndy Shevchenko2019-12-131-99/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We may use now available struct intel_pinctrl in the driver. No functional change implied. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: baytrail: Use local variable to keep device pointerAndy Shevchenko2019-12-131-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use local variable to keep device pointer in order to increase readability of the driver. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: baytrail: Keep pointer to struct device instead of its containerAndy Shevchenko2019-12-131-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to keep pointer to struct platform_device, which is container of struct device, because the latter is what have been used everywhere outside of ->probe() path. In any case we may derive pointer to the container when needed. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: intel: Share struct intel_pinctrl for wider useAndy Shevchenko2019-12-132-34/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are few drivers for Intel SoC GPIO which may utilize the same data structure to describe this IP. Share struct intel_pinctrl for wider user. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: intel: Use GPIO direction definitionsMatti Vaittinen2019-12-131-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use new GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT when returning GPIO direction to GPIO framework. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: cherryview: Use GPIO direction definitionsMatti Vaittinen2019-12-131-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use new GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT when returning GPIO direction to GPIO framework. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: baytrail: Use GPIO direction definitionsMatti Vaittinen2019-12-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use new GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT when returning GPIO direction to GPIO framework. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: baytrail: Move IRQ valid mask initialization to a dedicated callbackAndy Shevchenko2019-12-131-14/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a logical continuation of the commit 5fbe5b5883f8 ("gpio: Initialize the irqchip valid_mask with a callback") to split IRQ initialization to hardware and valid mask setup parts. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: baytrail: Group GPIO IRQ chip initializationAndy Shevchenko2019-12-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 5ea422750a9f ("pinctrl: baytrail: Pass irqchip when adding gpiochip") the GPIO IRQ chip structure is being initialized under conditional when IRQ resource has been discovered. But that commit left aside the assignment of ->init_valid_mask() callback that is done unconditionally. For sake of consistency and preventing some garbage in GPIO IRQ chip structure group initialization together. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: baytrail: Allocate IRQ chip dynamicAndy Shevchenko2019-12-091-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keeping the IRQ chip definition static shares it with multiple instances of the GPIO chip in the system. This is bad and now we get this warning from GPIO library: "detected irqchip that is shared with multiple gpiochips: please fix the driver." Hence, move the IRQ chip definition from being driver static into the struct intel_pinctrl. So a unique IRQ chip is used for each GPIO chip instance. Fixes: 9f573b98ca50 ("pinctrl: baytrail: Update irq chip operations") Depends-on: ca8a958e2acb ("pinctrl: baytrail: Pass irqchip when adding gpiochip") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * | pinctrl: iproc: Use platform_get_irq_optional() to avoid error messageRayagonda Kokatanur2020-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use platform_get_irq_optional() instead of platform_get_irq() to avoid below error message during probe: [ 0.589121] iproc-gpio 66424800.gpio: IRQ index 0 not found Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Link: https://lore.kernel.org/r/20200110035524.23511-1-rayagonda.kokatanur@broadcom.com Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | Merge tag 'samsung-pinctrl-5.6' of ↵Linus Walleij2020-01-151-6/+10
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v5.6 Enable compile test for build coverage (and fix exposed missing dependency). Clarify Kconfig option help text.
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 07:37:01 +0100