| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | powercap: Add Power Limit4 support for Alder Lake SoC | Sumeet Pawnikar | 2021-08-25 | 1 | -0/+2 |
| * | powercap: Add Hygon Fam18h RAPL support | Pu Wen | 2021-03-18 | 1 | -0/+1 |
| * | powercap: Add AMD Fam17h RAPL support | Victor Ding | 2020-11-10 | 1 | -1/+19 |
| * | powercap/intel_rapl_msr: Convert rapl_msr_priv into pointer | Victor Ding | 2020-11-10 | 1 | -15/+18 |
| * | powercap/intel_rapl: enumerate Psys RAPL domain together with package RAPL do... | Zhang Rui | 2020-10-16 | 1 | -4/+1 |
| * | powercap: Add Power Limit4 support | Sumeet Pawnikar | 2020-07-27 | 1 | -0/+15 |
| * | intel_rapl: Fix module autoloading issue | Zhang Rui | 2019-07-11 | 1 | -4/+20 |
| * | intel_rapl: support two power limits for every RAPL domain | Zhang Rui | 2019-07-11 | 1 | -0/+1 |
| * | intel_rapl: support 64 bit register | Zhang Rui | 2019-07-11 | 1 | -4/+7 |
| * | intel_rapl: abstract RAPL common code | Zhang Rui | 2019-07-11 | 1 | -0/+163 |
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