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* pwm: Remove __init initializer for pwm_add_table()Shobhit Kumar2015-04-231-1/+1
| | | | | | | | | | | | | For platforms that don't support DT, some early MFD modules can register lookup tables. Remove the __init annotation so that this works. This is similar to gpio_add_lookup_table() which allows late additions. CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: samsung: Fix output race on disablingSjoerd Simons2015-03-271-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When disabling the Samsung PWM the output state remains at the level it was at the end of a PWM cycle. In other words, calling pwm_disable() when at 100% duty cycle will keep the output active, while at all other settings the output will go/stay inactive. On top of that the Samsung PWM settings are double-buffered, which means the new settings only get applied at the start of a new PWM cycle. This results in a race if the PWM is at 100% duty cycle and a driver calls: pwm_config(pwm, 0, period); pwm_disable(pwm); In this case the PWMs output will unexpectedly stay active, unless a new PWM cycle happened to start between the register writes in pwm_config() and pwm_disable(). As far as I can tell this is a regression introduced by 3bdf878, before that a call to pwm_config() would call pwm_samsung_enable() which, while heavy-handed, made sure the expected settings were live. To resolve this, while not re-introducing the issues 3bdf878 (flickering as the PWM got reset while in a PWM cycle) fixed, only force an update of the settings when at 100% duty cycle, which shouldn't have any noticeable effect on the output but is enough to ensure the behaviour is as expected on disable. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: mxs: Fix period divider computationGaetan Hug2015-03-111-2/+6
| | | | | | | | | | | | | | | | | | | The driver computes which clock divider it sould be using from the requested period. This computation assumes that the link between the register value and the actual divider value is raising 2 to the power of the registry value. div = 1 << regvalue This is true only for the first 5 values out of 8. Next values are 64, 256 and, 1024 - instead of 32, 64, 128. This affects only the users requesting a period > 0.04369s. Replace the computation with a look-up table. Signed-off-by: Gaetan Hug <ghug@induct.be> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: atmel-hlcdc: Add errata handling for sama5d4Nicolas Ferre2015-03-111-0/+4
| | | | | | | | | sama5d4 SoC also has an errata on the HLCDC PWM. It is the same as the sama5d3 that is forbidding the use of div1 prescaler. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: pca9685: Constify struct regmap_configKrzysztof Kozlowski2015-03-111-1/+1
| | | | | | | | The regmap_config struct may be const because it is not modified by the driver and regmap_init() accepts pointer to const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: tegra: Use NSEC_PER_SECThierry Reding2015-02-181-1/+1
| | | | | | | Instead of using the literal value for the number of nanoseconds per second, use the macro instead to increase readability. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Remove unnecessary check before of_node_put()Markus Elfring2015-02-031-1/+1
| | | | | | | | | | The of_node_put() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Imagination Technologies PWM DAC driverNaidu Tellapati2015-01-303-0/+263
| | | | | | | | | | | | | | | The Pistachio SOC from Imagination Technologies includes a Pulse Width Modulation DAC which produces 1 to 4 digital bit-outputs which represent digital waveforms. These PWM outputs are primarily in charge of controlling backlight LED devices. Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Naidu Tellapati <Naidu.Tellapati@imgtec.com> Signed-off-by: Sai Masarapu <Sai.Masarapu@imgtec.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> [thierry.reding: fixup license header as discussed on list] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: sti: Maintain a bitmap of configured devicesAjit Pal Singh2015-01-301-19/+11
| | | | | | | | | | | | | This patch introduces a bitmap which is used to keep track of the pwm channels which have been configured in a pwm chip. The method used earlier to find the number of configured channels, was to count the pwmdevices with PWMF_REQUESTED field set and period value configured. This was not correct and failed when of_pwm_get()/pwm_get() and then pwm_config() was used. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Add Allwinner SoC supportAlexandre Belloni2015-01-303-0/+377
| | | | | | | | | This adds a generic PWM framework driver for the PWM controller found on Allwinner SoCs. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: atmel-hlcdc: Prevent division by zeroBoris BREZILLON2015-01-301-0/+6
| | | | | | | | | | | | The slow and system clock should never return a rate of zero, but this might happen if the clocks property defined in the DT is referencing the wrong clocks. Prevent any division by zero from happening by testing the clk_freq value before calling do_div(). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: atmel-hlcdc: Depend on HAVE_CLKThierry Reding2015-01-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The include/linux/clk.h header defines dummy implementations for the various clk_*() functions if HAVE_CLK is not selected to improve build coverage in randconfig builds. The dummy implementation of clk_get_rate() returns 0, which causes the Atmel HLCDC PWM driver's atmel_hlcdc_pwm_config() implementation to end up calling: do_div(clk_period_ns, 0) On x86, do_div(n, base) will end up evaluating to this: n >>= ilog2(base) with base = 0, the implementation of ilog2() will call ____ilog2_NaN(), which is purposely undefined and results in a linker failure: ERROR: "____ilog2_NaN" [drivers/pwm/pwm-atmel-hlcdc.ko] undefined! The implementation of do_div() checks that base is a power of 2 before calling ilog2(). The compiler doesn't optimize this away, presumably because is_power_of_2() is an inline function and the compiler doesn't or can't inspect it closely enough. ilog2() being a macro it still ends up generating the ____ilog2_NaN() because of the constant 0. The root of the problem is that the driver really should be checking before possibly dividing by zero. That should eventually be fixed, but for now just assume that the clock runs at a sensible frequency when available. Reported-by: Jim Davis <jim.epost@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* Merge tag 'pwm/for-3.19-rc1' of ↵Linus Torvalds2014-12-175-5/+587
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "There are two new drivers, one for the BCM2835 (Raspberry Pi) and one used in conjunction with the LCD controller on various Atmel SoCs. The Samsung PWM driver can now be built for 64-bit ARM (Exynos7). A couple of fixes have been applied to the FTM PWM driver and system sleep support was added" * tag 'pwm/for-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: atmel-hlcdc: add at91sam9x5 and sama5d3 errata handling pwm: ftm: Add Power Management support for FTM PWM pwm: ftm: Add regmap rbtree type cache support pwm: ftm: Correctly track usage count pwm: samsung: Allow Samsung PWM driver to be enabled on Exynos7 pwm: add DT bindings documentation for atmel-hlcdc-pwm driver pwm: add support for atmel-hlcdc-pwm device pwm: Add BCM2835 PWM driver
| * pwm: atmel-hlcdc: add at91sam9x5 and sama5d3 errata handlingBoris BREZILLON2014-12-041-5/+45
| | | | | | | | | | | | | | | | | | | | | | at91sam9x5 has an errata forbidding the use of slow clk as a clk source and sama5d3 SoCs has another errata forbidding the use of div1 prescaler. Take both of these erratas into account. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: ftm: Add Power Management support for FTM PWMXiubo Li2014-12-011-1/+48
| | | | | | | | | | | | | | | | Add PM support for FTM PWM driver using callback function suspend and resume in .driver.pm of platform_driver. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: ftm: Add regmap rbtree type cache supportXiubo Li2014-12-011-0/+11
| | | | | | | | | | | | | | | | This patch is to prepare for adding PM support for FTM PWM driver using callback function suspend and resume in .driver.pm of platform_driver. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: ftm: Correctly track usage countXiubo Li2014-12-011-3/+1
| | | | | | | | | | | | | | | | No matter how many times the FTM PWM is enabled, the use_count will always be one. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: samsung: Allow Samsung PWM driver to be enabled on Exynos7Abhilash Kesavan2014-11-171-1/+1
| | | | | | | | | | | | | | | | To re-use the existing PWM driver for 64-bit ARM based Exynos7 SoC, make the driver depend on ARCH_EXYNOS along with PLAT_SAMSUNG. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: add support for atmel-hlcdc-pwm deviceBoris Brezillon2014-11-173-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12 or sama5d3 families for instance) provides a PWM device. This driver add support for a PWM chip exposing a single PWM device (which will most likely be used to drive a backlight device). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Anthony Harivel <anthony.harivel@emtrion.de> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Add BCM2835 PWM driverBart Tanghe2014-11-173-0/+215
| | | | | | | | | | | | | | | | Add PWM driver for Broadcom BCM2835 processor (Raspberry Pi) Signed-off-by: Bart Tanghe <bart.tanghe@thomasmore.be> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | Merge branch 'platform/remove_owner' of ↵Greg Kroah-Hartman2014-11-0419-19/+0
|\ \ | |/ |/| | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into driver-core-next Remove all .owner fields from platform drivers
| * pwm: drop owner assignment from platform_driversWolfram Sang2014-10-2019-19/+0
| | | | | | | | | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | Merge tag 'pwm/for-3.18-rc1' of ↵Linus Torvalds2014-10-2111-219/+379
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm changes from Thierry Reding: "There are no new drivers here, only a couple of fixes all over the place" * tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: Let PWM_CLPS711X depend on HAS_IOMEM pwm: atmel: Fix calculation of prescale value pwm: Fix uninitialized warnings in pwm_get() pwm: rockchip: Allow polarity invert on rk3288 pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2 pwm: imx: Cleanup indentation for register definitions pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definition pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error. pwm: lpss: make it buildable only on X86 pwm: lpss: use c99 initializers in structures pwm: lpss: Fix build failure on PowerPC pwm: lpss: pci: Move to use pcim_enable_device() pwm: lpss: Properly split driver to parts pwm: lpss: Add ACPI and PCI IDs for Intel Braswell pwm: fsl-ftm: Select REGMAP_MMIO pwm: fsl-ftm: Document 'big-endian' property pwm: fsl-ftm: Convert to direct regmap API usage pwm: fsl-ftm: Clean up the code
| * pwm: Let PWM_CLPS711X depend on HAS_IOMEMChen Gang2014-10-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | PWM_CLPS711X needs HAS_IOMEM, so depend on it, the related error (with allmodconfig under um): MODPOST 1205 modules ERROR: "devm_ioremap_resource" [drivers/pwm/pwm-clps711x.ko] undefined! ERROR: "devm_ioremap" [drivers/net/phy/mdio-bcm-unimac.ko] undefined! Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: atmel: Fix calculation of prescale valueNikolaus Voss2014-09-251-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The prescale value used for calculating the period was incremented afterwards, thus the resulting prescale value is by one too high. This resulted in a PWM frequency only half as high as requested. This patch moves the 64 bit division out of the prescale loop to correct the above issue and make the calculation more efficient. Signed-off-by: Nikolaus Voss <n.voss@weinmann-emt.de> Tested-by: Bo Shen <voice.shen@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Fix uninitialized warnings in pwm_get()Geert Uytterhoeven2014-08-291-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With some versions of gcc (e.g. 4.1.2): drivers/pwm/core.c: In function ‘pwm_get’: drivers/pwm/core.c:610: warning: ‘polarity’ may be used uninitialized in this function drivers/pwm/core.c:609: warning: ‘period’ may be used uninitialized in this function While these are false positives, we can get rid of them by refactoring the code to store a pointer to the best match, as suggested before by Thierry Reding. This does require moving the mutex_unlock() down. Fixes: d717ea73e36dd565 ("pwm: Fix period and polarity in pwm_get() for non-perfect matches") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: rockchip: Allow polarity invert on rk3288Doug Anderson2014-08-261-9/+48
| | | | | | | | | | | | | | | | | | | | The rk3288 has the ability to invert the polarity of the PWM. Let's enable that ability. Note that this increases pwm_cells to 3 for rk3288. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2Liu Ying2014-08-251-2/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27, i.MX51 and i.MX6SL. There is a 4-word (16 bit) sample FIFO in this IP. Each FIFO slot determines the duty period of a PWM waveform in one full cycle. The IP spec mentions that we should not write a fourth sample because the FIFO will become full and triggers a FIFO write error (FWE) which will prevent the PWM from starting once it is enabled. In order to avoid any sample FIFO overflow issue, this patch clears all sample FIFO by doing software reset in the configuration hook when the controller is disabled or waits for a full PWM cycle to get a relinquished FIFO slot when the controller is enabled and the FIFO is fully loaded. The FIFO overflow issue can be reproduced by the following commands on the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which is driven by the pin HSIC_STROBE and the maximal brightness is 255. echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 255 > /sys/class/leds/user/brightness Here, FWE happens (PWMSR register reads 0x58) and the LED can not be lighten. Another way to reproduce the FIFO overflow issue is to run this script: while true; do echo 255 > /sys/class/leds/user/brightness; done Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Lothar Waßmann <LW@KARO-electronics.de> Cc: linux-pwm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: imx: Cleanup indentation for register definitionsLiu Ying2014-08-251-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains no logic change to cleanup indentation for register definitions only. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Lothar Waßmann <LW@KARO-electronics.de> Cc: linux-pwm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definitionLiu Ying2014-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing parentheses around the argument of the macro MX3_PWMCR_PRESCALER(x) to avoid any potential macro expansion issue. Reported-by: Lothar Waßmann <LW@KARO-electronics.de> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Lothar Waßmann <LW@KARO-electronics.de> Cc: linux-pwm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error.Xiubo Li2014-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | Since we cannot make sure the 'chip->npwm' will always be none zero here, and then if either equal to zero, the kzalloc() will return ZERO_SIZE_PTR, which equals to ((void *)16). So this patch fix this with just doing the zero check before calling kzalloc(). Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: make it buildable only on X86Andy Shevchenko2014-08-251-0/+1
| | | | | | | | | | | | | | | | There is no sign of this IP block on non-x86 architectures and rather will not be. Thus, make this explicit by applying a direct dependency to X86. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: use c99 initializers in structuresJulia Lawall2014-08-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use c99 initializers for structures. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @decl@ identifier i1,fld; type T; field list[n] fs; @@ struct i1 { fs T fld; ...}; @bad@ identifier decl.i1,i2; expression e; initializer list[decl.n] is; @@ struct i1 i2 = { is, + .fld = e - e ,...}; // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> [thierry.reding: rebased and applied same fix for Braswell] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: Fix build failure on PowerPCThierry Reding2014-08-231-0/+1
| | | | | | | | | | | | | | | | | | | | An x86 build seems to pull in the linux/io.h include indirectly. On PowerPC that doesn't happen and the build breaks due to the readl() and writel() functions not being declared. Fix this by explicitly including linux/io.h. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: pci: Move to use pcim_enable_device()Andy Shevchenko2014-08-231-2/+1
| | | | | | | | | | | | | | | | Let's use managed functions for this driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: Properly split driver to partsAndy Shevchenko2014-08-236-127/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver consists of core, PCI, and platform parts. It would be better to split them into separate files. The platform driver is now called pwm-lpss-platform. Thus, previously set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe side since it seems no one from outside Intel is using it for now. While here, move to use macros module_pci_driver() and module_platform_driver(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> [thierry.reding: change select to depends on PWM_LPSS, cleanup] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: Add ACPI and PCI IDs for Intel BraswellAlan Cox2014-08-221-0/+8
| | | | | | | | | | | | | | | | | | This is pretty much the same as Baytrail PWM. Only difference is that the input clock runs on different frequency. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: fsl-ftm: Select REGMAP_MMIOFabio Estevam2014-08-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 42fa98a9c360 ("pwm: fsl-ftm: Convert to direct regmap API usage") introduced the following error when REGMAP_MMIO=n: drivers/built-in.o: In function `fsl_pwm_probe': >> pwm-fsl-ftm.c:(.text+0xd7d7): undefined reference to `devm_regmap_init_mmio_clk' Select select REGMAP_MMIO in order to fix this error. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: fsl-ftm: Convert to direct regmap API usageXiubo Li2014-08-201-39/+44
| | | | | | | | | | | | | | | | | | | | | | | | The regmap core supports different endian modes for devices. This patch convert to direct regmap API usage, preparing to support big endianness for LS1 SoC. Using the regmap framework it will be easy to support devices that only differ in endianness with the same device driver. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: fsl-ftm: Clean up the codeXiubo Li2014-08-201-7/+6
| | | | | | | | | | | | | | This patch intends to prepare for converting to direct regmap API usage. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into ↵Arnd Bergmann2014-09-091-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/cleanup Pull "Second batch of AT91 cleanup for 3.18" from Nicolas Ferre: - Timer Counter (TC) fixup and cleanup: - fix segmentation fault when kexec-ing a kernel by masking TC interrupts at shutdown and probe time - use modern driver model: devm_*, probe function, sanitize IRQ request Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91: clocksource: tcb_clksrc: sanitize IRQ request ARM: at91/tclib: mask interruptions at shutdown and probe ARM: at91/tclib: move initialization from alloc to probe ARM: at91/tclib: prefer using of devm_* functions
| * ARM: at91/tclib: move initialization from alloc to probeGaël PORTAY2014-09-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move resource retrieval from atmel_tc_alloc to tc_probe to avoid lately reporting resource related issues when a TC block user request a TC block. Moreover, resources retrieval are usually done in the probe function, thus moving them add some consistency with other drivers. Initialization is done once, ie not every time a tc block is requested. If it fails, the device is not appended to the list of tc blocks. Furhermore, the device id is retrieved at probe as well, avoiding parsing DT every time the user requests of tc block. Signed-off-by: Gaël PORTAY <gael.portay@gmail.com> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* | pwm: Fix period and polarity in pwm_get() for non-perfect matchesGeert Uytterhoeven2014-08-181-2/+6
|/ | | | | | | | | | | | | | | | | | | | | | | If pwm_get() finds a look-up entry with a perfect match (both dev_id and con_id match), the loop is aborted, and "p" still points to the correct struct pwm_lookup. If only an entry with a matching dev_id or con_id is found, the loop terminates after traversing the whole list, and "p" now points to arbitrary memory, not part of the pwm_lookup list. Then pwm_set_period() and pwm_set_polarity() will set random values for period resp. polarity. To fix this, save period and polarity when finding a new best match, just like is done for chip (for the provider) and index. This fixes the LCD backlight on r8a7740/armadillo-legacy, which was fed period 0 and polarity -1068821144 instead of 33333 resp. 1. Fixes: 3796ce1d4d4b ("pwm: add period and polarity to struct pwm_lookup") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: stable@vger.kernel.org Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* Merge tag 'pwm/for-3.17-rc1' of ↵Linus Torvalds2014-08-097-25/+713
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm changes from Thierry Reding: "The set of changes for this merge window contains two new drivers: one for Rockchip SoCs and another for STMicroelectronics STiH4xx SoCs. The remainder of the changes are the usual small cleanups such as removing redundant OOM messages, signalling that a PWM chip's operations can sleep and removing an unneeded dependency" * tag 'pwm/for-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: rockchip: Added to support for RK3288 SoC pwm: rockchip: document RK3288 SoC compatible pwm: sti: Remove PWM period table pwm: sti: Sync between enable/disable calls pwm: sti: Ensure same period values for all channels pwm: sti: Fix PWM prescaler handling pwm: sti: Supply Device Tree binding documentation for ST's PWM IP pwm: sti: Add new driver for ST's PWM IP pwm: imx: set can_sleep flag for imx_pwm pwm: lpss: remove dependency on clk framework pwm: pwm-tipwmss: remove unnecessary OOM messages pwm: rockchip: document device tree bindings pwm: add Rockchip SoC PWM support
| * pwm: rockchip: Added to support for RK3288 SoCCaesar Wang2014-08-081-24/+111
| | | | | | | | | | | | | | | | This patch added to support the PWM controller found on RK3288 SoC. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Remove PWM period tableAjit Pal Singh2014-08-081-48/+16
| | | | | | | | | | | | | | | | | | Removes the PWM period table. Instead the prescaler is computed from the period value passed in the config() function. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Sync between enable/disable callsAjit Pal Singh2014-08-081-14/+30
| | | | | | | | | | | | | | | | | | | | ST PWM IP has a common enable/disable control for all the PWM channels on a PWM cell. Disables PWM output on the PWM HW only when disable is called for the last channel. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Ensure same period values for all channelsAjit Pal Singh2014-08-081-44/+96
| | | | | | | | | | | | | | | | | | | | | | ST PWM IP shares the same clock prescaler across all the PWM channels. Hence configuration requests which change the period will affect all the channels. Do not allow period changes which will stomp period settings of the already configured channels. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Fix PWM prescaler handlingAjit Pal Singh2014-08-081-11/+27
| | | | | | | | | | | | | | | | | | This patch fixes the pwm driver to write the complete 8 bits of the prescaler value to the PWM Control register. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Add new driver for ST's PWM IPLee Jones2014-08-073-0/+377
| | | | | | | | | | | | | | | | | | This driver supports all current STi platforms' PWM IPs. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> [thierry.reding: rename module to pwm-sti, fix build breakage] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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