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* Merge tag 'ti-driver-soc-for-v5.19' of ↵Arnd Bergmann2022-05-091-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers TI Driver updates for v5.19 * wkup_m3: io isolation, voltage scaling, vtt regulator and a debug option to stop m3 in suspend. * tisci: support for polled mode for system suspend, reset driver is now enabled for COMPILE_TEST * knav, dma.. misc cleanups for IS_ERR, pm_run_time*, and various other fixups. * tag 'ti-driver-soc-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: soc: ti: wkup_m3_ipc: Add debug option to halt m3 in suspend soc: ti: wkup_m3_ipc: Add support for i2c voltage scaling soc: ti: wkup_m3_ipc: Add support for IO Isolation soc: ti: knav_qmss_queue: Use IS_ERR instead of IS_ERR_OR_NULL when checking knav_queue_open() result soc: ti: pm33xx: using pm_runtime_resume_and_get instead of pm_runtime_get_sync firmware: ti_sci: Switch transport to polled mode during system suspend soc: ti: wkup_m3_ipc: Add support for toggling VTT regulator soc: ti: knav_qmss_queue: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync soc: ti: knav_dma: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync reset: ti-sci: Allow building under COMPILE_TEST soc: ti: ti_sci_pm_domains: Check for null return of devm_kcalloc soc: ti: omap_prm: Use of_device_get_match_data() soc: ti: pruss: using pm_runtime_resume_and_get instead of pm_runtime_get_sync soc: ti: replace usage of found with dedicated list iterator variable soc: ti: wkup_m3_ipc: fix platform_get_irq.cocci warning Link: https://lore.kernel.org/r/20220507163424.pvqnwrxpoo73lmp2@debtless Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * reset: ti-sci: Allow building under COMPILE_TESTPhilipp Zabel2022-04-151-1/+1
| | | | | | | | | | | | | | | | | | | | Since commit 043cfff99a18 ("firmware: ti_sci: Fix compilation failure when CONFIG_TI_SCI_PROTOCOL is not defined") it is possible to build reset-ti-sci under CONFIG_COMPILE_TEST. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220404094500.2708816-1-p.zabel@pengutronix.de
* | Merge tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux into ↵Arnd Bergmann2022-05-055-43/+56
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm/drivers Reset controller updates for v5.19 Add Meson-S4 SoC reset controller support to reset-meson, AST2600 LPC reset controller support to reset-simple, and R9A07G054 USBPHY reset controller support to reset-rzg2l-usbphy-ctrl. Add ACPI _RST support to device_reset(), simplify the uniphier-glue reset driver using bulk API and devres and clean up its dt-bindings docs. Convert most dt-bindings docs from txt to yaml. * tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux: dt-bindings: reset: st,sti-powerdown: Convert to yaml dt-bindings: reset: st,sti-picophyreset: Convert to yaml dt-bindings: reset: socfpga: Convert to yaml dt-bindings: reset: snps,axs10x-reset: Convert to yaml dt-bindings: reset: nuvoton,npcm-reset: Convert to yaml dt-bindings: reset: lantiq,reset: Convert to yaml dt-bindings: reset: bitmain,bm1880-reset: Convert to yaml dt-bindings: reset: berlin: Convert to yaml dt-bindings: reset: ath79: Convert to yaml dt-bindings: reset: amlogic,meson-axg-audio-arb: Convert to yaml dt-bindings: reset: uniphier-glue: Clean up clocks, resets, and their names using compatible string reset: Kconfig: Make RESET_RZG2L_USBPHY_CTRL depend on ARCH_RZG2L reset: ACPI reset support reset: simple: Add AST2600 compatible reset: reset-meson: add support for the Meson-S4 SoC Reset Controller dt-bindings: reset: add bindings for the Meson-S4 SoC Reset Controller dt-bindings: reset: Add compatible for Meson-S4 Reset Controller reset: uniphier-glue: Use devm_add_action_or_reset() reset: uniphier-glue: Use reset_control_bulk API Link: https://lore.kernel.org/r/20220503160057.46625-1-p.zabel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | reset: Kconfig: Make RESET_RZG2L_USBPHY_CTRL depend on ARCH_RZG2LLad Prabhakar2022-05-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USBPHY Control block is identical on Renesas RZ/G2L and RZ/V2L SoC's, so instead of adding dependency for each SoC's add dependency on ARCH_RZG2L. The ARCH_RZG2L config option is already selected by ARCH_R9A07G044 and ARCH_R9A07G054. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20220406071647.14037-1-prabhakar.mahadev-lad.rj@bp.renesas.com
| * | reset: ACPI reset supportKrishna Yarlagadda2022-05-031-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the IO devices like I2C or SPI require reset at runtime to recover from an error condition without changing the power state of the system. Added check for ACPI handle and a call to method '__RST' if supported. Devices using device tree method are unaffected by this. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> [p.zabel@pengutronix.de: wrap in #ifdef CONFIG_ACPI due to missing stubs] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20220307135626.16673-1-kyarlagadda@nvidia.com
| * | reset: simple: Add AST2600 compatibleJoel Stanley2022-05-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to the 2400 and 2500, the LPC controller has some simple reset lines that are used by the UART devices. This is already documented in LPC bindings document. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20220221072650.129348-1-joel@jms.id.au
| * | reset: reset-meson: add support for the Meson-S4 SoC Reset ControllerZelong Dong2022-05-031-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compared to the A1 SoCs the number of RESET registers is different and the offset for the level registers is the same. Add a new compatible string and struct meson_reset_param to add support for the reset controller on the S4 SoC. Signed-off-by: Zelong Dong <zelong.dong@amlogic.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20220107023931.13251-4-zelong.dong@amlogic.com
| * | reset: uniphier-glue: Use devm_add_action_or_reset()Philipp Zabel2022-05-031-26/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Slightly simplify uniphier_glue_reset_probe() and drop uniphier_glue_reset_remove() by using devm_add_action_or_reset() for clock and reset cleanup. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20211215093829.3209416-2-p.zabel@pengutronix.de Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | reset: uniphier-glue: Use reset_control_bulk APIPhilipp Zabel2022-05-031-19/+14
| |/ | | | | | | | | | | | | | | | | | | This driver already uses the clk_bulk API. Simplify the driver by using the reset_control_bulk API as well. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20211215093829.3209416-1-p.zabel@pengutronix.de Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: tegra-bpmp: Restore Handle errors in BPMP responseSameer Pujar2022-04-041-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts following commit 69125b4b9440 ("reset: tegra-bpmp: Revert Handle errors in BPMP response"). The Tegra194 HDA reset failure is fixed by commit d278dc9151a0 ("ALSA: hda/tegra: Fix Tegra194 HDA reset failure"). The temporary revert of original commit c045ceb5a145 ("reset: tegra-bpmp: Handle errors in BPMP response") can be removed now. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/1641995806-15245-1-git-send-email-spujar@nvidia.com
* | reset: renesas: Check return value of reset_control_deassert()Heiner Kallweit2022-04-041-1/+3
|/ | | | | | | | | | Deasserting the reset is vital, therefore bail out in case of error. Suggested-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/b2131908-0110-006b-862f-080517f3e2d8@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* reset: Add Delta TN48M CPLD reset controllerRobert Marko2022-02-253-0/+142
| | | | | | | | | | | | | | | | | | Delta TN48M CPLD exposes resets for the following: * 88F7040 SoC * 88F6820 SoC * 98DX3265 switch MAC-s * 88E1680 PHY-s * 88E1512 PHY * PoE PSE controller Controller supports only self clearing resets. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Link: https://lore.kernel.org/r/20220131133049.77780-5-robert.marko@sartura.hr Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2022-01-103-0/+181
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull RISC-V SoC updates from Arnd Bergmann: "Add support for StarFive JH7100 RISC-V SoC This adds support for the StarFive JH7100, including the necessary device drivers and DT files for the BeagleV Starlight prototype board, with additional boards to be added later. This SoC promises to be the first usable low-cost platform for RISC-V. I've taken this through the SoC tree in the anticipation of adding a few other Arm based SoCs as well, but those did not pass the review in time, so it's only this one" * tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: reset: starfive-jh7100: Fix 32bit compilation RISC-V: Add BeagleV Starlight Beta device tree RISC-V: Add initial StarFive JH7100 device tree serial: 8250_dw: Add StarFive JH7100 quirk dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts pinctrl: starfive: Add pinctrl driver for StarFive SoCs dt-bindings: pinctrl: Add StarFive JH7100 bindings dt-bindings: pinctrl: Add StarFive pinctrl definitions reset: starfive-jh7100: Add StarFive JH7100 reset driver dt-bindings: reset: Add Starfive JH7100 reset bindings dt-bindings: reset: Add StarFive JH7100 reset definitions clk: starfive: Add JH7100 clock generator driver dt-bindings: clock: starfive: Add JH7100 bindings dt-bindings: clock: starfive: Add JH7100 clock definitions dt-bindings: interrupt-controller: Add StarFive JH7100 plic dt-bindings: timer: Add StarFive JH7100 clint RISC-V: Add StarFive SoC Kconfig option
| * reset: starfive-jh7100: Fix 32bit compilationEmil Renner Berthing2021-12-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to include linux/io-64-nonatomic-lo-hi.h or readq/writeq won't be defined when compiling on 32bit architectures: On i386: ../drivers/reset/reset-starfive-jh7100.c: In function ‘jh7100_reset_update’: ../drivers/reset/reset-starfive-jh7100.c:81:10: error: implicit declaration of function ‘readq’; did you mean ‘readl’? [-Werror=implicit-function-declaration] value = readq(reg_assert); ^~~~~ ../drivers/reset/reset-starfive-jh7100.c:86:2: error: implicit declaration of function ‘writeq’; did you mean ‘writel’? [-Werror=implicit-function-declaration] writeq(value, reg_assert); ^~~~~~ On m68k: drivers/reset/reset-starfive-jh7100.c:81:17: error: implicit declaration of function 'readq'; did you mean 'readb'? [-Werror=implicit-function-declaration] drivers/reset/reset-starfive-jh7100.c:86:9: error: implicit declaration of function 'writeq'; did you mean 'writel'? [-Werror=implicit-function-declaration] cc1: all warnings being treated as errors make[3]: *** [scripts/Makefile.build:289: drivers/reset/reset-starfive-jh7100.o] Error 1 make[2]: *** [scripts/Makefile.build:572: drivers/reset] Error 2 make[1]: *** [Makefile:1969: drivers] Error 2 make: *** [Makefile:226: __sub-make] Error 2 Fixes: 0be3a1595bf8 ("reset: starfive-jh7100: Add StarFive JH7100 reset driver") Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20211220121800.760846-1-kernel@esmil.dk' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * reset: starfive-jh7100: Add StarFive JH7100 reset driverEmil Renner Berthing2021-12-163-0/+180
| | | | | | | | | | | | | | Add a driver for the StarFive JH7100 reset controller. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
* | reset: renesas: Fix Runtime PM usageHeiner Kallweit2021-12-151-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | If pm_runtime_resume_and_get() fails then it returns w/o the RPM usage counter being incremented. In this case call pm_runtime_put() in remove() will result in a usage counter imbalance. Therefore check the return code of pm_runtime_resume_and_get() and bail out in case of error. Fixes: bee08559701f ("reset: renesas: Add RZ/G2L usbphy control driver") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/ec24e13f-0530-b091-7a08-864577b9b3be@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: tegra-bpmp: Revert Handle errors in BPMP responseJon Hunter2021-11-171-8/+1
|/ | | | | | | | | | | | | | Commit c045ceb5a145 ("reset: tegra-bpmp: Handle errors in BPMP response") fixed an issue in the Tegra BPMP error handling but has exposed an issue in the Tegra194 HDA driver and now resetting the Tegra194 HDA controller is failing. For now revert the commit c045ceb5a145 ("reset: tegra-bpmp: Handle errors in BPMP response") while a fix for the Tegra HDA driver is created. Fixes: c045ceb5a145 ("reset: tegra-bpmp: Handle errors in BPMP response") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20211112112712.21587-1-jonathanh@nvidia.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'drivers-5.16' of ↵Linus Torvalds2021-11-044-10/+65
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "These are all the driver updates for SoC specific drivers. There are a couple of subsystems with individual maintainers picking up their patches here: - The reset controller subsystem add support for a few new SoC variants to existing drivers, along with other minor improvements - The OP-TEE subsystem gets a driver for the ARM FF-A transport - The memory controller subsystem has improvements for Tegra, Mediatek, Renesas, Freescale and Broadcom specific drivers. - The tegra cpuidle driver changes get merged through this tree this time. There are only minor changes, but they depend on other tegra driver updates here. - The ep93xx platform finally moves to using the drivers/clk/ subsystem, moving the code out of arch/arm in the process. This depends on a small sound driver change that is included here as well. - There are some minor updates for Qualcomm and Tegra specific firmware drivers. The other driver updates are mainly for drivers/soc, which contains a mixture of vendor specific drivers that don't really fit elsewhere: - Mediatek drivers gain more support for MT8192, with new support for hw-mutex and mmsys routing, plus support for reset lines in the mmsys driver. - Qualcomm gains a new "sleep stats" driver, and support for the "Generic Packet Router" in the APR driver. - There is a new user interface for routing the UARTS on ASpeed BMCs, something that apparently nobody else has needed so far. - More drivers can now be built as loadable modules, in particular for Broadcom and Samsung platforms. - Lots of improvements to the TI sysc driver for better suspend/resume support" Finally, there are lots of minor cleanups and new device IDs for amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape, allwinner, broadcom, and omap" * tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits) optee: Fix spelling mistake "reclain" -> "reclaim" Revert "firmware: qcom: scm: Add support for MC boot address API" qcom: spm: allow compile-testing firmware: arm_ffa: Remove unused 'compat_version' variable soc: samsung: exynos-chipid: add exynosautov9 SoC support firmware: qcom: scm: Don't break compile test on non-ARM platforms soc: qcom: smp2p: Add of_node_put() before goto soc: qcom: apr: Add of_node_put() before return soc: qcom: qcom_stats: Fix client votes offset soc: qcom: rpmhpd: fix sm8350_mxc's peer domain dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226 firmware: qcom: scm: Add support for MC boot address API soc: qcom: spm: Add 8916 SPM register data dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu soc: qcom: socinfo: Add PM8150C and SMB2351 models firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available() soc: aspeed: Add UART routing support soc: fsl: dpio: rename the enqueue descriptor variable soc: fsl: dpio: use an explicit NULL instead of 0 ...
| * reset: mchp: sparx5: Extend support for lan966xHoratiu Vultur2021-10-182-9/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends sparx5 driver to support also the lan966x. The process to reset the switch is the same only it has different offsets. Therefore make the driver more generic and add support for lan966x. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20211018091522.1113510-3-horatiu.vultur@microchip.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: uniphier: Add NX1 reset supportKunihiko Hayashi2021-10-052-0/+29
| | | | | | | | | | | | | | | | | | Add basic reset data for UniPhier NX1 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1633399842-1402-4-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: uniphier: Add audio system and video input reset control for PXs3Kunihiko Hayashi2021-10-051-0/+2
| | | | | | | | | | | | | | | | | | Add reset lines for audio subsystem (AIO) and video input subsystem (EXIV) on UniPhier PXs3 SoC. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1633399842-1402-2-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: Allow building Broadcom STB RESCAL as moduleFlorian Fainelli2021-10-051-1/+1
| | | | | | | | | | | | | | | | The driver can be built as a module and uses device managed resources. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210924030840.9650-1-f.fainelli@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: socfpga: add empty driver allowing consumers to probePaweł Anikiel2021-10-051-0/+26
| | | | | | | | | | | | | | | | | | | | The early reset driver doesn't ever probe, which causes consuming devices to be unable to probe. Add an empty driver to set this device as available, allowing consumers to probe. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Link: https://lore.kernel.org/r/20210920124141.1166544-4-pan@semihalf.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: tegra-bpmp: Handle errors in BPMP responseMikko Perttunen2021-10-051-1/+8
| | | | | | | | | | | | | | | | | | | | | | The return value from tegra_bpmp_transfer indicates the success or failure of the IPC transaction with BPMP. If the transaction succeeded, we also need to check the actual command's result code. Add code to do this. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://lore.kernel.org/r/20210915085517.1669675-2-mperttunen@nvidia.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: pistachio: Re-enable driver selectionGeert Uytterhoeven2021-10-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the retirement of MACH_PISTACHIO, the Pistachio Reset Driver is no longer auto-enabled when building a kernel for Pistachio systems. Worse, the driver cannot be enabled by the user at all (unless compile-testing), as the config symbol is invisible. Fix this partially by making the symbol visible again when compiling for MIPS, and dropping the useless default. The user still has to enable the driver manually when building a kernel for Pistachio systems, though. Fixes: 104f942b2832ab13 ("MIPS: Retire MACH_PISTACHIO") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rahul Bedarkar <rahulbedarkar89@gmail.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Link: https://lore.kernel.org/r/2c399e52540536df9c4006e46ef93fbccdde88db.1631610825.git.geert+renesas@glider.be Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: brcmstb-rescal: fix incorrect polarity of status bitJim Quinlan2021-10-051-1/+1
|/ | | | | | | | | | | The readl_poll_timeout() should complete when the status bit is a 1, not 0. Fixes: 4cf176e52397 ("reset: Add Broadcom STB RESCAL reset controller") Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210914221122.62315-1-f.fainelli@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'drivers-5.15' of ↵Linus Torvalds2021-09-024-12/+234
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "These are updates for drivers that are tied to a particular SoC, including the correspondig device tree bindings: - A couple of reset controller changes for unisoc, uniphier, renesas and zte platforms - memory controller driver fixes for omap and tegra - Rockchip io domain driver updates - Lots of updates for qualcomm platforms, mostly touching their firmware and power management drivers - Tegra FUSE and firmware driver updateѕ - Support for virtio transports in the SCMI firmware framework - cleanup of ixp4xx drivers, towards enabling multiplatform support and bringing it up to date with modern platforms - Minor updates for keystone, mediatek, omap, renesas" * tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits) reset: simple: remove ZTE details in Kconfig help soc: rockchip: io-domain: Remove unneeded semicolon soc: rockchip: io-domain: add rk3568 support dt-bindings: power: add rk3568-pmu-io-domain support bus: ixp4xx: return on error in ixp4xx_exp_probe() soc: renesas: Prefer memcpy() over strcpy() firmware: tegra: Stop using seq_get_buf() soc/tegra: fuse: Enable fuse clock on suspend for Tegra124 soc/tegra: fuse: Add runtime PM support soc/tegra: fuse: Clear fuse->clk on driver probe failure soc/tegra: pmc: Prevent racing with cpuilde driver soc/tegra: bpmp: Remove unused including <linux/version.h> dt-bindings: soc: ti: pruss: Add dma-coherent property soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs firmware: arm_scmi: Use WARN_ON() to check configured transports firmware: arm_scmi: Fix boolconv.cocci warnings soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing soc: mediatek: mmsys: add MT8365 support ...
| * reset: simple: remove ZTE details in Kconfig helpPeter Robinson2021-08-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | The ZTE platform support in the simple reset driver has been removed but the comment in the help wasn't removed so clean this up too. Fixes: 89d4f98ae90d ("ARM: remove zte zx platform") Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210821094528.294579-1-pbrobinson@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: renesas: Add RZ/G2L usbphy control driverBiju Das2021-07-273-0/+183
| | | | | | | | | | | | | | | | | | | | Add support for RZ/G2L USBPHY Control driver. It mainly controls reset and power down of the USB/PHY. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210719121938.6532-5-biju.das.jz@bp.renesas.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: qcom: Add PDC Global reset signals for WPSSSibi Sankar2021-07-211-11/+51
| | | | | | | | | | | | | | | | | | | | | | Add PDC Global reset signals for Wireless Processor Subsystem (WPSS) on SC7280 SoCs. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/1619693465-5724-5-git-send-email-sibis@codeaurora.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: reset-zynqmp: Fixed the argument data typeSai Krishna Potthuri2021-08-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | This patch changes the data type of the variable 'val' from int to u32. Addresses-Coverity: argument of type "int *" is incompatible with parameter of type "u32 *" Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/925cebbe4eb73c7d0a536da204748d33c7100d8c.1624448778.git.michal.simek@xilinx.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: RESET_MCHP_SPARX5 should depend on ARCH_SPARX5Geert Uytterhoeven2021-07-211-1/+1
|/ | | | | | | | | | | | The Microchip Sparx5 switch reset block is only present on Microchip Sparx5 SoCs. Hence add a dependency on ARCH_SPARX5, to prevent asking the user about this driver when configuring a kernel without Sparx5 support. Fixes: 453ed4283bebd077 ("reset: mchp: sparx5: add switch reset driver") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/6e08f6f46123d0712397e901716b48f13fa5dc48.1624627657.git.geert@linux-m68k.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'arm-drivers-5.14' of ↵Linus Torvalds2021-07-1015-27/+196
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Olof Johansson: - Reset controllers: Adding support for Microchip Sparx5 Switch. - Memory controllers: ARM Primecell PL35x SMC memory controller driver cleanups and improvements. - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN. - Rockchip: RK3568 power domains support + DT binding updates, cleanups. - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details, including support for MSM8226, MDM9607, SM6125 and SC8180X. - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management interfaces and communication (including bus model) between partitions both in Normal and Secure Worlds. - Tegra Memory controller changes, including major rework to deal with identity mappings at boot and integration with ARM SMMU pieces. * tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits) firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string firmware: turris-mox-rwtm: show message about HWRNG registration firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng firmware: turris-mox-rwtm: report failures better firmware: turris-mox-rwtm: fix reply status decoding function soc: imx: gpcv2: add support for i.MX8MN power domains dt-bindings: add defines for i.MX8MN power domains firmware: tegra: bpmp: Fix Tegra234-only builds iommu/arm-smmu: Use Tegra implementation on Tegra186 iommu/arm-smmu: tegra: Implement SID override programming iommu/arm-smmu: tegra: Detect number of instances at runtime dt-bindings: arm-smmu: Add Tegra186 compatible string firmware: qcom_scm: Add MDM9607 compatible soc: qcom: rpmpd: Add MDM9607 RPM Power Domains soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml memory: emif: remove unused frequency and voltage notifiers memory: fsl_ifc: fix leak of private memory on probe failure memory: fsl_ifc: fix leak of IO mapping on probe failure ...
| * reset: berlin: support module buildJisheng Zhang2021-06-072-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | Make reset-berlin driver to be tristate module, support to build as a module, this is useful for GKI. Partially reverts commit ed4dba99cae8 ("reset: berlin: make it explicitly non-modular") Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20210607181015.5b8d3711@xhacker.debian Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: bail if try_module_get() failsPhilipp Zabel2021-06-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | Abort instead of returning a new reset control for a reset controller device that is going to have its module unloaded. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Fixes: 61fc41317666 ("reset: Add reset controller API") Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20210607082615.15160-1-p.zabel@pengutronix.de Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: mchp: sparx5: fix return value check in mchp_sparx5_map_io()Wei Yongjun2021-06-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function devm_platform_get_and_ioremap_resource() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: 453ed4283beb ("reset: mchp: sparx5: add switch reset driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20210519141638.3052456-1-weiyongjun1@huawei.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: lantiq: use devm_reset_controller_register()Yang Yingliang2021-06-071-1/+1
| | | | | | | | | | | | | | | | | | Use devm_reset_controller_register() for the reset controller registration. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210517032648.2969609-1-yangyingliang@huawei.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: hi6220: Use the correct HiSilicon copyrightHao Fang2021-06-071-1/+1
| | | | | | | | | | | | | | | | | | | | s/Hisilicon/HiSilicon/g. It should use capital S, according to https://www.hisilicon.com/en/terms-of-use. Signed-off-by: Hao Fang <fanghao11@huawei.com> Link: https://lore.kernel.org/r/1617087044-19572-1-git-send-email-fanghao11@huawei.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: brcmstb: Add missing MODULE_DEVICE_TABLEZou Wei2021-05-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: 77750bc089e4 ("reset: Add Broadcom STB SW_INIT reset controller driver") Signed-off-by: Zou Wei <zou_wei@huawei.com> Link: https://lore.kernel.org/r/1620789283-15048-1-git-send-email-zou_wei@huawei.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: a10sr: add missing of_match_table referenceKrzysztof Kozlowski2021-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver defined of_device_id table but did not use it with of_match_table. This prevents usual matching via devicetree and causes a W=1 warning: drivers/reset/reset-a10sr.c:111:34: warning: ‘a10sr_reset_of_match’ defined but not used [-Wunused-const-variable=] Reported-by: kernel test robot <lkp@intel.com> Fixes: 627006820268 ("reset: Add Altera Arria10 SR Reset Controller") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210507112803.20012-1-krzysztof.kozlowski@canonical.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: RESET_INTEL_GW should depend on X86Geert Uytterhoeven2021-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | The Intel Gateway reset controller is only present on Intel Gateway platforms. Hence add a dependency on X86, to prevent asking the user about this driver when configuring a kernel without Intel Gateway support. Fixes: c9aef213e38cde27 ("reset: intel: Add system reset controller driver") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: RESET_BRCMSTB_RESCAL should depend on ARCH_BRCMSTBGeert Uytterhoeven2021-05-101-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Broadcom STB RESCAL reset controller is only present on Broadcom BCM7216 platforms. Hence add a dependency on ARCH_BRCMSTB, to prevent asking the user about this driver when configuring a kernel without BCM7216 support. Also, merely enabling CONFIG_COMPILE_TEST should not enable additional code, and thus should not enable this driver by default. Fixes: 4cf176e52397853e ("reset: Add Broadcom STB RESCAL reset controller") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: uniphier: enclose UNIPHIER_RESET_ID_END value in parenthesesPhilipp Zabel2021-05-101-1/+1
| | | | | | | | | | | | | | | | | | | | Fixes a checkpatch error: ERROR: Macros with complex values should be enclosed in parentheses #23: FILE: drivers/reset/reset-uniphier.c:23: +#define UNIPHIER_RESET_ID_END (unsigned int)(-1) Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: sti/syscfg: replace comma with semicolonPhilipp Zabel2021-05-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | Fixes a checkpatch warning: WARNING: Possible comma where semicolon could be used #156: FILE: drivers/reset/sti/reset-syscfg.c:156: + rc->rst.ops = &syscfg_reset_ops, + rc->rst.of_node = dev->of_node; Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: ti-syscon: fix to_ti_syscon_reset_data macroPhilipp Zabel2021-05-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The to_ti_syscon_reset_data macro currently only works if the parameter passed into it is called 'rcdev'. Fixes a checkpatch --strict issue: CHECK: Macro argument reuse 'rcdev' - possible side-effects? #53: FILE: drivers/reset/reset-ti-syscon.c:53: +#define to_ti_syscon_reset_data(rcdev) \ + container_of(rcdev, struct ti_syscon_reset_data, rcdev) Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: berlin: replace unsigned with unsigned intPhilipp Zabel2021-05-101-1/+1
| | | | | | | | | | | | | | | | | | | | Fixes a checkpatch warning: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' #55: FILE: drivers/reset/reset-berlin.c:55: + unsigned offset, bit; Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: whitespace fixesPhilipp Zabel2021-05-101-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes checkpatch issues: CHECK: Alignment should match open parenthesis #87: FILE: drivers/reset/core.c:87: +static int of_reset_simple_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) CHECK: Lines should not end with a '(' #540: FILE: drivers/reset/core.c:540: +static struct reset_control *__reset_control_get_internal( CHECK: Alignment should match open parenthesis #603: FILE: drivers/reset/core.c:603: +struct reset_control *__of_reset_control_get(struct device_node *node, + const char *id, int index, bool shared, CHECK: Alignment should match open parenthesis #781: FILE: drivers/reset/core.c:781: +struct reset_control *__devm_reset_control_get(struct device *dev, + const char *id, int index, bool shared, Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: mchp: sparx5: add switch reset driverSteen Hegelund2021-05-103-0/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Sparx5 Switch SoC has a number of components that can be reset indiviually, but at least the Switch Core needs to be in a well defined state at power on, when any of the Sparx5 drivers starts to access the Switch Core, this reset driver is available. The reset driver is loaded early via the postcore_initcall interface, and will then be available for the other Sparx5 drivers (SGPIO, SwitchDev etc) that are loaded next, and the first of them to be loaded can perform the one-time Switch Core reset that is needed. The driver has protection so that the system busses, DDR controller, PCI-E and ARM A53 CPU and a few other subsystems are not touched by the reset. Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: oxnas: replace file name with short descriptionPhilipp Zabel2021-05-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | Fixes a checkpatch warning: WARNING: It's generally not useful to have the filename in the file #3: FILE: drivers/reset/reset-oxnas.c:3: + * drivers/reset/reset-oxnas.c Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
| * reset: zynqmp: replace spaces with tabsPhilipp Zabel2021-05-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes checkpatch issues: ERROR: code indent should use tabs where possible #86: FILE: drivers/reset/reset-zynqmp.c:86: + .reset_id = 0,$ WARNING: please, no spaces at the start of a line #86: FILE: drivers/reset/reset-zynqmp.c:86: + .reset_id = 0,$ ERROR: code indent should use tabs where possible #87: FILE: drivers/reset/reset-zynqmp.c:87: + .num_resets = VERSAL_NR_RESETS,$ WARNING: please, no spaces at the start of a line #87: FILE: drivers/reset/reset-zynqmp.c:87: + .num_resets = VERSAL_NR_RESETS,$ Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 10:31:54 +0100