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2012-11-29video: exynos_dp: Fix incorrect setting for INT_CTLAjay Kumar2-2/+3
INT_CTL register contains bits INT_POL0 and INT_POL1, and not INT_POL. This patch fixes the wrong register setting for INT_CTL. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Reset and initialize DP before requesting irqAjay Kumar1-7/+7
If DP is not reset properly before kernel bootup(in bootloader code), there can be few pending interrupts, and sometimes they invoke DP irq handler as soon as the irq handler is registered in DP probe. So, we make the DP driver more robust by resetting and initializing DP at the earliest and then registering the irq handler. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Enable hotplug interruptsSean Paul3-14/+71
Enable hotplug interrupts and move the hotplug scheduling into the interrupt handler. This allows us to introduce a screen at any time while we're running. [jg1.han@samsung.com: moved the bit masking of hotplug interrupts] Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Move hotplug into a workqueueSean Paul2-44/+51
Move the hotplug related code from probe and resume into a workqueue. This allows us to initialize the DP driver (and resume it) when there is no monitor connected. Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Remove sink control to D0Sean Paul1-6/+0
According to DP spec, it is not required in the Link Training procedure. [jg1.han@samsung.com: modified the commit message] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Fix bug when checking dp->irqSean Paul1-1/+1
Fix a bug where we check !dp->irq instead of the correct check for -ENXIO. Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Improve EDID error handlingSean Paul2-13/+14
EDID error handling has 2 problems: - It doesn't fail as early as it can - The retry counts for i2c and aux transactions are huge This patch fails if the initial i2c transaction fails, and reduces the aux and i2c retry counts down to 3. [jg1.han@samsung.com: reduced the retry count of exynos_dp_read_byte_from_dpcd()] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Get pll lock before pattern setSean Paul1-1/+13
According to the exynos datasheet (Figure 49-10), we should wait for PLL lock before programming the training pattern when doing software eDP link training. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Clean up SW link trainingSean Paul1-173/+119
Clean up some of the SW training code to make it more clear and reduce duplicate code. [jg1.han@samsung.com: used exynos_dp_write_bytes_to_dpcd()] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
2012-11-29video: exynos_dp: Check DPCD return codesSean Paul1-30/+56
Add return code checks to the DPCD transactions in the SW link training Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>