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* soc: mtk-pmic-wrap: avoid integer overflow warningArnd Bergmann2016-05-191-3/+3
| | | | | | | | | | | | | | | | | | | | On ARM64, the mtk-pmic-wrap driver causes a harmless warning: mtk-pmic-wrap.c:1062:16: warning: large integer implicitly truncated to unsigned type [-Woverflow] mtk-pmic-wrap.c:1074:16: warning: large integer implicitly truncated to unsigned type [-Woverflow] mtk-pmic-wrap.c:1086:16: warning: large integer implicitly truncated to unsigned type [-Woverflow] .int_en_all = ~(BIT(31) | BIT(1)), The problem is that the result of the BIT() macro is an 'unsigned long', so taking the bitwise NOT operation of that results in an integer with the upper 32 bits all set and that cannot be assigned to a 'u32' variable without loss of information. This is harmless because we were never interested in the upper bits here anyway, so we can shut up the warning by adding a simple cast to 'u32'. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2016-05-181-131/+413
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs, these contain various things that touch the drivers/ directory but got merged through arm-soc for practical reasons. For the most part, this is now related to power management controllers, which have not yet been abstracted into a separate subsystem, and typically require some code in drivers/soc or arch/arm to control the power domains. Another large chunk here is a rework of the NVIDIA Tegra USB3.0 support, which was surprisingly tricky and took a long time to get done. Finally, reset controller handling as always gets merged through here as well" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits) arm-ccn: Enable building as module soc/tegra: pmc: Add generic PM domain support usb: xhci: tegra: Add Tegra210 support usb: xhci: Add NVIDIA Tegra XUSB controller driver dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding PCI: tegra: Support per-lane PHYs dt-bindings: pci: tegra: Update for per-lane PHYs phy: tegra: Add Tegra210 support phy: Add Tegra XUSB pad controller support dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding phy: core: Allow children node to be overridden clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs drivers: firmware: psci: make two helper functions inline soc: renesas: rcar-sysc: Add support for R-Car H3 power areas soc: renesas: rcar-sysc: Add support for R-Car E2 power areas soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas soc: renesas: rcar-sysc: Add support for R-Car H2 power areas ...
| * soc: mediatek: PMIC wrap: add MT2701/7623 supportJohn Crispin2016-04-201-0/+154
| | | | | | | | | | | | | | | | Add the registers, callbacks and data structures required to make the wrapper work on MT2701 and MT7623. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: add mt6323 slave supportJohn Crispin2016-04-201-0/+43
| | | | | | | | | | | | | | | | Add support for MT6323 slaves. This PMIC can be found on MT2701 and MT7623 EVB. The only function that we need to touch is pwrap_init_cipher(). Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: add a slave specific structJohn Crispin2016-04-201-47/+112
| | | | | | | | | | | | | | | | | | This patch adds a new struct pwrap_slv_type that we use to store the slave specific data. The patch adds 2 new helper functions to access the dew registers. The slave type is looked up via the wrappers child node. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()John Crispin2016-04-201-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With more SoCs being added the list of helper functions like these would grow. To mitigate this problem we remove the existing helpers and change the code to test against the pmic type stored inside the pmic specific datastructure that our context structure points at. There is one usage of pwrap_is_mt8135() that is ambiguous as the test should not be dependent on mt8135, but rather on the existence of a bridge. Add a new element to pmic_wrapper_type to indicate if a bridge is present and use this where appropriate. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type structJohn Crispin2016-04-201-4/+5
| | | | | | | | | | | | | | | | | | Different SoCs will use different bitmask for the wdt_src. This patch defines the bitmask in the pmic_wrapper_type struct. This allows us to support new SoCs with a different bitmask to the one currently used. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: SPI_WRITE needs a different bitmask for MT2701/7623John Crispin2016-04-201-4/+7
| | | | | | | | | | | | | | | | | | Different SoCs will use different bitmask for the SPI_WRITE command. This patch defines the bitmask in the pmic_wrapper_type struct. This allows us to support new SoCs with a different bitmask to the one currently used. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623John Crispin2016-04-201-1/+4
| | | | | | | | | | | | | | MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: split SoC specific init into callbackJohn Crispin2016-04-201-25/+42
| | | | | | | | | | | | | | | | | | | | | | | | This patch moves the SoC specific wrapper init code into separate callback to avoid pwrap_init() getting too large. This is done by adding a new element called init_special to pmic_wrapper_type. Each currently supported SoC gets its own version of the callback and we copy the code that was previously inside pwrap_init() to these new callbacks. Finally we point the 2 instances of pmic_wrapper_type at the 2 new functions. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clockJohn Crispin2016-04-201-32/+38
| | | | | | | | | | | | | | | | Split init_reg_clock up into SoC specific callbacks. The patch also reorders the code to avoid the need for callback function prototypes. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: PMIC wrap: don't duplicate the wrapper dataJohn Crispin2016-04-201-14/+8
| | | | | | | | | | | | | | | | | | As we add support for more devices struct pmic_wrapper_type will grow and we do not really want to start duplicating all the elements in struct pmic_wrapper. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | Revert "soc: mediatek: SCPSYS: Fix double enabling of regulators"James Liao2016-04-131-5/+6
|/ | | | | | | | | | | | | | | This reverts commit cc8ed76938b5cf6a54ab3d60edabaf808dc960d1 ("soc: mediatek: SCPSYS: Fix double enabling of regulators") [1]. This patch fixes mt8173-evb failing boot issue. With commit [1], genpd state will not sync to real power domain state. So some resources such as clocks and regulators may stay in a wrong state. There is no regulator double enabling issue on mainline kernel, so we can refert commit [1] safely. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: SCPSYS: Fix double enabling of regulatorsSascha Hauer2016-02-011-6/+5
| | | | | | | | | | | | | With CONFIG_PM enabled do not call genpd->power_on manually as this will cause the regulators being turned on once in SCPSYS probe and then again when the genpd core turns on the domains. Instead, call genpd->power_on only with CONFIG_PM disabled and tell the genpd core that the domains are disabled when registered. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: SCPSYS: use builtin_platform_driverMatthias Brugger2016-01-251-28/+21
| | | | | | | | | | | | | | | SCPSYS can't be built as module. Use builtin_platform_driver instead. For this probe must not be __init and the data accessed can't be __initconst. Remove this macros. To make the impact as small as possible, fold scp_domain_data into scp_domain via a pointer. Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Arnd Bergmann <arnd@arndb.de> Reported-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Tested-by: Daniel Kurtz <djkurtz@chromium.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* soc: mediatek: PMIC wrap: clear the STAUPD_TRIG bit of WDT_SRC_ENHenry Chen2016-01-251-2/+17
| | | | | | | | | Since STAUPD interrupts aren't handled on mt8173, disable watchdog timeout monitor of STAUPD to avoid WDT_INT triggered by STAUPD. Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: PMIC wrap: Clear the vldclr if state machine stay on ↵Henry Chen2016-01-251-2/+20
| | | | | | | | | | | | | | | | | FSM_VLDCLR state. Sometimes PMIC is too busy to send data in time to cause pmic wrap timeout, because pmic wrap is waiting for FSM_VLDCLR after finishing WACS2_CMD. It just return error when issue happened, so the state machine will stay on FSM_VLDCLR state when data send back later by PMIC and timeout again in next time because pmic wrap waiting for FSM_IDLE state at the beginning of the read/write function. Clear the vldclr when timeout if state machine stay on FSM_VLDCLR. Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Tested-by: Ricky Liang <jcliang@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* Merge tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek into ↵Olof Johansson2015-12-221-3/+29
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | next/drivers Change the scpsys to builtin_platform_driver_probe. Add regulator support for scpsys driver. * tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek: drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular soc: mediatek: SCPSYS: Add regulator support Signed-off-by: Olof Johansson <olof@lixom.net>
| * drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modularPaul Gortmaker2015-12-181-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig currently controlling compilation of this code is: drivers/soc/mediatek/Kconfig:config MTK_SCPSYS drivers/soc/mediatek/Kconfig: bool "MediaTek SCPSYS Support" ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modularity so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Daniel Kurtz <djkurtz@chromium.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Olof Johansson <olof@lixom.net> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * soc: mediatek: SCPSYS: Add regulator supportSascha Hauer2015-12-181-0/+27
| | | | | | | | | | | | | | | | | | The power domains are supplied by regulators. Add support for them so that the regulators are properly turned on before a domain is powered up and turned off when a domain is powered down. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: Mediatek: Enable SCPSYS power domain driver by defaultEddie Huang2015-11-241-0/+1
|/ | | | | | | | | If enable Mediatek 8173 SoC, it should also enable power domain driver. Otherwise access clk subsystem register will fail. Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
* soc: mediatek: Fix random hang up issue while kernel initJames Liao2015-10-141-23/+44
| | | | | | | | | | | | | | | | In kernel late init, it turns off all unused clocks, which needs to access subsystem registers such as VENC and VENC_LT. Accessing MT8173 VENC registers needs two top clocks, mm_sel and venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel. So we need to keep these clocks on before accessing their registers. This patch keeps venc_sel / venclt_sel clock on when VENC / VENC_LT's power is on, to prevent system hang up while accessing its registeres. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add scpsys support active_wakeupEddie Huang2015-09-271-0/+16
| | | | | | | | | | | | Register gpd_dev_ops.active_wakeup function to support keep power during suspend state. And add flag to each power domain to decide whether keep power during suspend or not. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: Move the initial setting of pmic wrap interrupt before ↵Henry Chen2015-09-271-4/+6
| | | | | | | | | | | | | requesting irq. The watchdog may not be initialized by the bootloader, even if the rest of the pwrap is. Move the watchdog initialization out of pwrap_init() to make sure the watchdog is always initialized and not only when the pwrap is uninitialized. Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: Fix SCPSYS compilationMatthias Brugger2015-08-051-0/+1
| | | | | | | | | | | SCPSYS driver misses the module.h include which makes it fail when compiling with allmodconf. This patch fixes this. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* soc: mediatek: Drop owner assignment from platform_driverKrzysztof Kozlowski2015-07-101-1/+0
| | | | | | | | | platform_driver does not need to set an owner because platform_driver_register() will set it. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: Mediatek: Add SCPSYS power domain driverSascha Hauer2015-07-063-0/+498
| | | | | | | | | | | | | | | | | | | This adds a power domain driver for the Mediatek SCPSYS unit. The System Control Processor System (SCPSYS) has several power management related tasks in the system. The tasks include thermal measurement, dynamic voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control. The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power domain control. For now this driver only adds power domain support, the more advanced features are not yet supported. The driver implements the generic PM domain device tree bindings, the first user will most likely be the Mediatek AFE audio driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: Add infracfg misc driver supportSascha Hauer2015-07-063-0/+101
| | | | | | | | | | | This adds support for some miscellaneous bits of the infracfg controller. The mtk_infracfg_set/clear_bus_protection functions are necessary for the scpsys power domain driver to handle the bus protection bits which are contained in the infacfg register space. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: Add compile dependency to pmic-wrapperMatthias Brugger2015-05-271-0/+1
| | | | | | | | | | | The pmic-wrapper calls the reset controller. If CONFIG_RESET_CONTROLLER is not set, compilation fails with: drivers/soc/mediatek/mtk-pmic-wrap.c: In function ‘pwrap_probe’: drivers/soc/mediatek/mtk-pmic-wrap.c:836:2: error: implicit declaration of function ‘devm_reset_control_get’ [-Werror=implicit-function-declaration] This patch sets the dependency in the Kconfig file. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: PMIC wrap: Fix register state machine handlingSascha Hauer2015-05-271-10/+2
| | | | | | | | | | | | | | | When the PMIC wrapper state machine has read a register it goes into the "wait for valid clear" (vldclr) state. The state machine stays in this state until the VLDCLR bit is written to. We should write this bit after reading a register because the SCPSYS won't let the system go into suspend as long as the state machine waits for valid clear. Since now we never leave the state machine in vldclr state we no longer have to check for this state on pwrap_read/pwrap_write entry and can remove the corresponding code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: PMIC wrap: Fix clock rate handlingSascha Hauer2015-05-271-35/+7
| | | | | | | | | | | | | | | replace chipselect extension values based on SPI clock with hardcoded SoC specific values. The PMIC wrapper has the ability of extending the chipselects by configurable amounts of time. We configured the values based on the rate of SPI clock, but this is wrong. The delays should be configured based on the internal PMIC clock that latches the values from the SPI bus to the internal PMIC registers. By default this clock is 24MHz. Other clock frequencies are for debugging only and can be removed from the driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc/mediatek: Remove unused variablesThierry Reding2015-04-131-2/+0
| | | | | | | | The PMIC wrapper driver adds a couple of variables that are never used. Remove them to avoid build warnings. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: Add PMIC wrapper for MT8135 and MT8173 SoCsFlora Fu2015-03-303-0/+989
This adds support for the PMIC wrapper found on MediaTek MT8135 and MT8173 SoCs. The PMIC wrapper is found on MT6xxx SoCs aswell but these are currently not supported. On MediaTek MT8135, MT8173 and other SoCs the PMIC is connected via SPI. The SPI master interface is not directly visible to the CPU, but only through the PMIC wrapper inside the SoC. The communication between the SoC and the PMIC can optionally be encrypted. Also a non standard Dual IO SPI mode can be used to increase speed. The MT8135 also supports a special feature named "IP Pairing". With IP Pairing the pins of some SoC internal peripherals can be on the PMIC. The signals of these pins are routed over the SPI bus using the pwrap bridge. Because of these optional non SPI conform features the PMIC driver is not implemented as a SPI bus master driver. Signed-off-by: Flora Fu, MediaTek Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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