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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner2019-05-301-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'dmaengine-5.2-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2019-05-091-6/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: - Updates to stm32 dma residue calculations - Interleave dma capability to axi-dmac and support for ZynqMP arch - Rework of channel assignment for rcar dma - Debugfs for pl330 driver - Support for Tegra186/Tegra194, refactoring for new chips and support for pause/resume - Updates to axi-dmac, bcm2835, fsl-edma, idma64, imx-sdma, rcar-dmac, stm32-dma etc - dev_get_drvdata() updates on few drivers * tag 'dmaengine-5.2-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (34 commits) dmaengine: tegra210-adma: restore channel status dmaengine: tegra210-dma: free dma controller in remove() dmaengine: tegra210-adma: add pause/resume support dmaengine: tegra210-adma: add support for Tegra186/Tegra194 Documentation: DT: Add compatibility binding for Tegra186 dmaengine: tegra210-adma: prepare for supporting newer Tegra chips dmaengine: at_xdmac: remove a stray bottom half unlock dmaengine: fsl-edma: Adjust indentation dmaengine: fsl-edma: Fix typo in Vybrid name dmaengine: stm32-dma: fix residue calculation in stm32-dma dmaengine: nbpfaxi: Use dev_get_drvdata() dmaengine: bcm-sba-raid: Use dev_get_drvdata() dmaengine: stm32-dma: Fix unsigned variable compared with zero dmaengine: stm32-dma: use platform_get_irq() dmaengine: rcar-dmac: Update copyright information dmaengine: imx-sdma: Only check ratio on parts that support 1:1 dmaengine: xgene-dma: fix spelling mistake "descripto" -> "descriptor" dmaengine: idma64: Move driver name to the header dmaengine: bcm2835: Drop duplicate capability setting. dmaengine: pl330: _stop: clear interrupt status ...
| * dmaengine: idma64: Use actual device for DMA transfersAndy Shevchenko2019-03-211-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel IOMMU, when enabled, tries to find the domain of the device, assuming it's a PCI one, during DMA operations, such as mapping or unmapping. Since we are splitting the actual PCI device to couple of children via MFD framework (see drivers/mfd/intel-lpss.c for details), the DMA device appears to be a platform one, and thus not an actual one that performs DMA. In a such situation IOMMU can't find or allocate a proper domain for its operations. As a result, all DMA operations are failed. In order to fix this, supply parent of the platform device to the DMA engine framework and fix filter functions accordingly. We may rely on the fact that parent is a real PCI device, because no other configuration is present in the wild. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> [for tty parts] Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | Merge branch 'spi-5.2' into spi-nextMark Brown2019-05-021-10/+20
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| * | spi: pxa2xx: Add support for Intel Comet LakeEvan Green2019-05-021-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add PCI IDs for SPI on Comet Lake. Signed-off-by: Evan Green <evgreen@chromium.org> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xx: use a module softdep for dw_dmacFlavio Suligoi2019-05-021-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | With dw_dmac, sometimes the request of a DMA channel fails because the DMA driver is not ready, so an explicit dependency request is necessary. Signed-off-by: Flavio Suligoi <f.suligoi@asem.it> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xxx: change "no DMA channels..." msg from debug to warningFlavio Suligoi2019-04-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the type of the diagnostic message: "no DMA channels available, using PIO" from debug to warning. The lack of an available DMA channel is very important regard the spi-pxa2xx performance. The transfer speed can be reduced more than 50%. So it is very important to warn the user about this, without enabling the full SPI debug with CONFIG_SPI_DEBUG. Moreover, enabling the full SPI debug only to enable this specific debug message, the dmesg buffer fills quickly with a lot of repetitive information during the SPI data transfer. This cause the loss of all the first important messages written during the initialization. Signed-off-by: Flavio Suligoi <f.suligoi@asem.it> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xx: Unify remaing prints in pxa2xx_spi_transfer_one()Jarkko Nikula2019-04-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use SPI device pointer in the remaining two error and warning prints in pxa2xx_spi_transfer_one() instead of platform device of the controller It make prints in the function uniform and more useful especially the error print here as it can reveal the driver that has mapped the DMA itself and attempts to transfer more than the maximum supported DMA transfer length. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xx: Use struct spi_device directly in pxa2xx_spi_transfer_one()Jarkko Nikula2019-04-021-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | Pointer to a SPI device is passed to pxa2xx_spi_transfer_one() so there is no need to access it through the current SPI message pointer. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xx: Debug print DMA burst sizeAndy Shevchenko2019-03-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | It's useful during debug to see what DMA burst size is. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xx: Introduce DMA burst size supportAndy Shevchenko2019-03-201-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | Some masters may have different DMA burst size than hard coded default. In such case respect the value given by DMA burst size provided via platform data. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* / spi: pxa2xx: fix SCR (divisor) calculationFlavio Suligoi2019-05-021-2/+6
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculate the divisor for the SCR (Serial Clock Rate), avoiding that the SSP transmission rate can be greater than the device rate. When the division between the SSP clock and the device rate generates a reminder, we have to increment by one the divisor. In this way the resulting SSP clock will never be greater than the device SPI max frequency. For example, with: - ssp_clk = 50 MHz - dev freq = 15 MHz without this patch the SSP clock will be greater than 15 MHz: - 25 MHz for PXA25x_SSP and CE4100_SSP - 16,56 MHz for the others Instead, with this patch, we have in both case an SSP clock of 12.5MHz, so the max rate of the SPI device clock is respected. Signed-off-by: Flavio Suligoi <f.suligoi@asem.it> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'for-5.0' of ↵Mark Brown2019-02-201-0/+1
|\ | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-5.1
| * spi: pxa2xx: Setup maximum supported DMA transfer lengthAndy Shevchenko2019-02-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the commit b6ced294fb61 ("spi: pxa2xx: Switch to SPI core DMA mapping functionality") switches to SPI core provided DMA helpers, it missed to setup maximum supported DMA transfer length for the controller and thus users mistakenly try to send more data than supported with the following warning: ili9341 spi-PRP0001:01: DMA disabled for transfer length 153600 greater than 65536 Setup maximum supported DMA transfer length in order to make users know the limit. Fixes: b6ced294fb61 ("spi: pxa2xx: Switch to SPI core DMA mapping functionality") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* | pxa2xx: replace spi_master with spi_controllerLubomir Rintel2019-01-231-78/+78
|/ | | | | | | | | It's also a slave controller driver now, calling it "master" is slightly misleading. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Fix '"CONFIG_OF" is not defined' warningLubomir Rintel2018-11-171-7/+1
| | | | | | | | A careless oversight. Sorry. Fixes: 0a897143b7c9 ("spi: pxa2xx: Add slave mode support") Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Deal with the leftover garbage in TXFIFOLubomir Rintel2018-11-131-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is super-secret and the method described in Armada 16x manual won't work: "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field in the SSP Control Register 0)." # devmem 0xd4037008 # read SSSR 0x0000F204 # devmem 0xd4037000 32 0x07 # SSE off in SSCR0 # devmem 0xd4037000 32 0x87 # SSE on # devmem 0xd4037008 0x0000F204 ^ TXFIFO level is still 2. Sigh. The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are basically throwaway bytes used in response to the messages from the EC. The OLPC kernel copes with this by power-cycling the hardware. Perhaps the firmware should do this instead. Other than that, there's not much we can do other than complain loudly until the garbage gets drained and discard the actual data... For the OLPC EC this will work just fine and pushing more data to TXFIFO would break further transactions. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add ready signalLubomir Rintel2018-11-131-1/+15
| | | | | | | | | | | Strobe a GPIO line when the slave TX FIFO is filled. This is how the Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI master, learns that it can initiate a transaction. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add slave mode supportLubomir Rintel2018-11-131-7/+74
| | | | | | | | | Tested on an OLPC XO-1.75 machine, where the Embedded Controller happens to be a SPI master. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Remove LPSS private register restoring during resumeJarkko Nikula2018-11-051-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Intel LPSS private register restoring in spi-pxa2xx.c: pxa2xx_spi_resume() was added before there was no any other code restoring them. This was changed after following commits for previous and current LPSS platforms: c78b0830667a ("ACPI / LPSS: custom power domain for LPSS") 41a3da2b8e16 ("mfd: intel-lpss: Save register context on suspend") However there is one caveat: There is no LPSS private register context save/restore for the Intel Lynxpoint in the Linux kernel code. I did some debugging on one Lynxpoint based device I have and on it the LPSS register context is not lost over suspend/resume cycle (s2idle). Which happens for instance on Intel Braswell. I'm speculating but I guess either firmware does it or the LPSS is kept always on Lynxpoint. Given that we haven't needed to implement Lynxpoint LPSS I2C or UART private register context save/restore over four years time I think we are safe to remove this LPSS private register restoring during resume here. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add devicetree supportLubomir Rintel2018-10-111-29/+44
| | | | | | | | The MMP2 platform, that uses device tree, has this controller. Let's add devicetree alongside platform & PCI. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Use an enum for typeLubomir Rintel2018-10-111-3/+3
| | | | | | | That seems to be the correct type. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Rewrite switch code block in interrupt_transferGustavo A. R. Silva2018-10-041-1/+3
| | | | | | | | | | Rewrite switch code block to directly do the expected number of shifts in each case and have break statements. Addresses-Coverity-ID: 1056539 ("Missing break in switch") Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Remove the shutdown callbackLubomir Rintel2018-09-171-9/+0
| | | | | | | | | It makes no sense to remove the device on shutdown. And it break things when the hardware crucial for shutdown (such as the embedded controller) is attached to the SPI bus. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Do not print a message if spi_controller_{suspend,resume}() failsGeert Uytterhoeven2018-09-051-7/+1
| | | | | | | | | | | | | | spi_controller_{suspend,resume}() already prints an error message on failure, so there is no need to repeat this in individual drivers. Note: spi_master_{suspend,resume}() is an alias for spi_controller_{suspend,resume}(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Daniel Mack <daniel@zonque.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add support for Intel Ice LakeMika Westerberg2018-06-281-0/+4
| | | | | | | | | | | Intel Ice Lake SPI host controller follows the Intel Cannon Lake but the PCI IDs are different. Add the new PCI IDs to the driver supported devices list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* spi: pxa2xx: check clk_prepare_enable() return valueTobias Jordan2018-05-041-5/+13
| | | | | | | | | | | clk_prepare_enable() can fail, so its return value should be checked and acted upon. Found by Linux Driver Verification project (linuxtesting.org). Fixes: 3343b7a6d2cd ("spi/pxa2xx: convert to the common clk framework") Signed-off-by: Tobias Jordan <Tobias.Jordan@elektrobit.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: pxa2xx_spi_transfer_one() can be statickbuild test robot2018-04-181-3/+3
| | | | | | | Fixes: d5898e19c0d7 ("spi: pxa2xx: Use core message processing loop") Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Use core message processing loopJarkko Nikula2018-04-171-160/+69
| | | | | | | | | | Convert the pump_transfers() transfer tasklet to transfer_one() hook the SPI core calls to process single transfer instead of handling message processing and chip select handling in the driver. This not only simplifies the driver but also brings transfer statistics from the core. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Remove pump_transfers string from dev_ printsJarkko Nikula2018-04-171-6/+4
| | | | | | | | | | | We are going to rename and modify pump_transfers(). Prepare for it by removing the string "pump_transfers:" from error and warning prints. While at it make these user-visible strings single line in sources as it helps source grepping from error reports. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Remove unused argument from pxa2xx_spi_dma_prepare()Jarkko Nikula2018-04-171-1/+1
| | | | | | | | | Current DMA engine implementation of pxa2xx_spi_dma_prepare() don't use the dma_burst argument. Remove it since it became unused after commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
*-. Merge remote-tracking branches 'spi/topic/jcore', 'spi/topic/kconfig', ↵Mark Brown2018-04-021-25/+29
|\ \ | | | | | | | | | 'spi/topic/orion', 'spi/topic/pxa2xx' and 'spi/topic/rspi' into spi-next
| | * spi: pxa2xx: Convert to generalized SPI controller APIJarkko Nikula2018-02-121-18/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert to generalized SPI controller API introduced by the commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller""). Inside driver variable name "master" is still used to indicate the driver is master only. While at it, change "unsigned cs" to "unsigned int cs" in pxa2xx_spi_fw_translate_cs() to suppress checkpatch warning. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Move SSP idle waiting to cs_deassert()Jarkko Nikula2018-02-121-7/+7
| |/ | | | | | | | | | | | | | | | | Move SSP idle waiting before CS deassert from error and end of message handling function giveback() to cs_deassert(). This ensures idle waiting is done also if there is CS change between transfers. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* / spi: pxa2xx: Disable runtime PM if controller registration failsJarkko Nikula2018-03-071-0/+2
|/ | | | | | | | | | | Don't leave runtime PM enabled in case devm_spi_register_controller() returns with an error. Otherwise runtime PM will complain when driver is reloaded: [ 693.855811] pxa2xx-spi pxa2xx-spi.13: Unbalanced pm_runtime_enable! Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Use gpiod_put() not gpiod_free()Mark Brown2017-12-221-2/+2
| | | | | | | | | gpiod_free() is an internal function for gpiolib, gpiod_put() is the correct external function. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Suggested-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: avoid redundant gpio_to_desc(desc_to_gpio()) round-tripRasmus Villemoes2017-12-211-2/+2
| | | | | | | | gpio_free(gpio) simply does gpiod_free(gpio_to_desc(gpio)), so it's simpler and cleaner to use gpiod_free directly. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Convert to GPIO descriptor API where possibleJan Kiszka2017-08-041-16/+16
| | | | | | | | | | | We still need to request/free GPIOs passed via the legacy path of pxa2xx_spi_chip::gpio_cs, but we can use the gpiod API otherwise. Consistently use the descriptor API instead of the legacy one. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Don't touch CS pin until we have a transfer pendingAndy Shevchenko2017-07-281-2/+1
| | | | | | | | | | | | | GPIO descriptors, when being requested, may configure pin at the same time. In case of SPI chip select we shouldn't do any assumptions of the state of pin since we don't know yet what chip is connected there and if it uses high or low active state. So, leave the state of pin as is until transfer will start. Fixes: 99f499cd6504 ("spi: pxa2xx: Add support for GPIO descriptor chip selects") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westeberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Revert "Only claim CS GPIOs when the slave device is created"Andy Shevchenko2017-07-271-21/+38
| | | | | | | | | | | | | | | | | There is a valid case to call setup() following by setup_cs() several times for the same chip. With the commit 676a4e3bab44 ("spi: pxa2xx: Only claim CS GPIOs when the slave device is created") it is not possible anymore due to GPIO line being requested already during the first call to setup_cs(). For now, revert the commit to make things work again. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Only claim CS GPIOs when the slave device is createdJan Kiszka2017-07-171-38/+21
| | | | | | | | | | | | | | Avoid hogging chip select GPIOs just because they are listed for the master. They might be mulitplexed and, if no slave device is attached, used for different purposes. Moreover, this strategy avoids having to allocate a cs_gpiods structure. Tested on the IOT2000 where the second SPI bus is connected to an Arduino-compatible connector and multiplexed between SPI, GPIO and PWM usage. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add support for Intel CannonlakeJarkko Nikula2017-06-061-0/+22
| | | | | | | | | | | | Intel Cannonlake LPSS SPI has up to four chip selects per port like in Broxton and is clocked like Sunrisepoint and Kaby Lake. Add a new type LPSS_CNL_SSP and configuration that enable runtime chip select detection and use the same FIFO thresholds than in Sunrisepoint. Patch adds support for both Cannonlake SoC and PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
*-. Merge remote-tracking branches 'spi/topic/imx', 'spi/topic/lantiq-ssc', ↵Mark Brown2017-02-191-14/+18
|\ \ | | | | | | | | | 'spi/topic/mpc52xx', 'spi/topic/ppc4xx' and 'spi/topic/pxa2xx' into spi-next
| | * spi: pxa2xx: Prepare for edge-triggered interruptsJan Kiszka2017-01-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using the a device with edge-triggered interrupts, such as MSIs, the interrupt handler has to ensure that there is a point in time during its execution where all interrupts sources are silent so that a new event can trigger a new interrupt again. This is achieved here by disabling all interrupt sources for a moment before processing them according to the status register. If a new interrupt should have arrived after we read the status, it will now re-trigger the interrupt, even in edge mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Factor out handle_bad_msgJan Kiszka2017-01-171-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | As suggested by Andy Shevchenko: Decouple this corner cause from the general handling logic in ssp_int. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | | spi: pxa2xx: Add support for Intel Gemini LakeDavid E. Box2017-01-191-0/+4
| |/ |/| | | | | | | | | | | | | Gemini Lake reuses the same LPSS SPI configuration as Broxton Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: pxa2xx: add missed breakAndy Shevchenko2017-01-041-0/+1
|/ | | | | | | | | | | | | The commit 7c7289a40425 ("spi: pxa2xx: Default thresholds to PXA configuration") while splitting up CE4100 code obviously missed a break condition in one chunk. Add it here. Looks like we have no active user of CE4100, though better to fix this later than never. Fixes: commit 7c7289a40425 ("spi: pxa2xx: Default thresholds to PXA configuration") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Fix build error because of missing headerMika Westerberg2016-09-291-0/+1
| | | | | | | | | | | | | | | | Kbuild test robot reports: drivers/spi/spi-pxa2xx.c: In function ‘setup_cs’: drivers/spi/spi-pxa2xx.c:1190:20: error: implicit declaration of function ‘desc_to_gpio’ ... Reason for this is the fact that those functions are declared in linux/gpio/consumer.h which is not included in the driver. Fix this by including it. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add support for GPIO descriptor chip selectsMika Westerberg2016-09-261-3/+54
| | | | | | | | | | | | | | | | The driver uses custom chip_info coming from platform data for chip selects implemented as GPIOs. If the system lacks board files setting up the platform data, it is not possible to use GPIOs as chip selects. This adds support for GPIO descriptors so that regardless of the underlying firmware interface (DT, ACPI or platform data) the driver can request GPIOs used as chip selects and configure them accordingly. The custom chip_info GPIO support is still left there to make sure the existing systems keep working as expected. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Default thresholds to PXA configurationAndy Shevchenko2016-09-121-5/+42
| | | | | | | | | | | | | | | | Most of the devices in the supported list have PXA configuration of FIFO. In particularly Intel Medfield and Merrifield have bigger FIFO, than it's defined for CE4100. Split CE4100 in the similar way how it was done for Intel Quark, i.e. prefix definitions by CE4100 and append necessary pieces of code to switch case conditions. We are on safe side since those bits are ignored on all LPSS IPs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 20:40:23 +0100