summaryrefslogtreecommitdiffstats
path: root/drivers/spi/spi-tegra210-quad.c (follow)
Commit message (Collapse)AuthorAgeFilesLines
* spi: tegra210-quad: Multi-cs supportKrishna Yarlagadda2022-06-131-2/+31
| | | | | | | | | Tegra Grace and later chips can support upto 4 chip select lines for QUAD SPI. Added new compatible for Tegra Grace. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/20220607114659.54314-2-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: combined sequence modeKrishna Yarlagadda2022-03-081-5/+233
| | | | | | | | | | | | | Add combined sequence mode supported by Tegra QSPI controller. For commands which contain cmd, addr, data parts to it, controller can accept all 3 transfers at once and avoid interrupt for each transfer. This would improve read & write performance. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20220307165519.38380-3-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: add acpi supportKrishna Yarlagadda2022-03-081-11/+41
| | | | | | | | | | Add ACPI ID for Tegra QUAD SPI. Switch to common device property calls. Skip clock calls that are not updated in ACPI boot. Runtime PM support is not yet enabled with ACPI boot. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/20220307165519.38380-2-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: add new chips to compatibleKrishna Yarlagadda2022-02-241-3/+30
| | | | | | | | Add support for Tegra234 and soc data to select capabilities. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/20220222175611.58051-4-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: use device_reset methodKrishna Yarlagadda2022-02-241-14/+4
| | | | | | | | | Use device_reset api to replace duplicate code in driver to call reset_control_get api with reset handle. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/20220222175611.58051-2-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: Fix missin IRQ check in tegra_qspi_probeMiaoqian Lin2022-02-081-0/+2
| | | | | | | | | | | | This func misses checking for platform_get_irq()'s call and may passes the negative error codes to request_threaded_irq(), which takes unsigned IRQ #, causing it to fail with -EINVAL, overriding an original error code. Stop calling request_threaded_irq() with invalid IRQ #s. Fixes: 921fc1838fb0 ("spi: tegra210-quad: Add support for Tegra210 QSPI controller") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220128165956.27821-1-linmq006@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: use devm call for cdata memoryKrishna Yarlagadda2021-11-261-10/+1
| | | | | | | | | Use devm alloc call to allocate memory for spi controller data and remove free calls from cleanup. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/1637834152-32093-1-git-send-email-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: Put device into suspend on driver removalDmitry Osipenko2021-10-261-2/+2
| | | | | | | | | | | | pm_runtime_disable() cancels all pending power requests, while they should be completed for the Tegra SPI driver. Otherwise SPI clock won't be disabled ever again because clk refcount will become unbalanced. Enforce runtime PM suspension to put device into expected state before driver is unbound and device's RPM state is reset by driver's core. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211023225951.14253-2-digetx@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: Fix an error messageChristophe JAILLET2021-05-101-1/+1
| | | | | | | | | | 'ret' is known to be 0 here. No error code is available, so just remove it from the error message. Fixes: 921fc1838fb0 ("spi: tegra210-quad: Add support for Tegra210 QSPI controller") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/b990c1bb5830196142c3d70e3e3c6c0245a7e75f.1620404705.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: Add support for hardware dummy cycles transferSowjanya Komatineni2021-01-061-3/+31
| | | | | | | | | | | | | | | Tegra Quad SPI controller hardware supports sending dummy bytes based on programmed dummy clock cycles after the actual transfer bytes. This patch adds this support of hardware dummy bytes transfer and skips transfer of dummy bytes from the software. For dummy cycles more than Tegra Quad SPI hardware maximum dummy cycles limit, driver transfers dummy bytes from the software. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-7-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: tegra210-quad: Add support for Tegra210 QSPI controllerSowjanya Komatineni2021-01-061-0/+1382
Tegra SoC has a Quad SPI controller starting from Tegra210. This patch adds support for Tegra210 QSPI controller. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-5-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 13:27:05 +0100