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spi
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spi-txx9.c
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Author
Files
Lines
2014-01-16
clk: qcom: Add support for phase locked loops (PLLs)
Stephen Boyd
3
-0
/
+289
2014-01-16
clk: qcom: Add a regmap type clock struct
Stephen Boyd
6
-0
/
+170
2014-01-16
clk: Add set_rate_and_parent() op
Stephen Boyd
3
-19
/
+77
2014-01-16
reset: Silence warning in reset-controller.h
Stephen Boyd
1
-0
/
+1
2014-01-16
clk: sirf: re-arch to make the codes support both prima2 and atlas6
Barry Song
7
-172
/
+458
2014-01-15
clk: composite: pass mux_hw into determine_rate
Mike Turquette
1
-1
/
+1
2014-01-14
clk: shmobile: Fix MSTP clock array initialization
Valentine Barshak
1
-2
/
+6
2014-01-14
clk: shmobile: Fix MSTP clock index
Valentine Barshak
1
-2
/
+2
2014-01-08
ARM: dts: Add clock provider specific properties to max77686 node
Tomasz Figa
3
-0
/
+3
2014-01-08
clk: max77686: Register OF clock provider
Tomasz Figa
3
-0
/
+65
2014-01-08
clk: max77686: Refactor driver data handling
Tomasz Figa
1
-13
/
+14
2014-01-08
clk: max77686: Fix clean-up in error and remove paths
Tomasz Figa
1
-19
/
+10
2014-01-08
clk: max77686: Make max77686_clk_register() return struct clk *
Tomasz Figa
1
-7
/
+10
2014-01-08
clk: max77686: Refactor successful exit of probe function
Tomasz Figa
1
-2
/
+1
2014-01-08
clk: max77686: Provide .recalc_rate() operation
Tomasz Figa
1
-0
/
+7
2014-01-08
clk: max77686: Correct callback used for checking clock status
Tomasz Figa
1
-2
/
+2
2014-01-08
MAINTAINERS: Add entry for Samsung SoC clock drivers
Tomasz Figa
1
-0
/
+6
2014-01-08
ARM: dts: exynos5420: add input clocks to audss clock controller
Andrew Bresticker
1
-2
/
+2
2014-01-08
clk: exynos-audss: add support for Exynos 5420
Andrew Bresticker
3
-10
/
+40
2014-01-08
ARM: dts: exynos5250: add input clocks to audss clock controller
Andrew Bresticker
1
-0
/
+2
2014-01-08
clk: exynos5250: add clock ID for div_pcm0
Andrew Bresticker
3
-1
/
+3
2014-01-08
clk: exynos-audss: allow input clocks to be specified in device tree
Andrew Bresticker
2
-7
/
+50
2014-01-08
clk: exynos-audss: convert to platform device
Andrew Bresticker
1
-16
/
+88
2014-01-08
clk: exynos5440: replace clock ID private enums with IDs from DT header
Andrzej Hajda
1
-47
/
+34