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* Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2015-04-242-2/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine updates from Vinod Koul: - new drivers for: - Ingenic JZ4780 controller - APM X-Gene controller - Freescale RaidEngine device - Renesas USB Controller - remove device_alloc_chan_resources dummy handlers - sh driver cleanups for peri peri and related emmc and asoc patches as well - fixes and enhancements spread over the drivers * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (59 commits) dmaengine: dw: don't prompt for DW_DMAC_CORE dmaengine: shdmac: avoid unused variable warnings dmaengine: fix platform_no_drv_owner.cocci warnings dmaengine: pch_dma: fix memory leak on failure path in pch_dma_probe() dmaengine: at_xdmac: unlock spin lock before return dmaengine: xgene: devm_ioremap() returns NULL on error dmaengine: xgene: buffer overflow in xgene_dma_init_channels() dmaengine: usb-dmac: Fix dereferencing freed memory 'desc' dmaengine: sa11x0: report slave capabilities to upper layers dmaengine: vdma: Fix compilation warnings dmaengine: fsl_raid: statify fsl_re_chan_probe dmaengine: Driver support for FSL RaidEngine device. dmaengine: xgene_dma_init_ring_mngr() can be static Documentation: dma: Add documentation for the APM X-Gene SoC DMA device DTS binding arm64: dts: Add APM X-Gene SoC DMA device and DMA clock DTS nodes dmaengine: Add support for APM X-Gene SoC DMA engine driver dmaengine: usb-dmac: Add Renesas USB DMA Controller (USB-DMAC) driver dmaengine: renesas,usb-dmac: Add device tree bindings documentation dmaengine: edma: fixed wrongly initialized data parameter to the edma callback dmaengine: ste_dma40: fix implicit conversion ...
| * spi: sh-msiof: remove slave_id settings for DMAEngineArnd Bergmann2015-02-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | Current sh-msiof sets dma_slave_config :: slave_id field for DMAEngine, but it is no longer needed. Let's remove it. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * spi: rspi: remove slave_id settings for DMAEngineArnd Bergmann2015-02-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | Current rspi sets dma_slave_config :: slave_id field for DMAEngine, but it is no longer needed. Let's remove it. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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*-. | Merge remote-tracking branches 'spi/topic/spidev' and ↵Mark Brown2015-04-121-12/+43
|\ \| | | | | | | | | | 'spi/topic/spidev-test' into spi-next
| * | spi: spidev: Warn loudly if instantiated from DT as "spidev"Mark Brown2015-03-281-7/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since spidev is a detail of how Linux controls a device rather than a description of the hardware in the system we should never have a node described as "spidev" in DT, any SPI device could be a spidev so this is just not a useful description. In order to help prevent users from writing such device trees generate a warning if spidev is instantiated as a DT node without an ID in the match table. Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spidev: fix possible arithmetic overflow for multi-transfer messageIan Abbott2015-03-231-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | `spidev_message()` sums the lengths of the individual SPI transfers to determine the overall SPI message length. It restricts the total length, returning an error if too long, but it does not check for arithmetic overflow. For example, if the SPI message consisted of two transfers and the first has a length of 10 and the second has a length of (__u32)(-1), the total length would be seen as 9, even though the second transfer is actually very long. If the second transfer specifies a null `rx_buf` and a non-null `tx_buf`, the `copy_from_user()` could overrun the spidev's pre-allocated tx buffer before it reaches an invalid user memory address. Fix it by checking that neither the total nor the individual transfer lengths exceed the maximum allowed value. Thanks to Dan Carpenter for reporting the potential integer overflow. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spidev: only use up TX/RX bounce buffer space when neededIan Abbott2015-02-241-5/+23
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the way space is reserved in spidev's pre-allocated TX and RX bounce buffers to avoid wasting space in the buffers for an SPI message consisting of multiple, half-duplex transfers in different directions. Background: spidev data structures have separate, pre-allocated TX and RX bounce buffers (`spidev->tx_buffer` and `spidev->rx_buffer`) of fixed size (`bufsiz`). The `SPI_IOC_MESSAGE(N)` ioctl processing uses a kernel copy of the N `struct spi_ioc_transfer` elements copied from the userspace ioctl arg pointer. In these elements: `.len` is the length of transfer in bytes; `.rx_buf` is either a userspace pointer to a buffer to copy the RX data to or is set to 0 to discard the data; and `.tx_buf` is either a userspace pointer to TX data supplied by the user or is set to 0 to transmit zeros for this transfer. `spidev_message()` uses the array of N `struct spi_ioc_transfer` elements to construct a kernel SPI message consisting of a `struct spi_message` containing a linked list (allocated as an array) of N `struct spi_transfer` elements. This involves iterating through the `struct spi_ioc_transfer` and `struct spi_transfer` elements (variables `u_tmp` and `k_tmp` respectively). Before the first iteration, variables `tx_buf` and `rx_buf` point to the start of the TX and RX bounce buffers `spidev->tx_buffer` and `spidev->rx_buffer` and variable `total` is set to 0. These variables keep track of the next available space in the bounce buffers and the total length of the SPI message. Each iteration checks that there is enough room left in the buffers for the transfer. If `u_tmp->rx_buf` is non-zero, `k_tmp->rx_buf` is set to `rx_buf`, otherwise it remains set to NULL. If `u_tmp->tx_buf` is non-zero, `k_tmp->tx_buf` is set to `tx_buf` and the userspace TX data copied there, otherwise it remains set to NULL. The variables `total`, `rx_buf` and `tx_buf` are advanced by the length of the transfer. The "problem": While iterating through the transfers, the local bounce buffer "free space" pointer variables `tx_buf` and `rx_buf` are always advanced by the length of the transfer. If `u_tmp->rx_buf` is 0 (so `k_tmp->rx_buf` is NULL), then `rx_buf` is advanced unnecessarily and that part of `spidev->rx_buffer` is wasted. Similarly, if `u_tmp->tx_buf` is 0 (so `k_tmp->tx_buf` is NULL), part of `spidev->tx_buffer` is wasted. What this patch does: To avoid wasting space unnecessarily in the RX bounce buffer, only advance `rx_buf` by the transfer length if `u_tmp->rx_buf` is non-zero. Similarly, to avoid wasting space unnecessarily in the TX bounce buffer, only advance `tx_buf` if `u_tmp->tx_buf is non-zero. To avoid pointer subtraction, use new variables `rx_total` and `tx_total` to keep track of the amount of space allocated in each of the bounce buffers. If these exceed the available space, a `-EMSGSIZE` error will be returned. Limit the total length of the transfers (tracked by variable `total`) to `INT_MAX` instead of `bufsiz`, returning an `-EMSGSIZE` error if exceeded. The total length is returned by `spidev_message()` on success and we want that to be non-negative. The message size limits for the `SPI_IOC_MESSAGE(N)` ioctl are now as follows: (a) total length of transfers is <= INTMAX; (b) total length of transfers with non-NULL rx_buf is <= bufsiz; (c) total length of transfers with non-NULL tx_buf is <= bufsiz. Some transfers may have NULL rx_buf and NULL tx_buf. If the transfer is completed successfully by the SPI core, `spidev_message()` iterates through the transfers to copy any RX data from the bounce buffer back to userspace on those transfers where `u_tmp->rx_buf` is non-zero. The variable `rx_buf` is again used to keep track of the corresponding positions in the bounce buffer. Now it is only advanced for those transfers that use the RX bounce buffer. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ Merge remote-tracking branches 'spi/topic/qup', 'spi/topic/rockchip', ↵Mark Brown2015-04-125-46/+456
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'spi/topic/rspi', 'spi/topic/s3c64xx' and 'spi/topic/sc18is602' into spi-next
| | | | | * | spi: sc18is602: Support multiple devices on a single I2C bus if DT is configuredGuenter Roeck2015-02-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver currently only supports a single device per I2C bus since it uses the I2C bus number to set the SPI bus number. This makes it impossible to connect more than one chip to a single I2C bus. We don't want to use dynamic bus numbers unconditionally since this would result in every instantiation getting a different bus number starting with 65,535 counting down unless devicetree is configured. If devicetree is configured, however, the SPI bus number is obtained from devicetree data. So we can use dynamic SPI bus numbers in this case. Reported-and-Tested-by: Marco Menchise <marco.menchise@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | spi: s3c64xx: fix compiler warning in spi-s3c64xxAndre Przywara2015-02-241-2/+2
| | | | | |/ | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Exynos 7 arm64 support now allows the S3C64xx SPI driver to be compiled into an ARM64 kernel, so the cast from the [rt]x_dmach int variable to a void* in this driver now triggers a warning. Add a long cast to silence the compiler. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: signedness bug in qspi_trigger_transfer_out_int()Dan Carpenter2015-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need "ret" to be unsigned for the error handling to work. The signedness of "i" and "n" don't matter but qspi_set_send_trigger() returns an int so I've changed them to int as well. Fixes: 4b6fe3edcbba ('spi: Using Trigger number to transmit/receive data') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: Using Trigger number to transmit/receive dataHiep Cao Minh2015-03-301-7/+117
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to transmit and receive data when have 32 bytes of data that ready has prepared on Transmit/Receive Buffer to transmit or receive. Instead transmits/receives a byte data using Transmit/Receive Buffer Data Triggering Number will improve the speed of transfer data. Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi/rockchip: Add device tree property to configure Rx Sample DelayJulius Werner2015-03-271-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have found that we can sometimes see read failures on boards with high-capacitance SPI lines. It seems that the controller samples the Rx data line too early, and its register interface has an "Rx Sample Delay" setting to fine-tune against this issue. This patch adds a new optional device tree entry that can configure this delay in terms of nanoseconds. The kernel will calculate the best-fitting amount of parent clock ticks to program the controller with based on that. Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi/rockchip: do an error handling in proper timeAndy Shevchenko2015-03-061-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There was handle_err() callback introduced that is dedicated for error handling. The patch moves error handling to this callback. Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-rockchip@lists.infradead.org Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | spi: qup: Add DMA capabilitiesAndy Gross2015-03-071-32/+304
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DMA capabilities to the spi-qup driver. If DMA channels are present, the QUP will use DMA instead of block mode for transfers to/from SPI peripherals for transactions larger than the length of a block. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Ivan T. Ivanov <iivanov@mm-sol.com Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ \ \ Merge remote-tracking branches 'spi/topic/omap-100k', ↵Mark Brown2015-04-125-217/+205
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/omap-uwire', 'spi/topic/pl022', 'spi/topic/pm' and 'spi/topic/pxa2xx' into spi-next
| | | | | * | | | spi: pxa2xx: missing break in pxa2xx_ssp_get_clk_div()Dan Carpenter2015-03-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We refactored this code but accidentally left out a break statement so QUARK_X1000_SSP isn't handled correctly. Fixes: 025ffe88ee60 ('spi: pxa2xx: shift clk_div in one place') Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | | | spi: pxa2xx: replace ugly table by approximationAndy Shevchenko2015-03-251-62/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Quark SoC data sheet describes the baud rate setting using fractional divider. The subset of possible values represented by a table suggests that the divisor has one block that could divide by 5. This explains the number of the beast in some cases in the table. Thus, in this particular case the divisor can be evaluated as 5^i * 2^j * 2 * k, where i = [0, 1] j = [0, 23] k = [1, 256] There are few cases as mentioned in the data sheet, i.e. better form of the clock signal will be in case if DDS_CLK_RATE either 2^n or 2/5. It's also possible to use any value that is less or equal to 0x33333 (1/5/16 = 1/80). All three cases are compared to each other and the one that suits better is chosen by the approximation algorithm. Anyone can play with the script [1] that represents the algorithm. [1] https://gist.github.com/06b084488b3629898121 Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | | | spi: pxa2xx: shift clk_div in one placeAndy Shevchenko2015-03-241-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refactors ssp_get_clk_div() and pxa2xx_ssp_get_clk_div() to align clk_div calculations, i.e. ssp_get_clk_div() and quark_x1000_set_clk_regvals() will return plain clk_div and it will be shifted to proper position in pxa2xx_ssp_get_clk_div(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | | | spi: pxa2xx: Remove needless includesJarkko Nikula2015-03-231-4/+0
| | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These asm/io.h, asm/irq.h and asm/delay.h are needless since they are already included by linux/io.h via drivers/spi/spi-pxa2xx.h, linux/interrupt.h and linux/delay.h. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * / / / spi: Remove support for legacy PMLars-Peter Clausen2015-03-081-114/+0
| | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All SPI drivers have been converted from legacy suspend/resume callbacks to dev_pm_ops. So we can finally remove support for legacy PM from the SPI core. Since there aren't any special bus specific things to do during suspend/resume and since the PM core will automatically fallback directly to using the device's PM ops if no bus PM ops are specified there is no need to have any special SPI bus PM ops. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: pl022: Remove dead codeAlexander Sverdlin2015-03-061-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "flag" variable does nothing, remove it. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: pl022: Don't touch unspecified bits in interrupt maskAlexander Sverdlin2015-03-061-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PL022 Programmers model explicitely states "do not modify undefined register bits". Correct the "all enable" interrupt mask so that it only enables defined ones. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: pl022: Remove incorrect TxFIFO full reportingAlexander Sverdlin2015-03-061-3/+0
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to PL022 specification, TNF bit states for "Transmit FIFO Not full". So the logic here is inverted. But "Receive Overrun Interrupt", which is handled here, is only triggered on Rx errors. So instead of fixing the if statement, remove the whole message. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * / / / spi: omap-uwire: Remove needless include asm/irq.hJarkko Nikula2015-03-231-1/+0
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | asm/irq.h is already included by linux/interrupt.h. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * / / / spi/omap100k: Convert to runtime PMMark Brown2015-03-171-24/+77
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the omap100k driver uses prepare and unprepare transfer hardware to enable and disable clocks for the IP block. Since these functions are called along with runtime PM and end up duplicating its functionality in a less flexible fashion we are trying to phase them out so convert this driver to do runtime PM instead. While doing so add missing error handling and remove a redundant NULL assignment. Signed-off-by: Mark Brown <broonie@kernel.org>
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*-----. \ \ \ Merge remote-tracking branches 'spi/topic/fsl-cspi', 'spi/topic/fsl-dspi', ↵Mark Brown2015-04-125-9/+65
|\ \ \ \ \ \ \ | | |_|_|/ / / | |/| | | | | | | | | | | | 'spi/topic/imx' and 'spi/topic/of-id' into spi-next
| | | | * | | spi: constify of_device_id arrayFabian Frederick2015-03-173-3/+3
| | |_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_device_id is always used as const. (See driver.of_match_table and open firmware functions) Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: spi-imx: use correct enumeration typeStefan Agner2015-03-031-2/+2
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fourth argument of dmaengine_prep_slave_sg needs to be of the enumeration type dma_transfer_direction instead of dma_data_direction. Since the used enumeration values actually stay the same, this is not an actual issue at runtime. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | Merge branch 'fix/fsl-dspi' of ↵Mark Brown2015-04-071-0/+2
| | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-dspi Conflicts: drivers/spi/spi-fsl-dspi.c
| | * | | | spi: fsl-dspi: Add ~50ns delay between cs and sckAaron Brice2015-04-061-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add delay between chip select and clock signals, before clock starts and after clock stops. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | spi: fsl-dspi: Fix clock rate scale valuesAaron Brice2015-03-311-14/+21
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous algorithm had an outer loop with the values {2,3,5,7} and an inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first value over the required scaling value (where the total scale was the two numbers multiplied). Since the inner loop went up to 32768 it would always pick a value of 2 for PBR and a much higher than necessary value for BR. The desired scale factor was being divided by two I believe to compensate for the much higher scale factors (the divide by two not specified in the reference manual). Updated to check all values and find the smallest scale factor possible without going over the desired clock rate. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-----. \ \ \ \ Merge remote-tracking branches 'spi/topic/blackfin', 'spi/topic/cadence', ↵Mark Brown2015-04-126-333/+220
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/dw' and 'spi/topic/err' into spi-next
| | | | * | | | | spi: Make master->handle_err() callback optional to avoid crashesGeert Uytterhoeven2015-04-071-1/+1
| | | | | |_|/ / | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a driver doesn't implement the master->handle_err() callback and an SPI transfer fails, the kernel will crash with a NULL pointer dereference: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = c0003000 [00000000] *pgd=80000040004003, *pmd=00000000 Internal error: Oops: 80000206 [#1] SMP ARM Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.0.0-rc7-koelsch-05861-g1fc9fdd4add4f783 #1046 Hardware name: Generic R8A7791 (Flattened Device Tree) task: eec359c0 ti: eec54000 task.ti: eec54000 PC is at 0x0 LR is at spi_transfer_one_message+0x1cc/0x1f0 Make the master->handle_err() callback optional to avoid the crash. Also fix a spelling mistake in the callback documentation while we're at it. Fixes: b716c4ffc6a2b0bf ("spi: introduce master->handle_err() callback") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw: fix crash on setup stageAndy Shevchenko2015-03-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 1a7b7ee72c21 (spi: Ensure that CS line is in non-active state after spi_setup()) introduces an unconditional call of spi_set_cs() before ->setup(). The dw_spi_set_cs() relies on that fact that ->setup() is already called, but it doesn't now. This patch fixes the crash by adding an additional check to dw_spi_set_cs(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-spi: Convert 16bit accesses to 32bit accessesThor Thayer2015-03-173-27/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Altera's Arria10 SoC interconnect requires a 32-bit write for APB peripherals. The current spi-dw driver uses 16-bit accesses in some locations. This patch converts all the 16-bit reads and writes to 32-bit reads and writes. Additional Documentation to Support this Change: The DW_apb_ssi databook states: "All registers in the DW_apb_ssi are addressed at 32-bit boundaries to remain consistent with the AHB bus. Where the physical size of any register is less than 32-bits wide, the upper unused bits of the 32-bit boundary are reserved. Writing to these bits has no effect; reading from these bits returns 0." [1] [1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a) Request for test with platforms using the DesignWare SPI IP. Tested On: Altera CycloneV development kit Altera Arria10 development kit Compile tested for build errors on x86_64 (allyesconfigs) Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Reviewed-and-tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-spi: Single Register read to clear IRQsThor Thayer2015-03-091-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of clearing the RxU, RxO, and TxO IRQs individually with 3 register reads, a single read of the ICR register will do the same thing. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-mid: convert to use dw_dmac instead of intel_mid_dmaAndy Shevchenko2015-03-093-29/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | intel_mid_dma seems to be unmaintained for a long time. Moreover, the IP block of DMA itself is the same in both dw_dmac and intel_mid_dma. This patch moves spi-dw-midpci to use dw_dmac driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-mid: move to use core SPI DMA mappingsAndy Shevchenko2015-03-093-66/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI core has a comprehensive function set to map and unmap a message when it's needed. This patch converts driver to use that advantage. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-mid: clear ongoing DMA transfers on timeoutAndy Shevchenko2015-03-093-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch shuts up any ongoing DMA transfer in case of error. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-mid: take care of FIFO overrun/underrun when do DMAAndy Shevchenko2015-03-091-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In according to documentation SPI in DMA mode may encounter underrun/overrun failures in rare cases. When such failure occurs, an error recovery protocol is expected to be implemented in the device driver so that the failed transaction can be restarted. This patch enables FIFO overrun / underrun interrupts in DMA case and adds a handler for that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-mid: split dma_setup() from dma_transfer()Andy Shevchenko2015-03-093-23/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch splits DMA preparatory code to dma_setup() callback. The change also converts transfer_one() to program DMA whenever the transfer is DMA mapped. The change is a follow up of the converion to use SPI core transfer_one_message(). Since the DMA mapped transfers can be interleaved with PIO ones the DMA related configuration should respect that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: dw-mid: convert value of dma_width to enum dma_slave_buswidthAndy Shevchenko2015-03-092-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMAEngine has a specific type to be used for bus width. This patch converts the code to use the values of the specific type when configure DMA transfer. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | Merge branch 'fix/dw' of ↵Mark Brown2015-03-093-6/+14
| | | |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-dw
| | | * | | | | | spi: dw: move to SPI core message handlingAndy Shevchenko2015-03-063-164/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes a lot of duplicate code since SPI core provides a nice message handling. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | Merge branch 'topic/err' of ↵Mark Brown2015-03-061-0/+3
| | | |\ \ \ \ \ \ | | | | | |/ / / / | | | | |/| | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-dw
| | | * | | | | | spi: dw: program registers as soon as possibleAndy Shevchenko2015-03-061-23/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refactors the code in pump_transfers() to reprogram the registers immediately when we have a new configuration data. The behaviour is slightly modified: - chip is always disabled and reenabled - CTRL0 is always reprogrammed This change allows to do a further refactoring and simplier conversion to use SPI core DMA routines in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | spi: dw: make sure SPI controller is enabledAndy Shevchenko2015-03-062-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The error handling is partially broken since the controller is disabled on error and is not re-enabled until condition occurs, i.e. mode (poll, PIO/DMA), chip (cs_change), or speed (clk_div) is changed. In the result of these changes we will have a predictable state of the SPi controller independently on how successfull was a previous transfer. The patch disables interrupts and re-enables the SPI controller wherever it needs to be done. Thus most of the time the SPI controller is kept enabled. The runtime PM, when it will be implemented, must take care of the controller disabling and re-enabling. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | spi: dw: always reprogram CTRL0Andy Shevchenko2015-02-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of an additional reading from the register let's update it even if the value is kept the same. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | spi: dw: refactor code that handles clk_divAndy Shevchenko2015-02-241-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following changes: a) the calculation of clk_div is simplified to oneliner; b) chip->clk_div is updated if clk_div is not zero, therefore the condition is simplified by using chip->clk_div in both cases; c) while here, the redundant parentheses are removed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 16:03:24 +0100