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* spi: rzv2m-csi: Fix SoC product nameGeert Uytterhoeven2023-07-031-1/+1
| | | | | | | | | The SoC product name is "RZ/V2M". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Link: https://lore.kernel.org/r/89e9870a2c510387e4d7a863025f4d3639d4a261.1688375020.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: bcm-qspi: return error if neither hif_mspi nor mspi is availableJonas Gorski2023-06-301-7/+3
| | | | | | | | | | | | | | | | | | | | | | | If neither a "hif_mspi" nor "mspi" resource is present, the driver will just early exit in probe but still return success. Apart from not doing anything meaningful, this would then also lead to a null pointer access on removal, as platform_get_drvdata() would return NULL, which it would then try to dereference when trying to unregister the spi master. Fix this by unconditionally calling devm_ioremap_resource(), as it can handle a NULL res and will then return a viable ERR_PTR() if we get one. The "return 0;" was previously a "goto qspi_resource_err;" where then ret was returned, but since ret was still initialized to 0 at this place this was a valid conversion in 63c5395bb7a9 ("spi: bcm-qspi: Fix use-after-free on unbind"). The issue was not introduced by this commit, only made more obvious. Fixes: fa236a7ef240 ("spi: bcm-qspi: Add Broadcom MSPI driver") Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Reviewed-by: Kamal Dasu <kamal.dasu@broadcom.com> Link: https://lore.kernel.org/r/20230629134306.95823-1-jonas.gorski@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-geni-qcom: enable SPI_CONTROLLER_MUST_TX for GPI DMA modeDmitry Baryshkov2023-06-291-0/+6
| | | | | | | | | | | The GPI DMA mode requires for TX DMA to be prepared. Force SPI core to provide TX buffer even if the caller didn't provide one by setting the SPI_CONTROLLER_MUST_TX flag. Fixes: b59c122484ec ("spi: spi-geni-qcom: Add support for GPI dma") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230629095847.3648597-1-dmitry.baryshkov@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Add support for Renesas CSIFabrizio Castro2023-06-233-0/+674
| | | | | | | | | | | The RZ/V2M SoC comes with the Clocked Serial Interface (CSI) IP, which is a master/slave SPI controller. This commit adds a driver to support CSI master mode. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-4-fabrizio.castro.jz@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Helper for deriving timeout valuesMark Brown2023-06-232-8/+12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Miquel Raynal <miquel.raynal@bootlin.com>: I recently came across an issue with the Atmel spi controller driver which would stop my transfers after a too small timeout when performing big transfers (reading a 4MiB flash in one transfer). My initial idea was to derive a the maximum amount of time a transfer would take depending on its size and use that as value to avoid erroring-out when not relevant. Mark wanted to go further by creating a core helper doing that, based on the heuristics from the sun6i driver. Here is a small series of 3 patches doing exactly that.
| * spi: sun6i: Use the new helper to derive the xfer timeout valueMiquel Raynal2023-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A helper was recently added to the core to factorize common code between drivers, like the amount of time a driver should wait for a transfer to happen. It is of course possible to use a default value (like eg. 1s) but it is way stronger to adapt this amount of time to the transfer. Indeed, long transfers (eg. 4MiB) on a slow single-spi bus might take more than the usual second of timeout and prevent lengthy transfers. The core helper was heavily inspired by the logic applied in this driver, the only difference being the minimum amount of time which was enlarged from 0.1s to 0.5s. Use this helper instead of open-coding it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jernej Škrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-4-miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: atmel: Prevent false timeouts on long transfersMiquel Raynal2023-06-221-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A slow SPI bus clocks at ~20MHz, which means it would transfer about 2500 bytes per second with a single data line. Big transfers, like when dealing with flashes can easily reach a few MiB. The current DMA timeout is set to 1 second, which means any working transfer of about 4MiB will always be cancelled. With the above derivations, on a slow bus, we can assume every byte will take at most 0.4ms. Said otherwise, we could add 4ms to the 1-second timeout delay every 10kiB. On a 4MiB transfer, it would bring the timeout delay up to 2.6s which still seems rather acceptable for a timeout. The consequence of this is that long transfers might be allowed, which hence requires the need to interrupt the transfer if wanted by the user. We can hence switch to the _interruptible variant of wait_for_completion. This leads to a little bit more handling to also handle the interrupted case but looks really acceptable overall. While at it, we drop the useless, noisy and redundant WARN_ON() call. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ryan Wanner <ryan.wanner@microchip.com> Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-3-miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-geni-qcom: correctly handle -EPROBE_DEFER from dma_request_chan()Neil Armstrong2023-06-191-0/+2
|/ | | | | | | | | | | | Now spi_geni_grab_gpi_chan() errors are correctly reported, the -EPROBE_DEFER error should be returned from probe in case the GPI dma driver is built as module and/or not probed yet. Fixes: b59c122484ec ("spi: spi-geni-qcom: Add support for GPI dma") Fixes: 6532582c353f ("spi: spi-geni-qcom: fix error handling in spi_geni_grab_gpi_chan()") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230615-topic-sm8550-upstream-fix-spi-geni-qcom-probe-v2-1-670c3d9e8c9c@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: stm32: introduction of stm32h7 SPI device mode supportValentin Caron2023-06-152-34/+79
| | | | | | | | | | | Add support for stm32h7 to use SPI controller in device role. In such case, the spi instance should have the spi-slave property defined. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-5-valentin.caron@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: stm32: use dmaengine_terminate_{a}sync instead of _allAlain Volmat2023-06-151-5/+5
| | | | | | | | | | Avoid usage of deprecated dmaengine_terminate_all and use dmaengine_terminate_sync and dmaengine_terminate_async instead. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-3-valentin.caron@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: stm32: renaming of spi_master into spi_controllerAlain Volmat2023-06-151-77/+77
| | | | | | | | | | | | | Preparing introduction of SPI device, rename the spi_master structure into spi_controller. This doesn't have any functional impact since spi_master was already a macro for spi_controller. Referring now to ctrl instead of master since the spi_controller structure might not be used as a master controller only. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-2-valentin.caron@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: s3c64xx: CleanupsMark Brown2023-06-071-51/+30
|\ | | | | | | | | | | | | | | Merge series from Andi Shyti <andi.shyti@kernel.org>: Two small cleanups in the probe function. The first puts in use the managed spi master allocation while the second implements the dev_err_probe() function.
| * spi: s3c64xx: Use dev_err_probe()Andi Shyti2023-06-061-38/+27
| | | | | | | | | | | | | | | | | | Simplify the code by using dev_err_probe() instead of dev_err() and 'return'. Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230606012051.2139333-3-andi.shyti@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: s3c64xx: Use the managed spi master allocation functionAndi Shyti2023-06-061-18/+8
| | | | | | | | | | | | | | | | Use devm_spi_alloc_master() and get rid of one goto error path Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230606012051.2139333-2-andi.shyti@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: dw: Remove misleading comment for Mount Evans SoCAbe Kohandel2023-06-071-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove a misleading comment about the DMA operations of the Intel Mount Evans SoC's SPI Controller as requested by Serge. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Link: https://lore.kernel.org/linux-spi/20230606191333.247ucbf7h3tlooxf@mobilestation/ Fixes: 0760d5d0e9f0 ("spi: dw: Add compatible for Intel Mount Evans SoC") Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20230606231844.726272-1-abe.kohandel@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: dw: Add compatible for Intel Mount Evans SoCAbe Kohandel2023-06-061-0/+29
|/ | | | | | | | | | | | | | | | | | | | The Intel Mount Evans SoC's Integrated Management Complex uses the SPI controller for access to a NOR SPI FLASH. However, the SoC doesn't provide a mechanism to override the native chip select signal. This driver doesn't use DMA for memory operations when a chip select override is not provided due to the native chip select timing behavior. As a result no DMA configuration is done for the controller and this configuration is not tested. The controller also has an errata where a full TX FIFO can result in data corruption. The suggested workaround is to never completely fill the FIFO. The TX FIFO has a size of 32 so the fifo_len is set to 31. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230606145402.474866-2-abe.kohandel@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spl022: Probe defer is no errorMårten Lindahl2023-06-021-2/+2
| | | | | | | | | | | | | When the spi controller is registered and the cs_gpiods cannot be assigned, causing a defer of the probe, there is an error print saying: "probe - problem registering spi master" This should not be announced as an error. Print this message for all errors except for the probe defer. Signed-off-by: Mårten Lindahl <marten.lindahl@axis.com> Link: https://lore.kernel.org/r/20230602-pl022-defer-fix-v2-1-383f6bc2293a@axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-imx: fix mixing of native and gpio chipselects for imx51/imx53/imx6 ↵Rasmus Villemoes2023-06-021-13/+22
| | | | | | | | | | | | | | | | | | | | | | | variants Commit 87c614175bbf (spi: spi-imx: fix MX51_ECSPI_* macros when cs > 3) ensured that the argument passed to the macros was masked with &3, so that we no longer write outside the intended fields in the various control registers. When all chip selects are gpios, this works just fine. However, when a mix of native and gpio chip selects are in use, that masking is too naive. Say, for example, that SS0 is muxed as native chip select, and there is also a chip at 4 (obviously with a gpio cs). In that case, when accessing the latter chip, both the SS0 pin and the gpio pin will be asserted low. The fix for this is to use the ->unused_native_cs value as channel number for any spi device which uses a gpio as chip select. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20230602115731.708883-1-linux@rasmusvillemoes.dk Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: s3c64xx: Use devm_clk_get_enabled()Andi Shyti2023-06-011-34/+5
| | | | | | | | | Replace the tuple devm_clk_get()/clk_prepare_enable() with the single function devm_clk_get_enabled(). Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230531205550.568340-1-andi.shyti@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: dw: Drop empty line from DebugFS init functionSerge Semin2023-05-311-1/+0
| | | | | | | | | | | Just drop a redundant empty line from the dw_spi_debugfs_init() function left in the framework of the commit 0178f1e5d984 ("spi-dw-core.c: Fix error checking for debugfs_create_dir") after removing the last return statement. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20230530221725.26319-1-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-lpspi: downgrade log level for pio modeAlexander Stein2023-05-311-1/+1
| | | | | | | | | | Having no DMA is not an error. The simplest reason is not having it configured. SPI will still be usable, so raise a warning instead to get still some attention. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20230531072850.739021-1-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-qcom-qspi: Add newline to PIO fallback warningDouglas Anderson2023-05-301-1/+1
| | | | | | | | | | | | A warning added in commit b5762d95607e ("spi: spi-qcom-qspi: Add DMA mode support") was missing a newline. Add it. Reported-by: Stephen Boyd <swboyd@chromium.org> Closes: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/4573857/comment/44331d65_79128099/ Fixes: b5762d95607e ("spi: spi-qcom-qspi: Add DMA mode support") Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230530111348.1.Ibd1f4827e18a26dc802cd6e5ac300d83dc1bc41c@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Merge up fixes to help CIMark Brown2023-05-306-84/+78
|\ | | | | | | Get the fixes into CI for development.
| * spi: qup: Request DMA before enabling clocksStephan Gerhold2023-05-301-19/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is usually better to request all necessary resources (clocks, regulators, ...) before starting to make use of them. That way they do not change state in case one of the resources is not available yet and probe deferral (-EPROBE_DEFER) is necessary. This is particularly important for DMA channels and IOMMUs which are not enforced by fw_devlink yet (unless you use fw_devlink.strict=1). spi-qup does this in the wrong order, the clocks are enabled and disabled again when the DMA channels are not available yet. This causes issues in some cases: On most SoCs one of the SPI QUP clocks is shared with the UART controller. When using earlycon UART is actively used during boot but might not have probed yet, usually for the same reason (waiting for the DMA controller). In this case, the brief enable/disable cycle ends up gating the clock and further UART console output will halt the system completely. Avoid this by requesting the DMA channels before changing the clock state. Fixes: 612762e82ae6 ("spi: qup: Add DMA capabilities") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20230518-spi-qup-clk-defer-v1-1-f49fc9ca4e02@gerhold.net Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: mt65xx: make sure operations completed before unloadingDaniel Golle2023-05-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When unloading the spi-mt65xx kernel module during an ongoing spi-mem operation the kernel will Oops shortly after unloading the module. This is because wait_for_completion_timeout was still running and returning into the no longer loaded module: Internal error: Oops: 0000000096000005 [#1] SMP Modules linked in: [many, but spi-mt65xx is no longer there] CPU: 0 PID: 2578 Comm: block Tainted: G W O 6.3.0-next-20230428+ #0 Hardware name: Bananapi BPI-R3 (DT) pstate: 804000c5 (Nzcv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : __lock_acquire+0x18c/0x20e8 lr : __lock_acquire+0x9b8/0x20e8 sp : ffffffc009ec3400 x29: ffffffc009ec3400 x28: 0000000000000001 x27: 0000000000000004 x26: ffffff80082888c8 x25: 0000000000000000 x24: 0000000000000000 x23: ffffffc009609da8 x22: ffffff8008288000 x21: ffffff8008288968 x20: 00000000000003c2 x19: ffffff8008be7990 x18: 00000000000002af x17: 0000000000000000 x16: 0000000000000000 x15: ffffffc008d78970 x14: 000000000000080d x13: 00000000000002af x12: 00000000ffffffea x11: 00000000ffffefff x10: ffffffc008dd0970 x9 : ffffffc008d78918 x8 : 0000000000017fe8 x7 : 0000000000000001 x6 : 0000000000000000 x5 : ffffff807fb53910 x4 : 0000000000000000 x3 : 0000000000000027 x2 : 0000000000000027 x1 : 0000000000000000 x0 : 00000000000c03c2 Call trace: __lock_acquire+0x18c/0x20e8 lock_acquire+0x100/0x2a4 _raw_spin_lock_irq+0x58/0x74 __wait_for_common+0xe0/0x1b4 wait_for_completion_timeout+0x1c/0x24 0xffffffc000acc8a4 <--- used to be mtk_spi_transfer_wait spi_mem_exec_op+0x390/0x3ec spi_mem_no_dirmap_read+0x6c/0x88 spi_mem_dirmap_read+0xcc/0x12c spinand_read_page+0xf8/0x1dc spinand_mtd_read+0x1b4/0x2fc mtd_read_oob_std+0x58/0x7c mtd_read_oob+0x8c/0x148 mtd_read+0x50/0x6c ... Prevent this by completing in mtk_spi_remove if needed. Fixes: 9f763fd20da7 ("spi: mediatek: add spi memory support for ipm design") Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/ZFAF6pJxMu1z6k4w@makrotopia.org Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: lpspi: disable lpspi module irq in DMA modeClark Wang2023-05-231-1/+6
| | | | | | | | | | | | | | | | | | | | | | When all bits of IER are set to 0, we still can observe the lpspi irq events when using DMA mode to transfer data. So disable irq to avoid the too much irq events. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20230505063557.3962220-1-xiaoning.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: spi-cadence: Interleave write of TX and read of RX FIFOCharles Keepax2023-05-221-34/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When working in slave mode it seems the timing is exceedingly tight. The TX FIFO can never empty, because the master is driving the clock so zeros would be sent for those bytes where the FIFO is empty. Return to interleaving the writing of the TX FIFO and the reading of the RX FIFO to try to ensure the data is available when required. Fixes: a84c11e16dc2 ("spi: spi-cadence: Avoid read of RX FIFO before its ready") Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230518093927.711358-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: dw: Replace spi->chip_select references with function callsAmit Kumar Mahapatra2023-05-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | New set/get APIs for accessing spi->chip_select were introduced by 'commit 9e264f3f85a5 ("spi: Replace all spi->chip_select and spi->cs_gpiod references with function call")', but the 'commit 2c8606040a80 ("spi: dw: Add support for AMD Pensando Elba SoC")' uses the old interface by directly accessing spi->chip_select. So, replace all spi->chip_select references in the driver with new get/set APIs. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com Acked-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230515130343.63770-1-amit.kumar-mahapatra@amd.com Signed-off-by: Mark Brown <broonie@kernel.org
| * spi: spi-cadence: Only overlap FIFO transactions in slave modeCharles Keepax2023-05-151-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b1b90514eaa3 ("spi: spi-cadence: Add support for Slave mode") updated the code to trigger the IRQ when the FIFO was half empty, overlapping filling more data into the FIFO and sending what is left. This appears to cause regressions on the Zynq 7000, for transactions longer than the FIFO size, below that no overlapping occurs. It would appear from my testing that any attempt to put new data into the FIFO whilst data is still transmitting causes data corruption on both send and receive. If I am reading the commit message right on commit 49530e641178 ("spi: cadence: Add usleep_range() for cdns_spi_fill_tx_fifo()"), that would also seem to imply this is the case. On the assumption that this isn't an issue on the platform the original slave mode support was added for, update the cdns_transfer_one to only set the watermark to 50% of the FIFO size when in slave mode. There by retaining the new behaviour for slave mode but reverting to the older behaviour when the SPI is used a master. Fixes: b1b90514eaa3 ("spi: spi-cadence: Add support for Slave mode") Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com Link: https://lore.kernel.org/r/20230509164153.3907694-2-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
| * spi: spi-cadence: Avoid read of RX FIFO before its readyCharles Keepax2023-05-151-27/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent changes to cdns_spi_irq introduced some issues. Firstly, when writing the end of a longer transaction, the code in cdns_spi_irq will write data into the TX FIFO, then immediately fall into the if (!xspi->tx_bytes) path and attempt to read data from the RX FIFO. However this required waiting for the TX FIFO to empty before the RX data was ready. Secondly, the variable trans_cnt is now rather inaccurately named since in cases, where the watermark is set to 1, trans_cnt will be 1 but the count of bytes transferred would be much longer. Finally, when setting up the transaction we set the watermark to 50% of the FIFO if the transaction is great than 50% of the FIFO. However, there is no need to split a tranaction that is smaller than the whole FIFO, so anything up to the FIFO size can be done in a single transaction. Tidy up the code a little, to avoid repeatedly calling cdns_spi_read_rx_fifo with a count of 1, and correct the three issues noted above. Fixes: b1b90514eaa3 ("spi: spi-cadence: Add support for Slave mode") Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com Link: https://lore.kernel.org/r/20230509164153.3907694-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
| * spi: spi-geni-qcom: Select FIFO mode for chip selectVijaya Krishna Nivarthi2023-05-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Spi geni driver switches between FIFO and DMA modes based on xfer length. FIFO mode relies on M_CMD_DONE_EN interrupt for completion while DMA mode relies on XX_DMA_DONE. During dynamic switching, if FIFO mode is chosen, FIFO related interrupts are enabled and DMA related interrupts are disabled. And viceversa. Chip select shares M_CMD_DONE_EN interrupt with FIFO to check completion. Now, if a chip select operation is preceded by a DMA xfer, M_CMD_DONE_EN interrupt would have been disabled and hence it will never receive one resulting in timeout. For chip select, in addition to setting the xfer mode to FIFO, select_mode() to FIFO so that required interrupts are enabled. Fixes: e5f0dfa78ac7 ("spi: spi-geni-qcom: Add support for SE DMA mode") Suggested-by: Praveen Talari <quic_ptalari@quicinc.com Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com Reviewed-by: Douglas Anderson <dianders@chromium.org Link: https://lore.kernel.org/r/1683626496-9685-1-git-send-email-quic_vnivarth@quicinc.com Signed-off-by: Mark Brown <broonie@kernel.org
* | spi: add SPI_MOSI_IDLE_LOW mode bitMark Brown2023-05-302-2/+10
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Boerge Struempfel <boerge.struempfel@gmail.com>: Some spi controller switch the mosi line to high, whenever they are idle. This may not be desired in all use cases. For example neopixel leds can get confused and flicker due to misinterpreting the idle state. Therefore, we introduce a new spi-mode bit, with which the idle behaviour can be overwritten on a per device basis.
| * | spi: spidev: add two new spi mode bitsBoerge Struempfel2023-05-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allow userspace to set SPI_MOSI_IDLE_LOW and the SPI_3WIRE_HIZ mode bit using the SPI_IOC_WR_MODE32 ioctl. Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com> Link: https://lore.kernel.org/r/20230530141641.1155691-4-boerge.struempfel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-imx: add support for SPI_MOSI_IDLE_LOW mode bitBoerge Struempfel2023-05-301-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default, the spi-imx controller pulls the mosi line high, whenever it is idle. This behaviour can be inverted per CS by setting the corresponding DATA_CTL bit in the config register of the controller. Also, since the controller mode-bits have to be touched anyways, the SPI_CPOL and SPI_CPHA are replaced by the combined SPI_MODE_X_MASK flag. Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com> Link: https://lore.kernel.org/r/20230530141641.1155691-3-boerge.struempfel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | spi: mt65xx: Convert to platform remove callbackMark Brown2023-05-301-13/+17
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Uwe Kleine-König <u.kleine-koenig@pengutronix.de>: Hello, compared to (implicit) v1 sent in March with Message-Id: <20230309094704.2568531-1-u.kleine-koenig@pengutronix.de>, I reworked patch 1 on feedback by AngeloGioacchino Del Regno. Patches 2 and 3 got his Reviewed-by. Best regards Uwe Uwe Kleine-König (3): spi: mt65xx: Properly handle failures in .remove() spi: mt65xx: Convert to platform remove callback returning void spi: mt65xx: Don't disguise a "return 0" as "return ret" drivers/spi/spi-mt65xx.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) base-commit: ac9a78681b921877518763ba0e89202254349d1b -- 2.39.2
| * | | spi: mt65xx: Don't disguise a "return 0" as "return ret"Uwe Kleine-König2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because of the earlier if (ret) return ret; ret is always zero at the end of mtk_spi_suspend(). Write it as explicit return 0 for slightly improved clearness. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230530081648.2199419-4-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: mt65xx: Convert to platform remove callback returning voidUwe Kleine-König2023-05-301-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230530081648.2199419-3-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: mt65xx: Properly handle failures in .remove()Uwe Kleine-König2023-05-301-8/+14
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Returning an error code in a platform driver's remove function is wrong most of the time and there is an effort to make the callback return void. To prepare this rework the function not to exit early. There wasn't a real problem because if pm runtime resume failed the only step missing was pm_runtime_disable() which isn't an issue. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230530081648.2199419-2-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | | spi-dw-core.c: Fix error checking for debugfs_create_dirOsama Muhammad2023-05-301-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the error checking in spi-dw-core.c in debugfs_create_dir. The DebugFS kernel API is developed in a way that the caller can safely ignore the errors that occur during the creation of DebugFS nodes. Signed-off-by: Osama Muhammad <osmtendev@gmail.com> Link: https://lore.kernel.org/r/20230520224025.14928-1-osmtendev@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | spi: spi-sn-f-ospi: Make read-only array `width_available` static constLars-Peter Clausen2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `width_available` array is currently placed on the `f_ospi_supports_op_width()` function's stack. But the array is never modified. Make it `static const`. This makes the code slightly smaller and more efficient. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20230528195830.164669-3-lars@metafoo.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | | spi: spi-sn-f-ospi: Use min_t instead of opencoding itLars-Peter Clausen2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use `min_t` instead of `min` with casting the individual arguments. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20230528195830.164669-2-lars@metafoo.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | | spi: spi-sn-f-ospi: Use devm_clk_get_enabled()Lars-Peter Clausen2023-05-301-12/+1
| |/ |/| | | | | | | | | | | | | | | | | Replace the combination of devm_clk_get_enable() plus clk_prepare_enable() with devm_clk_get_enabled(). Slightly reduces the amount of boilerplate code. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20230528195830.164669-1-lars@metafoo.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: Switch i2c drivers back to use .probe()Uwe Kleine-König2023-05-262-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | After commit b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then 03c835f498b5 ("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230525211047.735789-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: mediatek: advertise the availability of Dual and Quad modeQii Wang2023-05-251-1/+2
| | | | | | | | | | | | | | | | | | | | this patch advertise the availability of Dual and Quad SPI mode for ipm design. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Tim.Kuo <Tim.kuo@mediatek.com> Link: https://lore.kernel.org/r/20230523112608.10298-1-qii.wang@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-imx: set max_native_cs for imx51/imx53/imx6 variantsRasmus Villemoes2023-05-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ecspi IP block on imx51/imx53/imx6 have four native chip selects. Tell that to the spi core so that any non-gpio chip selects get validated against that upper bound. Also set the SPI_MASTER_GPIO_SS so that the core verifies that, in the case where both native and gpio chip selects are in use, there is at least one leftover native chip select (or "channel", in the ecspi language) for use by the slaves sitting on gpio chip selects. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20230425134527.483607-3-linux@rasmusvillemoes.dk Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-imx: use "controller" variable consistently in spi_imx_probe()Rasmus Villemoes2023-05-231-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Near the top of the function, spi_imx->controller is set to controller (and is of course never modified again). The rest of the function uses a mix of the two expressions. For consistency, readability and better code generation, drop all the spi_imx-> indirections. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20230425134527.483607-2-linux@rasmusvillemoes.dk Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-cadence: Add missing kernel doc for clk_rate in cdns_spiCharles Keepax2023-05-231-0/+1
| | | | | | | | | | | | | | | | Add the missing kernel documentation to silence the build warning. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230523090124.3132-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: hisi-kunpeng: Fix error checkingYeqi Fu2023-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The function debugfs_create_dir returns ERR_PTR if an error occurs, and the appropriate way to verify for errors is to use the inline function IS_ERR. The patch will substitute the null-comparison with IS_ERR. Suggested-by: Ivan Orlov <ivan.orlov0322@gmail.com Signed-off-by: Yeqi Fu <asuk4.q@gmail.com Link: https://lore.kernel.org/r/20230518052515.368978-1-asuk4.q@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org
* | spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoCBrad Larson2023-05-171-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | The AMD Pensando Elba SoC has the Cadence QSPI controller integrated. The quirk CQSPI_NEEDS_APB_AHB_HAZARD_WAR is added and if enabled a dummy readback from the controller is performed to ensure synchronization. Signed-off-by: Brad Larson <blarson@amd.com Link: https://lore.kernel.org/r/20230515181606.65953-8-blarson@amd.com Signed-off-by: Mark Brown <broonie@kernel.org
* | spi: dw: Round of n_bytes to power of 2Joy Chakraborty2023-05-151-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | n_bytes variable in the driver represents the number of bytes per word that needs to be sent/copied to fifo. Bits/word can be between 8 and 32 bits from the client but in memory they are a power of 2, same is mentioned in spi.h header: " * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). * This may be changed by the device's driver, or left at the * default (0) indicating protocol words are eight bit bytes. * The spi_transfer.bits_per_word can override this for each transfer. " Hence, round of n_bytes to a power of 2 to avoid values like 3 which would generate unalligned/odd accesses to memory/fifo. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Fixes: a51acc2400d4 ("spi: dw: Add support for 32-bits max xfer size") Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com Signed-off-by: Joy Chakraborty <joychakr@google.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com Tested-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230512104746.1797865-4-joychakr@google.com Signed-off-by: Mark Brown <broonie@kernel.org
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