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*---. Merge remote-tracking branches 'spi/fix/pxa2xx', 'spi/fix/qup' and ↵Mark Brown2014-06-283-35/+21
|\ \ \ | | | | | | | | | | | | 'spi/fix/sh-sci' into spi-linus
| | | * spi: sh-sci: fix use-after-free in sh_sci_spi_remove()Jürg Billeter2014-06-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | setbits() uses sp->membase. Signed-off-by: Jürg Billeter <j@bitron.ch> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: qup: Remove chip select functionAndy Gross2014-06-221-27/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the chip select function. Chip select should instead be supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI core assert/deassert the chip select as it sees fit. The chip select control inside the controller is buggy. It is supposed to automatically assert the chip select based on the activity in the controller, but it is buggy and doesn't work at all. So instead we elect to use GPIOs. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: qup: Fix order of spi_register_masterAndy Gross2014-06-211-4/+7
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the devm_spi_register_master below the initialization of the runtime_pm. If done in the wrong order, the spi_register_master fails if any probed slave devices issue SPI transactions. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * / spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPIChew, Chiau Ee2014-06-171-2/+6
|/ / | | | | | | | | | | | | | | | | | | It was observed that after module removal followed by insertion, the SW mode chipselect is not properly set. Thus causing transfer failure due to incorrect CS toggling. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* / spi/pxa2xx: change default supported DMA burst size to 1Chew, Chiau Ee2014-06-061-1/+1
|/ | | | | | | | | | | | | | | | | This is to fix the SPI DMA transfer failure for speed less than 1M. If using current DMA burst size setting (16), the Rx data bytes are invalid due to each data byte is multiplied according to the burst size setting. Let's said supposedly we shall receive the following 18 bytes of data: 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 Instead, the data bytes received consist of "16 bytes of '01' + 2 bytes of '02'" : 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 02 02 Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* Merge remote-tracking branch 'spi/topic/workqueue' into spi-nextMark Brown2014-06-0212-12/+0
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| * spi: Remove unneeded include of linux/workqueue.hAxel Lin2014-04-1412-12/+0
| | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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*-----. \ Merge remote-tracking branches 'spi/topic/oom', 'spi/topic/pxa2xx', ↵Mark Brown2014-06-0210-580/+467
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | 'spi/topic/rspi' and 'spi/topic/sirf' into spi-next
| | | | * | spi: sirf: decrease the interrupt count and latency of PIO modeQipan Li2014-05-211-47/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | current PIO tranfer method be described as follows: 1. fill as much as bytes but no more than 256 bytes(fifo size) 2. enable oflow/uflow/txfifo_empty interrupt 3. isr process 3 interrupt signal, do complete works. 4. after isr done, if there are left bytes go into 1 else go into 5 5. transfer end by current PIO transfer method: 1. reduce interrupt counts in spi interrupt line. 2. reduce interrupt latency because no do data fill/fetch in isr. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: sirf: refactor spi transfer functionsQipan Li2014-04-151-109/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | split sirfsoc_spi_transfer function into 3 sub-functions: spi_sirfsoc_cmd_transfer, spi_sirfsoc_pio_transfer and spi_sirfsoc_dma_transfer. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: sirf: fix spi full-duplex DMA transferring issueQipan Li2014-04-141-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sometimes t->tx can be equal with t->rx. for example, spidev will make tx and rx point to spidev->buffer at the same time. currently, for this case, we map the buffer BIDIRECTION to fix the cache consistency. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: sirf: fix line over 80 characters style issueQipan Li2014-04-141-19/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix a lot of "line over 80 characters" checkpatch issues, on which the users of the driver, key customers care about this very much. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Extract rspi_common_transfer()Geert Uytterhoeven2014-06-021-37/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extract the common parts of rspi_transfer_one(), rspi_rz_transfer_one(), and qspi_transfer_out_in() into the new function rspi_common_transfer(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Add DMA support for RSPI on RZ/A1HGeert Uytterhoeven2014-06-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable DMA support for RSPI on r7s72100 (RZ/A1H). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Add DMA support for QSPI on R-Car Gen2Geert Uytterhoeven2014-06-021-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable DMA support for QSPI on R-Car Gen2, for Single, Dual, and Quad SPI Transfers. Performance figures for reading from a QSPI FLASH driven at 24.375 MHz on r8a7791/koelsch: - Single: 1.1 Mbps PIO, 23 Mbps DMA - Dual : 12.7 Mbps PIO, 48 Mbps DMA - Quad : 13 Mbps PIO, 70 Mbps DMA Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Absorb rspi_rz_transfer_out_in() into rspi_rz_transfer_one()Geert Uytterhoeven2014-06-021-11/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Merge rspi_*_dma() into rspi_dma_transfer()Geert Uytterhoeven2014-06-021-78/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rspi_send_dma() and rspi_send_receive_dma() are very similar. Consolidate into a single function rspi_dma_transfer(), and add missing checks for dmaengine_submit() failures. Both sg_table pointer parameters can be NULL, as RSPI supports TX-only mode, and unidirectional DMA transfers will also be needed later for Dual/Quad DMA support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Pass sg_tables instead of spi_tranfer to rspi_*_dma()Geert Uytterhoeven2014-06-021-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA routines only need access to the scatter-gather tables inside the spi_transfer structures, hence just pass those. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Move RSPI-specific setup out of DMA routinesGeert Uytterhoeven2014-06-021-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor RSPI (on SH) DMA handling to make it reusable for other RSPI implementations: - Call the DMA routines after configuring the TX Mode bit and after calling rspi_receive_init(), so these RSPI-specific operations can be removed from the DMA routines, - Absorb rspi_transfer_out_in() into rspi_transfer_one(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Use SPI core DMA mapping frameworkGeert Uytterhoeven2014-06-021-90/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the SPI core DMA mapping framework instead of our own. If available, DMA is used for transfers larger than the FIFO size (8 or 32 bytes). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: SPI DMA core needs both RX and TX DMA to functionGeert Uytterhoeven2014-06-021-22/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI DMA core framework needs both RX and TX DMA to function. As a preparation for converting the driver to use this framework, fall back to PIO if no DMA channel or only one DMA channel is available. This affects only RSPI, which could do DMA transfers for TX-only before. RSPI-RZ and QSPI (at least for Single SPI Transfers) will need both RX and TX DMA anyway. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Remove unneeded resource test in DMA setupGeert Uytterhoeven2014-06-021-12/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The resource is know to exist, as rspi_probe() already mapped it. Remove the test, and just pass the resource. Pass the device pointer instead of the platform device pointer, as the latter is no longer needed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Extract rspi_request_dma_chan()Geert Uytterhoeven2014-06-021-34/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup of the receive and transmit DMA channels is very similar, so let's consolidate. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Don't consider DMA configuration failures fatalGeert Uytterhoeven2014-06-021-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fall back to PIO if DMA configuration failed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Extract rspi_pio_transfer()Geert Uytterhoeven2014-06-021-62/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The various PIO loops are very similar. Consolidate into a single function rspi_pio_transfer(). Both buffer pointers can be NULL, as RSPI supports TX-only mode, and Dual/Quad SPI Transfers are unidirectional. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Use core SPI_MASTER_MUST_[RT]X handlingGeert Uytterhoeven2014-06-021-74/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RSPI needs dummy transfers to generate the SPI clock on receive. RSPI-RZ and QSPI always do both transmit and receive. Use the SPI core SPI_MASTER_MUST_RX/SPI_MASTER_MUST_TX infrastructure instead of checking for the presence of buffers and providing dummy data ourselves (for PIO), or providing a dummy buffer (for DMA). rspi_receive_dma() now provides full duplex DMA transfers on RSPI, and is renamed to rspi_send_receive_dma(). As the SPI core will always provide a TX buffer, the logic to choose between DMA send and DMA send/receive in rspi_transfer_one() now has to check for the presence of an RX buffer. Likewise for the DMA availability tests in rspi_is_dma(). The buffer tests in qspi_transfer_one() are now always true, so they're removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Remove unused 16-bit DMA supportGeert Uytterhoeven2014-06-021-78/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 16-bit DMA support doesn't fit well within the SPI core DMA framework, as it needs to manage its own double-sized temporary buffers, for handling the interleaved data. Remove it, as there is no in-tree board code that sets rspi_plat_data.dma_width_16bit. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Do not call rspi_receive_init() for TX-onlyGeert Uytterhoeven2014-06-021-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 8449fd76deb9ac67a15a6fb8ead7bb4595d019d2 ("spi: rspi: Merge rspi_send_pio() and rspi_receive_pio()"), rspi_receive_init() is called for transmit-only transfers too, while this is not needed. Only call rspi_receive_init() when receiving, to preserve behavior on RSPI on SH. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Extract rspi_wait_for_{tx_empty,rx_full}()Geert Uytterhoeven2014-06-021-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: rspi: Round up division to avoid slave overclockingGeert Uytterhoeven2014-05-261-3/+5
| | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The calculation of the bit rate divider used a standard C division, which rounds down the quotient. This may lead to a higher bitrate than requested. Round up to avoid this. E.g. on Koelsch, the SPI flash (configured for 30 MHz) was driven at 48.75 MHz. After this patch it's driven at a safe 24.375 MHz. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | | spi/pxa2xx: fix runtime PM enabling orderAntonio Ospite2014-06-011-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 7dd62787334ac6e0e2a0ef3f20bb1936ac431b04 (spi/pxa2xx: Convert to core runtime PM) master->auto_runtime_pm was set to true. In this case pm_runtime_enable() must be called *before* spi_register_master(), otherwise the kernel hangs with this error message: spi_master spi0: Failed to power device: -13 A similar fix, but for spi/hspi, was applied in 268d76430d1b68c340687357ffd18b4b12d02269. Signed-off-by: Antonio Ospite <ao2@ao2.it> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | | spi/pxa2xx-pci: Add PCI mode support for BayTrail LPSS SPIChew, Chiau Ee2014-04-181-15/+61
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to CE4100, BayTrail LPSS SPI can be PCI enumerated as well. Thus, the functions are renamed from ce4100_xxx to pxa2xx_spi_pci_xxx to clarify that this is a generic PCI glue layer. Also, added required infrastructure to support SPI hosts with different configurations. This patch is based on Mika Westerberg's previous work. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: topcliff-pch: remove unnecessary OOM messagesJingoo Han2014-04-291-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: tle62x0: remove unnecessary OOM messagesJingoo Han2014-04-291-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: sh-msiof: remove unnecessary OOM messagesJingoo Han2014-04-291-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: s3c64xx: remove unnecessary OOM messagesJingoo Han2014-04-291-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: s3c24xx: remove unnecessary OOM messagesJingoo Han2014-04-291-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: pxa2xx: remove unnecessary OOM messagesJingoo Han2014-04-291-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: pl022: remove unnecessary OOM messagesJingoo Han2014-04-291-10/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | spi: s3c24xx: Convert to use devm_kzallocAxel Lin2014-04-141-7/+3
| |/ / | | | | | | | | | | | | | | | | | | | | | Simplify the cleanup code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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*-----. \ \ Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/fsl', ↵Mark Brown2014-06-0213-209/+95
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'spi/topic/fsl-espi' and 'spi/topic/id-const' into spi-next
| | | | * | | spi: tegra20-slink: Make of_device_id array constJingoo Han2014-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | spi: tegra20-sflash: Make of_device_id array constJingoo Han2014-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | spi: tegra114: Make of_device_id array constJingoo Han2014-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | spi: qup: Make of_device_id array constJingoo Han2014-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | spi: spi-gpio: Make of_device_id array constJingoo Han2014-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | spi: fsl-dspi: Make of_device_id array constJingoo Han2014-05-071-1/+1
| | | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi/fsl-espi: fix rx_buf in fsl_espi_cmd_trans()/fsl_espi_rw_trans()Valentin Longchamp2014-05-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default for every espi transfer, the rx_buf is placed right after the tx_buf. This can lead to a buffer overflow when the size of both the TX and RX data cumulated is higher than the allocated 64K buffer for the transfer (this is the case when sending for instance a read command and reading 64K back, please see: http://article.gmane.org/gmane.linux.drivers.mtd/53411 ) This gets fixed by always setting the RX buffer pointer at the begining of the transfer buffer. [The driver shouldn't be doing the copy in the first place and instead sending directly from the supplied buffer but this is at least not worse than what's there -- broonie] Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | | spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFTJane Wan2014-04-161-4/+30
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers (n=0,1,2,3) configurable through device tree. CSnBEF is the chip select setup time. It's the delay in bits from the activation of chip select pin to the first clock for data frame. CSnAFT is the chip select hold time. It's the delay in bits from the last clock for data frame to the deactivation of chip select pin. The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set them to a different value for some device. Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com> Signed-off-by: Mark Brown <broonie@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 21:16:47 +0100