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* spi: pxa2xx: Add ready signalLubomir Rintel2018-11-132-1/+18
| | | | | | | | | | | Strobe a GPIO line when the slave TX FIFO is filled. This is how the Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI master, learns that it can initiate a transaction. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add slave mode supportLubomir Rintel2018-11-131-7/+74
| | | | | | | | | Tested on an OLPC XO-1.75 machine, where the Embedded Controller happens to be a SPI master. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Deal with slaves that return from transfer_one() unfinishedLubomir Rintel2018-11-131-23/+39
| | | | | | | | | | | | | | | Some drivers, such as spi-pxa2xx return from the transfer_one callback immediately, idicating that the transfer will be finished asynchronously. Normally, spi_transfer_one_message() synchronously waits for the transfer to finish with wait_for_completion_timeout(). For slaves, we don't want the transaction to time out as it can complete in a long time in future. Use wait_for_completion_interruptible() instead. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Kconfig: Enable McSPI driver for K3 platformsVignesh R2018-11-071-1/+1
| | | | | | | | Enable McSPI driver to be built for K3 platforms, to support McSPI on AM654 SoC of K3 family. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'spi-4.20' into spi-4.21 for uniphier DTMark Brown2018-11-061-2/+2
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| * spi: mediatek: use correct mata->xfer_len when in fifo transferLeilk Liu2018-10-311-2/+2
| | | | | | | | | | | | | | | | | | when xfer_len is greater than 64 bytes and use fifo mode to transfer, the actual length from the third time is mata->xfer_len but not len in mtk_spi_interrupt(). Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: Add MXIC controller driverMason Yang2018-11-053-0/+626
| | | | | | | | | | | | | | | | Add a driver for Macronix SPI controller IP. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-rspi: simplify getting .driver_dataWolfram Sang2018-11-051-4/+2
| | | | | | | | | | | | | | | | We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-zynqmp-gqspi: simplify getting .driver_dataWolfram Sang2018-11-051-4/+2
| | | | | | | | | | | | | | | | We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-sh-msiof: simplify getting .driver_dataWolfram Sang2018-11-051-4/+2
| | | | | | | | | | | | | | | | We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-geni-qcom: Simplify probe functionAlok Chauhan2018-11-051-25/+24
| | | | | | | | | | | | | | | | | | | | Re-arrange existing APIs in probe function to avoid using goto and remove redundant variables. Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-geni-qcom: fix nitpicksAlok Chauhan2018-11-051-9/+6
| | | | | | | | | | | | | | | | | | fixed the nitpicks. Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: use IRQF_SHARED mode to request IRQChuanhua Han2018-11-051-2/+2
| | | | | | | | | | | | | | | | | | | | Some SoC share one irq number between DSPI controllers. For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number. In this case, only one DSPI controller can register successfully, and others will fail. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: mediatek: add spi support for mt8183 ICLeilk Liu2018-11-051-0/+9
| | | | | | | | | | | | | | this patch add support for mt8183 IC. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: pxa2xx: Remove LPSS private register restoring during resumeJarkko Nikula2018-11-051-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel LPSS private register restoring in spi-pxa2xx.c: pxa2xx_spi_resume() was added before there was no any other code restoring them. This was changed after following commits for previous and current LPSS platforms: c78b0830667a ("ACPI / LPSS: custom power domain for LPSS") 41a3da2b8e16 ("mfd: intel-lpss: Save register context on suspend") However there is one caveat: There is no LPSS private register context save/restore for the Intel Lynxpoint in the Linux kernel code. I did some debugging on one Lynxpoint based device I have and on it the LPSS register context is not lost over suspend/resume cycle (s2idle). Which happens for instance on Intel Braswell. I'm speculating but I guess either firmware does it or the LPSS is kept always on Lynxpoint. Given that we haven't needed to implement Lynxpoint LPSS I2C or UART private register context save/restore over four years time I think we are safe to remove this LPSS private register restoring during resume here. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: support lsb-first modeEmil Renner Berthing2018-11-051-1/+3
| | | | | | | | | | | | | | | | Add missing support for lsb-first mode. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: support 4bit wordsEmil Renner Berthing2018-11-051-12/+29
| | | | | | | | | | | | | | | | | | The hardware supports 4, 8 and 16bit spi words, so add the missing support for 4bit words. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: use irq rather than pollingEmil Renner Berthing2018-11-051-63/+92
| | | | | | | | | | | | | | | | | | Register an interrupt handler to fill/empty the tx and rx fifos rather than busy-looping. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: precompute rx sample delayEmil Renner Berthing2018-11-051-18/+18
| | | | | | | | | | | | | | | | | | | | Now that we no longer potentially change spi clock at runtime we can precompute the rx sample delay at probe time rather than for each transfer. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: set min/max speedEmil Renner Berthing2018-11-051-32/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver previously checked each transfer if the requested speed was higher than possible with the current spi clock rate and raised the clock rate accordingly. However, there is no check to see if the spi clock was actually set that high and no way to dynamically lower the spi clock rate again. So it seems any potiential users of this functionality are better off just setting the spi clock rate at init using the assigned-clock-rates devicetree property. Removing this dynamic spi clock rate raising allows us let the spi framework handle min/max speeds for us. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: simplify use_dma logicEmil Renner Berthing2018-11-051-11/+7
| | | | | | | | | | | | | | | | | | | | We only need to know if we're using dma when setting up the transfer, so just use a local variable for that. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: remove master pointer from dev dataEmil Renner Berthing2018-11-051-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | In almost all cases we already have a pointer to the spi master structure where we have the driver data. The only exceptions are the dma callbacks which are easily fixed by passing them the master and using spi_master_get_devdata to retrieve the driver data. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: don't store dma channels twiceEmil Renner Berthing2018-11-051-42/+34
| | | | | | | | | | | | | | | | | | | | The spi master (aka spi controller) structure already has two fields for storing the rx and tx dma channels. Just use them rather than duplicating them in driver data. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: read transfer info directlyEmil Renner Berthing2018-11-051-46/+24
| | | | | | | | | | | | | | | | | | | | Just read transfer info directly from the spi device and transfer structures rather than storing it in driver data first. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: disable spi on errorEmil Renner Berthing2018-11-051-25/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Successful transfers leave the spi disabled, so if we just make sure to disable the spi on error there should be no need to disable the spi from master->unprepare_message. This also flushes the tx and rx fifos, so no need to do that manually. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: use atomic_t stateEmil Renner Berthing2018-11-051-50/+25
| | | | | | | | | | | | | | | | | | | | | | | | The state field is currently only used to make sure only the last of the tx and rx dma callbacks issue an spi_finalize_current_transfer. Rather than using a spinlock we can get away with just turning the state field into an atomic_t. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: always use SPI modeEmil Renner Berthing2018-11-051-13/+4
| | | | | | | | | | | | | | | | | | | | | | The hardware supports 3 different variants of SPI and there were some code around it, but nothing to actually set it to anything but "Motorola SPI". Just drop that code and always use that mode. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: use designated init for dma configEmil Renner Berthing2018-11-051-12/+14
| | | | | | | | | | | | | | | | | | | | Use C99 designated initializers for dma slave config structures. This also makes sure uninitialized fields are zeroed so we don't need an explicit memset. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rockchip: make spi_enable_chip take boolEmil Renner Berthing2018-11-051-9/+9
| | | | | | | | | | | | | | | | | | The spi_enable_chip function takes a boolean argument. Change the type to reflect that. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | Merge tag 'mfd-next-4.20' of ↵Linus Torvalds2018-10-253-0/+441
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers - Add support for USART SPI to AT91* New Functionality - Add support for Audio CODECs to motorola-cpcap Fix-ups - DT documentation fix-ups; atmel-usart - Staticise functions/structs; spi-at91-usart, arizona-core - Constify; ti-lmu - Fix memory leaks; menelaus - Change device 'wake-up' status; ti_am335x_tscadc, max8997 - Power Management (suspend/resume) semantic changes; ti_am335x_adc, cros_ec, max8997 - SPDX churn; sec-core (+ headers), max* (+ headers), intel* (+ headers), - Trivial (whitespace, email addresses, alphabetisise); Kconfig, adp5520, intel_soc_pmic_* - Build as module; sec-irq - Use new %pOFn printk format for device_node.name; max77620 - Remove unused code; madera - Use generic MACROs; intel_msic, intel_soc_pmic_crc - Move to GPIOD; ti-lmu - Use managed resources; ti-lmu Bug Fixes - Add missing headers; at91-usart - Prevent device from entering low-power mode; arizona-core - Poll for BOOT_DONE to avoid still-booting NACK; madera-core - Prevent ADC read from shutting down device; mc13xxx-core" * tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (45 commits) mfd: cros_ec: Avoid unneeded internal declaration warning mfd: ti-lmu: Use of_device_get_match_data() helper mfd: ti-lmu: Use managed resource for everything mfd: ti-lmu: Switch to GPIOD mfd: ti-lmu: constify mfd_cell tables mfd: max8997: Disable interrupt handling for suspend/resume cycle mfd: max8997: Enale irq-wakeup unconditionally mfd: arizona: Make array mclk_name static, shrinks object size MAINTAINERS: Add myself as designated reviewer of Intel MFD PMIC mfd: Convert Intel PMIC drivers to use SPDX identifier 1;5201;0c Reduce size of duplicated comments by switching to use SPDX identifier. mfd: Sort headers alphabetically for Intel PMIC drivers mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well mfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro mfd: intel_soc_pmic_crc: Use DEFINE_RES_IRQ_NAMED() macro mfd: intel_msic: Use DEFINE_RES_IRQ() macro mfd: motorola-cpcap: Add audio-codec support mfd: mc13xxx-core: Fix PMIC shutdown when reading ADC values mfd: madera: Remove unused forward reference mfd: max77620: Convert to using %pOFn instead of device_node.name mfd: madera: Don't use regmap_read_poll_timeout to poll for BOOT_DONE ...
| * | spi: at91-usart: Make local functions staticLee Jones2018-09-111-7/+7
| | | | | | | | | | | | | | | Suggested-by: Radu Nicolae Pirea <pirea.radu@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
| * | spi: at91-usart: Add driver for at91-usart as SPIRadu Pirea2018-09-103-0/+441
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the driver for at91-usart in spi mode. The USART IP can be configured to work in many modes and one of them is SPI. The driver was tested on sama5d3-xplained and sama5d4-xplained boards with enc28j60 ethernet controller as slave. Signed-off-by: Radu Pirea <radu.pirea@microchip.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviwed-by: Mark Brown <broonie@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | | Merge remote-tracking branch 'spi/topic/of' into spi-nextMark Brown2018-10-211-2/+5
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| * | | spi: make OF helper available for othersMarco Felsch2018-09-281-2/+5
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The of_find_spi_device_by_node() helper function is useful for other modules too. Export the funciton as GPL like all other spi helper functions and make it available if CONFIG_OF is enabled, because it isn't related to the CONFIG_OF_DYNAMIC context. Finally add a stub if CONFIG_OF isn't enabled, so others must not care about it. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* | | Merge branch 'spi-4.20' into spi-nextMark Brown2018-10-2135-321/+3683
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| * | spi: Allow building SPI_BCM63XX_HSSPI on ARM-based SoCsFlorian Fainelli2018-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | ARM-based 63xx DSL platforms have the spi-bcm63xx-hsspi controller present, allow using this driver there as well. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: omap2-mcspi: Add slave mode supportVignesh R2018-10-191-16/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to use McSPI controller as SPI slave. In slave mode, DMA TX completion does not mean entire data has been shifted out as data might still be stuck in FIFO waiting for master to clock the bus. Therefore, add an IRQ handler for slave mode to know when entire data in FIFO has been shifted out. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: omap2-mcspi: Set FIFO DMA trigger level to word lengthVignesh R2018-10-191-19/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | McSPI has 32 byte FIFO in Transmit-Receive mode. Current code tries to configuration FIFO watermark level for DMA trigger to be GCD of transfer length and max FIFO size which would mean trigger level may be set to 32 for transmit-receive mode if length is aligned. This does not work in case of SPI slave mode where FIFO always needs to have data ready whenever master starts the clock. With DMA trigger size of 32 there will be a small window during slave TX where DMA is still putting data into FIFO but master would have started clock for next byte, resulting in shifting out of stale data. Similarly, on Slave RX side there may be RX FIFO overflow Fix this by setting FIFO watermark for DMA trigger to word length. This means DMA is triggered as soon as FIFO has space for word length bytes and DMA would make sure FIFO is almost always full therefore improving FIFO occupancy in both master and slave mode. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: omap2-mcspi: Switch to readl_poll_timeout()Vignesh R2018-10-191-13/+4
| | | | | | | | | | | | | | | | | | | | | Use standard readl_poll_timeout() macro for polling on status bits. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-mem: add stm32 qspi controllerLudovic Barre2018-10-193-0/+522
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The qspi controller is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory tested on: -NOR: mx66l51235l -NAND: MT29F2G01ABAGD Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pic32-sqi: don't pass GFP_DMA32 to dma_alloc_coherentChristoph Hellwig2018-10-171-1/+1
| | | | | | | | | | | | | | | | | | | | | The DMA API does its own zone decisions based on the coherent_dma_mask. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: use PIO mode if size is smallRobin Gong2018-10-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Use PIO mode instead if size is smaller than fifo size, since dma may be less efficient. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: correct wml as the last sg lengthRobin Gong2018-10-121-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct wml as the last rx sg length instead of the whole transfer length. Otherwise, mtd_stresstest will be failed as below: insmod mtd_stresstest.ko dev=0 ================================================= mtd_stresstest: MTD device: 0 mtd_stresstest: not NAND flash, assume page size is 512 bytes. mtd_stresstest: MTD device size 4194304, eraseblock size 65536, page size 512, count of eraseblocks 64, pa0 mtd_stresstest: doing operations mtd_stresstest: 0 operations done mtd_test: mtd_read from 1ff532, size 880 mtd_test: mtd_read from 20c267, size 64998 spi_master spi0: I/O Error in DMA RX m25p80 spi0.0: SPI transfer failed: -110 spi_master spi0: failed to transfer one message from queue mtd_test: error: read failed at 0x20c267 mtd_stresstest: error -110 occurred ================================================= insmod: ERROR: could not insert module mtd_stresstest.ko: Connection timed out Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: move wml setting to later than setup_transferRobin Gong2018-10-121-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current dynamic burst length is based on the whole transfer length, that's ok if there is only one sg, but is not right in case multi sgs in one transfer,because the tail data should be based on the last sg length instead of the whole transfer length. Move wml setting for DMA to the later place, thus, the next patch could get the right last sg length for wml setting. This patch is a preparation one, no any function change involved. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: Make GPIO CSs honour the SPI_NO_CS flagPhil Elwell2018-10-121-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI configuration state includes an SPI_NO_CS flag that disables all CS line manipulation, for applications that want to manage their own chip selects. However, this flag is ignored by the GPIO CS code in the SPI framework. Correct this omission with a trivial patch. Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xx: Add devicetree supportLubomir Rintel2018-10-111-29/+44
| | | | | | | | | | | | | | | | | | | | | | | | The MMP2 platform, that uses device tree, has this controller. Let's add devicetree alongside platform & PCI. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pxa2xx: Use an enum for typeLubomir Rintel2018-10-111-3/+3
| | | | | | | | | | | | | | | | | | | | | That seems to be the correct type. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-geni-qcom: Add SPI driver support for GENI based QUPGirish Mahadevan2018-10-113-0/+716
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver supports GENI based SPI Controller in the Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a programmable module supporting a wide range of serial interfaces including SPI. This driver supports SPI operations using FIFO mode of transfer. Signed-off-by: Girish Mahadevan <girishm@codeaurora.org> Signed-off-by: Dilip Kota <dkota@codeaurora.org> Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: rockchip: simplify spi enable logicEmil Renner Berthing2018-10-111-19/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the dma/non-dma code paths handle the spi enable flag themselves. This removes some logic to determine if the flag should be turned on before or after dma and also don't leave the spi enabled if the dma path fails. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: rockchip: directly use direction constantsEmil Renner Berthing2018-10-111-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The dma direction for the tx and rx dma channels never change, so just use the constants directly rather than storing them in device data. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-24 06:15:37 +0100