summaryrefslogtreecommitdiffstats
path: root/drivers/usb/host/ehci-sysfs.c (unfollow)
Commit message (Collapse)AuthorFilesLines
2015-08-13gpio: brcmstb: Add interrupt and wakeup source supportGregory Fong2-6/+257
Uses the gpiolib irqchip helpers. For this to work, the irq setup function is called once per bank instead of once per device. Note that all known uses of this block have a BCM7120 L2 interrupt controller as a parent. Supports interrupts for all GPIOs. In the IRQ handler, we check for raised IRQs for invalid GPIOs and warn (ratelimited) if they're encountered. Also, several drivers (e.g. gpio-keys) allow for GPIOs to be configured as wakeup sources, and this GPIO controller supports that through a separate interrupt path. The de-facto standard DT property "wakeup-source" is checked, since that indicates whether the GPIO controller hardware can wake. Uses the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have any of its own wakeup source configuration. Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me) that you can have multiple chained irqchips and associated IRQ domains for a single parent IRQ, and as long as the xlate function is written correctly, a GPIO IRQ request end up checking the correct domain and will get associated with the correct IRQ. What helps make this clear is to read drivers/gpio/gpiolib-of.c: - of_gpiochip_find_and_xlate() - of_get_named_gpiod_flags() drivers/gpio/gpiolib.c: - gpiochip_find() Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-13gpio/ABI: document what is already the caseLinus Walleij1-1/+2
commit 926b663ce8215ba448960e1ff6e58b67a2c3b99b "gpiolib: allow GPIOs to be named" added the ability to name GPIO lines by an array of names stored in the GPIO chip. This was in 2009 and has been an ABI since. Let's document it properly. Cc: Daniel Silverstone <dsilvers@digital-scurf.org> Cc: Markus Pargmann <mpa@pengutronix.de> Cc: Johan Hovold <johan@kernel.org> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-03gpio: etraxfs: add interrupt supportRabin Vincent2-7/+253
On ETRAX FS, all pins on the first port (and only the first port) have interrupt support. On ARTPEC-3, all pins on all ports have interrupt support. However, there are only eight interrupts. Each of the interrupts is associated with a group of pins and for each interrupt the one pin from the group which will trigger it can be selected. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-03gpio: don't override irq_*_resources() callbacksRabin Vincent1-2/+10
If the driver has specified its own irq_{request/release}_resources() functions, don't override them. The gpio-etraxfs driver will use this. Signed-off-by: Rabin Vincent <rabin@rab.in> [Added a small comment blurb] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-28gpio: mpc8xxx: Convert mpc8xxx_gpio_chip.lock to raw_spinlockAlexander Stein1-24/+24
mpc8xxx_gpio_chip.lock needs to be a real spinlock in preempt-rt. Especially the interrupt related functions can not be converted to a sleeping lock. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-28gpio: defer probe if pinctrl cannot be foundTomeu Vizoso3-12/+24
When an OF node has a pin range for its GPIOs, return -EPROBE_DEFER if the pin controller isn't available. Otherwise, the GPIO range wouldn't be set at all unless the pin controller probed always before the GPIO chip. With this change, the probe of the GPIO chip will be deferred and will be retried at a later point, hopefully once the pin controller has been registered and probed already. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-28gpio: kill off set_irq_flags usageRob Herring14-57/+10
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed as most platforms don't use probing. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Cc: linux-tegra@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27gpio: etraxfs: add support for ARTPEC-3Rabin Vincent2-7/+62
Add support for the GIO block in the ARTPEC-3 SoC. The basic functionality is essentialy the same as the version in the ETRAX FS, except for a different set of ports, including a read-only port. Cc: devicetree@vger.kernel.org Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27gpio: generic: support input-only chipsRabin Vincent2-3/+21
Allow chips to indicates that they are input-only and thus cannot set the output value. This will be used by the gpio-etraxfs driver. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27gpio: etraxfs: fix set register flagRabin Vincent1-1/+1
BGPIO_F_UNREADABLE_REG_SET is incorrect, since the set register _is_ readable. What's really required is BGPIO_F_READ_OUTPUT_REG_SET: reading the set register reads the set output value. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27gpio: rcar: Add r8a7795 (R-Car H3) supportUlrich Hecht2-0/+5
R-Car Gen3's GPIO blocks are identical to Gen2's in every respect. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27gpio: omap: use raw locks for lockingSebastian Andrzej Siewior1-40/+40
This patch converts gpio_bank.lock from a spin_lock into a raw_spin_lock. The call path is to access this lock is always under a raw_spin_lock, for instance - __setup_irq() holds &desc->lock with irq off + __irq_set_trigger() + omap_gpio_irq_type() - handle_level_irq() (runs with irqs off therefore raw locks) + mask_ack_irq() + omap_gpio_mask_irq() This fixes the obvious backtrace on -RT. However the locking vs context is not and this is not limited to -RT: - omap_gpio_irq_type() is called with IRQ off and has an conditional call to pm_runtime_get_sync() which may sleep. Either it may happen or it may not happen but pm_runtime_get_sync() should not be called with irqs off. - omap_gpio_debounce() is holding the lock with IRQs off. + omap2_set_gpio_debounce() + clk_prepare_enable() + clk_prepare() this one might sleep. The number of users of gpiod_set_debounce() / gpio_set_debounce() looks low but still this is not good. Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27gpio: remove unneeded initializer in gpiochip_add_to_list()Masahiro Yamada1-1/+1
This variable is used as an iterator and initialized in the list_for_each() loop. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>