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2020-10-02spi: spi-stm32: remove redundant irqsave and irqrestore in hardIRQBarry Song1-5/+4
2020-10-02spi: spi-tegra20-sflash: remove redundant irqsave and irqrestore in hardIRQBarry Song1-3/+2
2020-10-02spi: atmel: Exposing effective spi speedThomas Kopp1-0/+1
2020-09-29spi: spi-dw: Remove extraneous lockingSerge Semin2-13/+2
2020-09-29spi: dw: Add KeemBay Master capabilitySerge Semin3-17/+15
2020-09-29spi: dw: Convert CS-override to DW SPI capabilitiesSerge Semin3-4/+9
2020-09-29spi: dw: Discard DW SSI chip type storagesSerge Semin2-5/+2
2020-09-29spi: dw: Use relaxed IO-methods to access FIFOsSerge Semin1-14/+4
2020-09-29spi: dw: Disable all IRQs when controller is unusedSerge Semin1-5/+5
2020-09-29spi: dw: Clear IRQ status on DW SPI controller resetSerge Semin1-3/+4
2020-09-29spi: dw: Initialize n_bytes before the memory barrierSerge Semin1-1/+1
2020-09-29spi: dw: Discard IRQ threshold macroSerge Semin1-3/+0
2020-09-29spi: dw-dma: Add one-by-one SG list entries transferSerge Semin2-1/+137
2020-09-29spi: dw-dma: Pass exact data to the DMA submit and wait methodsSerge Semin1-18/+17
2020-09-29spi: dw-dma: Move DMAC register cleanup to DMA transfer methodSerge Semin1-9/+8
2020-09-29spi: dw-dma: Detach DMA transfer into a dedicated methodSerge Semin1-2/+10
2020-09-29spi: dw-dma: Remove DMA Tx-desc passing aroundSerge Semin1-17/+14
2020-09-29spi: dw-dma: Check DMA Tx-desc submission statusSerge Semin1-2/+18
2020-09-29spi: dw-dma: Move DMA transfers submission to the channels prep methodsSerge Semin1-10/+12
2020-09-29spi: dw-dma: Check rx_buf availability in the xfer methodSerge Semin1-7/+6
2020-09-29spi: dw-dma: Configure the DMA channels in dma_setupSerge Semin1-11/+31
2020-09-29spi: dw-dma: Fail DMA-based transfer if no Tx-buffer specifiedSerge Semin1-14/+13
2020-09-29spi: dw-dma: Set DMA Level registers on initSerge Semin1-15/+13
2020-09-28spi: hisi-sfc-v3xx: fix spelling mistake "occured" -> "occurred"Colin Ian King1-1/+1
2020-09-25spi: spi-mtk-nor: fix timeout calculation overflowChuanhong Guo1-1/+5
2020-09-25spi: hisi-sfc-v3xx: add support for IRQ modeYicong Yang1-22/+109
2020-09-25spi: hisi-sfc-v3xx: factor out the bit definition of interrupt registerYicong Yang1-6/+10
2020-09-25spi: hisi-sfc-v3xx: factor out bus config and transfer functionsYicong Yang1-9/+24
2020-09-25spi: hisi-sfc-v3xx: factor out IO modes configurationYicong Yang1-42/+55
2020-09-24spi: spi-zynqmp-gqspi: Fix incorrect indentationAmit Kumar Mahapatra1-23/+23
2020-09-24spi: spi-zynqmp-gqspi: Update driver to use spi-mem frameworkAmit Kumar Mahapatra1-276/+369
2020-09-24spi: spi-zynqmp-gqspi: Fix kernel-doc warningsAmit Kumar Mahapatra1-22/+23
2020-09-23spi: spi-imx: spi_imx_transfer(): add support for effective_speed_hzMarc Kleine-Budde1-0/+2
2020-09-22spi: omap2-mcspi: Improve performance waiting for CHSTATAswath Govindraju1-4/+13
2020-09-22spi: npcm-fiu: simplify the return expression of npcm_fiu_probe()Qinglang Miao1-6/+1
2020-09-21spi/topcliff-pch: drop double zeroingJulia Lawall1-2/+2
2020-09-17spi: dw-pci: free previously allocated IRQs if desc->setup() failsJay Fang1-7/+9
2020-09-17spi: spi-nxp-fspi: Add ACPI supportkuldip dwivedi1-19/+50
2020-09-17spi: lantiq: remove redundant irqsave and irqrestore in hardIRQBarry Song1-7/+5
2020-09-17spi: xilinx: Fix info message during probeRicardo Ribalda1-2/+1
2020-09-17spi: fsi: fsi2spi: Add compatible string for restricted versionEddie James1-0/+1
2020-09-17spi: fsi: Check mux status before transfersEddie James1-13/+27
2020-09-17spi: fsi: Implement restricted size for certain controllersEddie James1-12/+53
2020-09-17spi: fsi: Fix use of the bneq+ sequencer instructionBrad Bishop1-3/+25
2020-09-17spi: fsi: Fix clock running too fastBrad Bishop1-1/+1
2020-09-17spi: fsi: Handle 9 to 15 byte transfers lengthsBrad Bishop1-3/+3
2020-09-14spi: sprd: Simplify with dev_err_probe()Krzysztof Kozlowski2-16/+6
2020-09-14spi: spi-geni-qcom: Don't wait to start 1st transfer if transmittingDouglas Anderson1-81/+86
2020-09-14spi: bcm2835: Make polling_limit_us staticJason Yan1-1/+1
2020-09-14spi: spi-fsl-dspi: use XSPI mode instead of DMA for DPAA2 SoCsVladimir Oltean1-3/+3
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