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* watchdog: Orion: Fix possible null-deference in orion_wdt_probeJason Gunthorpe2012-12-191-0/+2
| | | | | | | | If the DT does not include a regs parameter then the null res would be dereferenced. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: sp5100_tco: Add SB8x0 chipset supportTakahisa Tanaka2012-12-192-61/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current sp5100_tco driver only supports SP5100/SB7x0 chipset, doesn't support SB8x0 chipset, because current sp5100_tco driver doesn't know that the offset address for watchdog timer was changed from SB8x0 chipset. The offset address of SP5100 and SB7x0 chipsets are as follows, quote from the AMD SB700/710/750 Register Reference Guide (Page 164) and the AMD SP5100 Register Reference Guide (Page 166). WatchDogTimerControl 69h WatchDogTimerBase0 6Ch WatchDogTimerBase1 6Dh WatchDogTimerBase2 6Eh WatchDogTimerBase3 6Fh In contrast, the offset address of SB8x0 chipset is as follows, quote from AMD SB800-Series Southbridges Register Reference Guide (Page 147). WatchDogTimerEn 48h WatchDogTimerConfig 4Ch So, In the case of SB8x0 chipset, sp5100_tco reads meaningless MMIO address (for example, 0xbafe00) from wrong offset address, and the following message is logged. SP5100 TCO timer: mmio address 0xbafe00 already in use With this patch, sp5100_tco driver supports SB8x0 chipset, and can avoid iomem resource conflict. The processing of this patch is as follows. Step 1) Attempt to get the watchdog base address from indirect I/O (0xCD6 and 0xCD7). - Go to the step 7 if obtained address hasn't conflicted with other resource. But, currently, the address (0xfec000f0) conflicts with the IOAPIC MMIO address, and the following message is logged. SP5100 TCO timer: mmio address 0xfec000f0 already in use 0xfec000f0 is recommended by AMD BIOS Developer's Guide. So, go to the next step. Step 2) Attempt to get the SBResource_MMIO base address from AcpiMmioEN (for SB8x0, PM_Reg:24h) or SBResource_MMIO (SP5100/SB7x0, PCI_Reg:9Ch) register. - Go to the step 7 if these register has enabled by BIOS, and obtained address hasn't conflicted with other resource. - If above condition isn't true, go to the next step. Step 3) Attempt to get the free MMIO address from allocate_resource(). - Go to the step 7 if these register has enabled by BIOS, and obtained address hasn't conflicted with other resource. - Driver initialization has failed if obtained address has conflicted with other resource, and no 'force_addr' parameter is specified. Step 4) Use the specified address If 'force_addr' parameter is specified. - allocate_resource() function may fail, when the PCI bridge device occupies iomem resource from 0xf0000000 to 0xffffffff. To handle such a case, I added 'force_addr' parameter to sp5100_tco driver. With 'force_addr' parameter, sp5100_tco driver directly can assign MMIO address for watchdog timer from free iomem region. Note that It's dangerous to specify wrong address in the 'force_addr' parameter. Example of force_addr parameter use # cat /proc/iomem ...snip... fec00000-fec003ff : IOAPIC 0 <--- free MMIO region fec10000-fec1001f : pnp 00:0b fec20000-fec203ff : IOAPIC 1 ...snip... # cat /etc/modprobe.d/sp5100_tco.conf options sp5100_tco force_addr=0xfec00800 # modprobe sp5100_tco # cat /proc/iomem ...snip... fec00000-fec003ff : IOAPIC 0 fec00800-fec00807 : SP5100 TCO <--- watchdog timer MMIO address fec10000-fec1001f : pnp 00:0b fec20000-fec203ff : IOAPIC 1 ...snip... # - Driver initialization has failed if specified address has conflicted with other resource. Step 5) Disable the watchdog timer - To rewrite the watchdog timer register of the chipset, absolutely guarantee that the watchdog timer is disabled. Step 6) Re-program the watchdog timer MMIO address to chipset. - Re-program the obtained MMIO address in Step 3 or Step 4 to chipset via indirect I/O (0xCD6 and 0xCD7). Step 7) Enable and setup the watchdog timer This patch has worked fine on my test environment (ASUS M4A89GTD-PRO/USB3 and DL165G7). therefore I believe that it's no problem to re-program the MMIO address for watchdog timer to chipset during disabled watchdog. However, I'm not sure about it, because I don't know much about chipset programming. So, any comments will be welcome. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43176 Tested-by: Arkadiusz Miskiewicz <arekm@maven.pl> Tested-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Takahisa Tanaka <mc74hc00@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: davinci_wdt: add OF supportMurali Karicheri2012-12-191-0/+7
| | | | | | | | This adds OF support for davinci_wdt driver. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: da9052: Fix invalid free of devm_ allocated dataTushar Behera2012-12-191-4/+0
| | | | | | | | | | | | | It is not required to free devm_ allocated data. Since kref_put needs a valid release function, da9052_wdt_release_resources() is not deleted. Fixes following warning. drivers/watchdog/da9052_wdt.c:59:1-6: WARNING: invalid free of devm_ allocated data Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: twl4030_wdt: Change TWL4030_MODULE_PM_RECEIVER to ↵Peter Ujfalusi2012-12-191-1/+1
| | | | | | | | | | TWL_MODULE_PM_RECEIVER To facilitate upcoming cleanup in twl stack. No functional changes. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: remove depends on CONFIG_EXPERIMENTALKees Cook2012-12-191-2/+2
| | | | | | | | | The CONFIG_EXPERIMENTAL config item has not carried much meaning for a while now and is almost always enabled by default. As agreed during the Linux kernel summit, remove it from any "depends on" lines in Kconfigs. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: Convert dev_printk(KERN_<LEVEL> to dev_<level>(Joe Perches2012-12-191-10/+9
| | | | | | | | dev_<level> calls take less code than dev_printk(KERN_<LEVEL> and reducing object size is good. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: DA9055 Watchdog driverAshish Jangam2012-12-193-0/+227
| | | | | | | | | | | This is the Watchdog patch for the DA9055 PMIC. This patch has got dependency on the DA9055 MFD core. This patch is functionally tested on SMDK6410 Signed-off-by: David Dajun Chen <dchen@diasemi.com> Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: omap_wdt: eliminate gotoAaro Koskinen2012-12-191-7/+4
| | | | | | | Eliminate a goto to simplify the code. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: omap_wdt: delete redundant platform_set_drvdata() callsAaro Koskinen2012-12-191-2/+0
| | | | | | | It's not needed to manually reset the driver data. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: omap_wdt: convert to devm_ functionsAaro Koskinen2012-12-191-37/+13
| | | | | | | | Use devm_kzalloc(), devm_request_mem_region() ande devm_ioremap() to simplify the code. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: omap_wdt: convert to new watchdog coreAaro Koskinen2012-12-192-149/+112
| | | | | | | | | | | | | | Convert omap_wdt to new watchdog core. On OMAP boards, there are usually multiple watchdogs. Since the new watchdog core supports multiple watchdogs, all watchdog drivers used on OMAP should be converted. The legacy watchdog device node is still created, so this should not break existing users. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Tested-by: Jarkko Nikula <jarkko.nikula@jollamobile.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: s3c2410_wdt: use clk_prepare_enable and clk_disable_unprepareThomas Abraham2012-12-191-3/+3
| | | | | | | | Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare calls as required by common clock framework. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: imx2_wdt: Select the driver via ARCH_MXCFabio Estevam2012-12-191-1/+1
| | | | | | | | | | | | With device tree support in place, we should not use IMX_HAVE_PLATFORM_IMX2_WDT as a dependency for selecting the imx2_wdt driver. Use ARCH_MXC symbol instead, so that the driver can be even selected by a device-tree only SoC, such as i.MX6. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: cpu5wdt.c: add missing del_timer calldevendra.aaru2012-12-191-0/+1
| | | | | | | | We do a setup_timer at init stage of the module, but we didn't de-activate the time using del_timer. Signed-off-by: devendra.aaru <devendra.aaru@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: hpwdt.c: Increase version stringTom Mingarelli2012-12-191-1/+1
| | | | | | | | Changing the version of the driver for all the latest patches being applied for kdump fixes. Signed-off-by: Thomas Mingarelli <thomas.mingarelli@hp.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: Convert twl4030_wdt to watchdog coreJarkko Nikula2012-12-192-149/+35
| | | | | | | | | | | Convert the twl4030_wdt watchdog driver to watchdog core. While at there use devm_kzalloc and set the default timeout in order to be able test this driver with a simple shell script. Signed-off-by: Jarkko Nikula <jarkko.nikula@jollamobile.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* davinci_wdt: preparation for switch to common clock frameworkKaricheri, Muralidharan2012-12-191-2/+2
| | | | | | | | | | | | | | As a first step towards migrating davinci platforms to use common clock framework, replace all instances of clk_enable() with clk_prepare_enable() and clk_disable() with clk_disable_unprepare(). Until the platform is switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just adds a might_sleep() call and would work without any issues. This will make it easy later to switch to common clk based implementation of clk driver from DaVinci specific driver. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: sp805_wdt.c: use clk_prepare_enable and clk_disable_unprepareJulia Lawall2012-12-191-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clk_prepare_enable and clk_disable_unprepare combine clk_prepare and clk_enable, and clk_disable and clk_unprepare. They make the code more concise, and ensure that clk_unprepare is called when clk_enable fails. A simplified version of the semantic patch that introduces calls to these functions is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; @@ - clk_prepare(e); - clk_enable(e); + clk_prepare_enable(e); @@ expression e; @@ - clk_disable(e); - clk_unprepare(e); + clk_disable_unprepare(e); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* watchdog: ath79_wdt: convert to use module_platform_driverGabor Juhos2012-12-191-11/+2
| | | | | | | | This makes the code a bit smaller by getting rid of some boilerplate code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds2012-12-191-0/+9
|\ | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull small x86 fixes from Peter Anvin: "A collection of very small fixes, mostly pure documentation." * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, doc: Document that bootloader ID 4 is used also by iPXE x86, doc: Add a formal bootloader ID for kexec-tools x86, 8042: Enable A20 using KBC to fix S3 resume on some MSI laptops
| * x86, 8042: Enable A20 using KBC to fix S3 resume on some MSI laptopsOndrej Zary2012-12-111-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MSI laptop BIOSes are broken - INT 15h code uses port 92h to enable A20 line but resume code assumes that KBC was used. The laptop will not resume from S3 otherwise but powers off after a while and then powers on again stuck with a blank screen. Fix it by enabling A20 using KBC in i8042_platform_init for x86. Fixes https://bugzilla.kernel.org/show_bug.cgi?id=12878 Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: <stable@vger.kernel.org> Link: http://lkml.kernel.org/r/201212112218.06551.linux@rainbow-software.org Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* | Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtdLinus Torvalds2012-12-1995-1639/+2301
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from David Woodhouse: - Various cleanups especially in NAND tests - Add support for NAND flash on BCMA bus - DT support for sh_flctl and denali NAND drivers - Kill obsolete/superceded drivers (fortunet, nomadik_nand) - Fix JFFS2 locking bug in ENOMEM failure path - New SPI flash chips, as usual - Support writing in 'reliable mode' for DiskOnChip G4 - Debugfs support in nandsim * tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits) mtd: nand: typo in nand_id_has_period() comments mtd: nand/gpio: use io{read,write}*_rep accessors mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited. mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems mtd: nand/docg4: fix and improve read of factory bbt mtd: nand/docg4: reserve bb marker area in ecclayout mtd: nand/docg4: add support for writing in reliable mode mtd: mxc_nand: reorder part_probes to let cmdline override other sources mtd: mxc_nand: fix unbalanced clk_disable() in error path mtd: nandsim: Introduce debugfs infrastructure mtd: physmap_of: error checking to prevent a NULL pointer dereference mtg: docg3: potential divide by zero in doc_write_oob() mtd: bcm47xxnflash: writing support mtd: tests/read: initialize buffer for whole next page mtd: at91: atmel_nand: return bit flips for the PMECC read_page() mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c mtd: nand: onfi need to be probed in 8 bits mode mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width mtd: nand: print flash size during detection mted: nand_wait_ready timeout fix ...
| * | mtd: nand: typo in nand_id_has_period() commentsBrian Norris2012-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The simple example provided in the comments for nand_id_has_period() actually has a period of 3, not 2. Silly mistake... Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand/gpio: use io{read,write}*_rep accessorsMatthew Leach2012-12-131-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The {read,write}s{b,w,l} operations are not defined by all architectures and are being removed from the asm-generic/io.h interface. This patch replaces the usage of these string functions in the mtd gpio accessors with io{read,write}{8,16,32}_rep calls instead. Signed-off-by: Matthew Leach <matthew@mattleach.net> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.NeilBrown2012-12-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you create a block2mtd device that is larger than main memory, and write to all of it, then lots of pages will be dirtied but they will never be flushed out as nothing calls any variant of balance_dirty_pages. It would be nice to call set_page_dirty_balance(), but that isn't exported, so just call balance_dirty_pages_ratelimited() directly. Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problemsWolfram Sang2012-12-131-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It could happen (1 out of 100 times) that NAND did not start up correctly after warm rebooting, so the kernel could not find the UBI or DMA timed out due to a stalled BCH. When resetting BCH together with GPMI, the issue could not be observed anymore (after 10000+ reboots). We probably need the consistent state already before sending any command to NAND, even when no ECC is needed. I chose to keep the extra reset for BCH when changing the flash layout to be on the safe side. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Huang Shijie <b32955@freescale.com> Cc: stable@vger.kernel.org Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand/docg4: fix and improve read of factory bbtMike Dunn2012-12-121-5/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does two things related to reading the factory badblock table during initialization: (1) fix error where a non-zero return code from docg4_read_page() is assumed to be an error (it was later changed to be max_bitflips; thanks to Brian Norris for bringing this to my attention a while back), and (2) if there is an error reading the factory bbt, it tries reading another (redundant) factory bbt table. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand/docg4: reserve bb marker area in ecclayoutMike Dunn2012-12-121-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the nand_ecclayout to place the two bb marker bytes in the oob region off-limits to the user. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand/docg4: add support for writing in reliable modeMike Dunn2012-12-121-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The controller on the docg4 has a "reliable" mode, where consecutive 2k pages are used in parallel. The initial program loader (IPL) on my Treo 680 expects the secondary program loader (SPL) to be written in this mode. This patch adds support for writing data in reliable mode, by way of a module parameter. Support for reading in this mode (as the IPL does) is not supported yet, but alternate (even-numbered) 2k pages written in reliable mode can be read normally (odd-numbered pages will contain junk and generate ecc errors). Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: mxc_nand: reorder part_probes to let cmdline override other sourcesLothar Waßmann2012-12-101-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cmdline is the easiest to change source of information. Thus let it take precedence over 'RedBoot' and 'ofpart'. This makes the mxc_nand driver to be in sync with all other NAND drivers that support 'cmdlinepart' partition parsing. Also change 'const char *' to 'const char const *' as advised by checkpatch.pl Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: mxc_nand: fix unbalanced clk_disable() in error pathLothar Waßmann2012-12-101-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If nand_scan_ident() or nand_scan_tail() fails, the NAND chip may have been deselected and the clock already disabled. Thus, check 'clk_act' in the error path to decide whether the clock still needs to be disabled. This fixes a: |WARNING: at drivers/clk/clk.c:472 __clk_disable+0x3c/0x78() Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nandsim: Introduce debugfs infrastructureEzequiel Garcia2012-12-101-56/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's more user friendly to report debug information and statistics through debugfs, than to use printing facilites. This patch introduces a very minimal debugfs infrastructure and moves eraseblock wear report to an entry located at: /sys/kernel/debug/nandsim/wear_report This means we can remove rptwear option and just let the user get the wear report when we needs to. Signed-off-by: Ezequiel Garcia <elezegarcia@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: physmap_of: error checking to prevent a NULL pointer dereferenceAnton Prins2012-12-101-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch solves a NULL pointer dereference, this may occur if the tuple is not mappable (jumps to continue in the for-loop). Out of the loop possible results are: - info->list_size == 0 if no of the tuples is mappable - info->list_size == 1 - info->list_size > 1 If no one of the supplied tuples is mappable (info->list_size == 0) and info->cmtd will not be set. But it is used in mtd_device_parse_register, OOPS! actually it should generate an error in this case! Signed-off-by: Anton Prins <anton.prins@nl.bosch.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtg: docg3: potential divide by zero in doc_write_oob()Dan Carpenter2012-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we set oobdelta to zero then we will either return -EINVAL or hit a divide (modulus) by zero on the next line when we check "(ooblen % oobdelta)". It's better to just return -EINVAL here instead. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: bcm47xxnflash: writing supportRafał Miłecki2012-12-102-3/+79
| | | | | | | | | | | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: tests/read: initialize buffer for whole next pageChristian Herzig2012-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | fix: do block-buffer initialize for the whole next page to zero. Signed-off-by: Christian Herzig <christian.herzig@keymile.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: at91: atmel_nand: return bit flips for the PMECC read_page()Josh Wu2012-12-031-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix pmecc's read_page() to return maximum number of bitflips, 0 if uncorrectable. In the commit: 3f91e94f7f511de74c0d2abe08672ccdbdd1961c ("mtd: nand: read_page() returns max_bitflips ()"), The ecc.read_page() is changed to return the maximum number of bitflips. And when meet uncorrectable bitflips it needs to return 0. See the comment in nand.h: * @read_page: function to read a page according to the ECC generator * requirements; returns maximum number of bitflips corrected in * any single ECC step, 0 if bitflips uncorrectable, -EIO hw error Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.cHarald Nordgard-Hansen2012-12-031-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When working on a problem with some flash chips that lock up during write-buffer operations, I think there may be a bug in the linux handling of chips using cfi_cmdset_0002.c. The datasheets I have found for a number of these chips all specify that when aborting a write-buffer command, it is not enough to use the standard reset. Rather a "write-to-buffer-reset command" is needed. This command is quite similar for all chips, the main variance seem to be if the final 0xF0 can go to any address or must go to addr_unlock1. The bug is then in the recovery handling when timing out at the end of do_write_buffer, where using the normal reset command is not sufficient. Without this change, if the write-buffer command fails then any following operations on the flash also fail. Signed-off-by: Harald Nordgard-Hansen <hhansen@pvv.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand: onfi need to be probed in 8 bits modeMatthieu CASTET2012-12-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | - NAND_CMD_READID want an address that it is not scaled on x16 device (it is always 0x20) - NAND_CMD_PARAM want 8 bits data Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus widthMatthieu CASTET2012-12-031-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver call nand_scan_ident in 8 bit mode, then readid or onfi detection are done (and detect bus width). The driver should update its bus width before calling nand_scan_tail. This work because readid and onfi are read work 8 byte mode. Note that nand_scan_ident send command (NAND_CMD_RESET, NAND_CMD_READID, NAND_CMD_PARAM), address and read data The ONFI specificication is not very clear for x16 device if high byte of address should be driven to 0, but according to [1] it should be ok to not drive it during autodetection. [1] 3.3.2. Target Initialization [...] The Read ID and Read Parameter Page commands only use the lower 8-bits of the data bus. The host shall not issue commands that use a word data width on x16 devices until the host determines the device supports a 16-bit data bus width in the parameter page. Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: nand: print flash size during detectionMatthieu CASTET2012-12-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This help to detect bad flash identification in case the size is not present on the name (ONFI). Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mted: nand_wait_ready timeout fixMatthieu CASTET2012-12-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | nand_wait_ready timeout should not assume HZ=100. Make it independent of HZ value by using msecs_to_jiffies. Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: bcm47xxnflash: support NAND_CMD_STATUSRafał Miłecki2012-12-031-0/+11
| | | | | | | | | | | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: bcm47xxnflash: define some magic numbersRafał Miłecki2012-12-031-11/+20
| | | | | | | | | | | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: remove the "chip" parameter in nand_get_device()Huang Shijie2012-12-031-23/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two reasons to remove the "chip" parameter in nand_get_device(): [1] The nand_release_device() does not have the "chip" parameter. [2] We can get the nand_chip by the mtd->priv field. This patch removes the "chip" parameter in nand_get_device(). Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: remove the de-select chip code in nand_release_device()Huang Shijie2012-12-031-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nand_get_device() does not select the chip, but nand_release_device() does de-select the chip. It is really strange. With the current code, nand_sync() will de-select the chip, even if the chip has never been selected. To make the balance of select/de-select chip, it's better to remove the de-select chip code in nand_release_device() which makes the code more clear. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: m25p80: modify info for Micron N25Q128Liming Wang2012-12-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Micron N25Q128 has two types of flash: - One is for 1.8v supply voltage, prefixed with "n25q128a11" and the jedec code is 0x20bb18. - Another is for 3v supply voltage, prefixed with "n25q128a13" and the jedec code is 0x20ba18. So modify the original type info and add another type for Micron N25Q128. Signed-off-by: Liming Wang <walimisdev@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd cs553x_nand: Initialise ecc.strength before nand_scan()Nathan Williams2012-12-031-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loading cs553x_nand with Hynix H27U1G8F2BTR NAND flash causes this bug: kernel BUG at drivers/mtd/nand/nand_base.c:3345! invalid opcode: 0000 [#1] Modules linked in: cs553x_nand(+) vfat fat usb_storage ehci_hcd usbcore usb_comr Pid: 436, comm: modprobe Not tainted 3.6.7 #1 EIP: 0060:[<c118d205>] EFLAGS: 00010296 CPU: 0 EIP is at nand_scan_tail+0x64c/0x69c EAX: 00000034 EBX: cea6ed98 ECX: 00000000 EDX: 00000000 ESI: cea6ec00 EDI: cea6ec00 EBP: 20000000 ESP: cdd17e48 DS: 007b ES: 007b FS: 0000 GS: 0000 SS: 0068 CR0: 8005003b CR2: 0804e119 CR3: 0d850000 CR4: 00000090 DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000 DR6: ffff0ff0 DR7: 00000400 Process modprobe (pid: 436, ti=cdd16000 task=cdd1c320 task.ti=cdd16000) Stack: c12e962c c118f7ef 00000003 cea6ed98 d014b25c 20000000 fffff007 00000001 00000000 cdd53b00 d014b000 c1001021 cdd53b00 d01493c0 cdd53b00 cdd53b00 d01493c0 c1047f83 d014b4a0 00000000 cdd17f9c ce4be454 cdd17f48 cdd1c320 Call Trace: [<c118f7ef>] ? nand_scan+0x1b/0x4d [<d014b25c>] ? init_module+0x25c/0x2de [cs553x_nand] [<d014b000>] ? 0xd014afff [<c1001021>] ? do_one_initcall+0x21/0x111 [<c1047f83>] ? sys_init_module+0xe4/0x1261 [<c1031207>] ? task_work_run+0x36/0x43 [<c1265ced>] ? syscall_call+0x7/0xb Code: fa ff ff c7 86 d8 00 00 00 01 00 00 00 e9 5f fc ff ff 68 f8 26 2e c1 e8 a7 EIP: [<c118d205>] nand_scan_tail+0x64c/0x69c SS:ESP 0068:cdd17e48 Initialising ecc.strength before the call to nand_scan() fixes this. Signed-off-by: Nathan Williams <nathan@traverse.com.au> Cc: stable@vger.kernel.org [3.4+] Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | mtd: fix a number of checkpatch complaintsArtem Bityutskiy2012-11-229-18/+25
| | | | | | | | | | | | | | | | | | | | | | | | While checking the "__devinit" removal patches with checkpatch.pl, I noticed several warnings related to a space between the function name and '(', as well as long lines. I fixed the warnings up in this patch. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
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