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* drm/i915: remove i915_inttoext_table debugfs entryMika Kuoppala2014-07-091-30/+0
* drm/i915: remove i915_delayedfreq_table debugfs entryMika Kuoppala2014-07-091-27/+0
* drm/i915: Make use of intel_fb_obj() (v2)Matt Roper2014-07-093-63/+48
* drm/i915: Introduce intel_fb_obj() macroMatt Roper2014-07-091-0/+1
* drm/i915: HWS must be in the mappable region for g33Chris Wilson2014-07-081-1/+15
* drm/i915/vlv: WA for Turbo and RC6 to work together.Deepak S2014-07-084-4/+167
* drm/i915: Use mmio flips to change tiling mode on BaytrailChris Wilson2014-07-081-0/+6
* drm/i915: Disable RCS flips on IvybridgeChris Wilson2014-07-081-0/+2
* drm/i915: Extract the actual workload submission mechanism from execbufferOscar Mateo2014-07-081-136/+162
* drm/i915: Generalize intel_ring_get_tail to take a ringbufOscar Mateo2014-07-082-4/+4
* drm/i915: Generalize ring_space to take a ringbufOscar Mateo2014-07-081-7/+6
* drm/i915: Extract ringbuffer destroy & generalize alloc to take a ringbufOscar Mateo2014-07-081-10/+16
* drm/i915: Add kerneldoc comments to the intel_context structOscar Mateo2014-07-081-0/+17
* drm/i915: Emphasize that ctx->id is merely a user handleOscar Mateo2014-07-085-12/+12
* drm/i915: Emphasize that ctx->obj & ctx->is_initialized refer to the legacy r...Oscar Mateo2014-07-083-44/+48
* drm/i915: Extract context backing object allocationOscar Mateo2014-07-081-19/+35
* drm/i915: make system freeze support depend on CONFIG_ACPI_SLEEPImre Deak2014-07-081-3/+4
* drm/i915: Restrict GPU boost to the RCS engineChris Wilson2014-07-081-1/+1
* drm/i915: correct BLC vs PWM enable/disable orderingJesse Barnes2014-07-071-6/+7
* drm/i915: Enable semaphores on BDWRodrigo Vivi2014-07-071-4/+0
* drm/i915/bdw: poll semaphoresBen Widawsky2014-07-071-0/+1
* drm/i915: semaphore debugfsBen Widawsky2014-07-071-0/+71
* drm/i915/bdw: collect semaphore error stateBen Widawsky2014-07-072-4/+48
* drm/i915: Extract semaphore error collectionBen Widawsky2014-07-071-12/+18
* drm/i915: Implement MI decode for gen8Rodrigo Vivi2014-07-071-19/+23
* drm/i915/bdw: implement semaphore waitBen Widawsky2014-07-072-5/+33
* drm/i915/bdw: implement semaphore signalBen Widawsky2014-07-074-80/+189
* drm/i915: Make semaphore updates more preciseBen Widawsky2014-07-071-18/+9
* drm/i915: gen specific ring initBen Widawsky2014-07-071-76/+151
* drm/i915: Updating comments.Rodrigo Vivi2014-07-072-3/+7
* drm/i915: Fix VCS2's ring name.Rodrigo Vivi2014-07-071-1/+1
* drm/i915: Corrected 'file_priv' to 'file' in 'i915_driver_preclose()'John Harrison2014-07-072-6/+6
* drm/i915: Support pf CRC source on haswell transcoder edpDaniel Vetter2014-07-074-6/+67
* drm/i915/bdw: 3D_CHICKEN3 has write mask bitsMichel Thierry2014-07-071-1/+1
* DRM/i915: Remove magic to prevent blank screen on gen4 chipsetsEgbert Eich2014-07-071-27/+0
* drm/i915: Don't pretend ips is always enabled on BDW.Rodrigo Vivi2014-07-071-4/+11
* drm/i915: Unpin last_context at resetVille Syrjälä2014-07-071-0/+3
* drm/i915: rework digital port IRQ handling (v2)Dave Airlie2014-07-075-9/+183
* drm/i915: gmch: fix stuck primary plane due to memory self-refresh modeImre Deak2014-07-071-2/+13
* drm/i915: gmch: set SR WMs to valid values before enabling themImre Deak2014-07-071-3/+18
* drm/i915: gmch: factor out intel_set_memory_cxsrImre Deak2014-07-072-38/+40
* drm/i915: Move VLV cmnlane workaround to intel_power_domains_init_hw()Ville Syrjälä2014-07-073-35/+58
* drm/i915: Pull the cmnlane tricks into its own power well opsVille Syrjälä2014-07-071-37/+55
* drm/i915: Kill duplicated cdclk readout code from i2cVille Syrjälä2014-07-074-63/+21
* drm/i915: Warn if there's a cdclk change in progessVille Syrjälä2014-07-071-0/+4
* drm/i915: Wait for cdclk change to occure when going for 400MHzVille Syrjälä2014-07-071-0/+5
* drm/i915: Use 200MHz cdclk on vlv when all pipes are offVille Syrjälä2014-07-071-2/+7
* drm/i915: Handle 320 vs. 333 MHz cdclk on vlvVille Syrjälä2014-07-071-3/+6
* drm/i915: Move vlv cdclk code to .get_display_clock_speed()Ville Syrjälä2014-07-073-22/+14
* drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bitsVille Syrjälä2014-07-072-2/+7
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