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*-------. Merge branches 'clk-spreadtrum', 'clk-stm32f', 'clk-stm32mp1', 'clk-hi655x' a...Stephen Boyd2018-04-066-8/+2234
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| | | | | * clk: clk-gpio: Allow GPIO to sleep in set/get_parentMike Looijmans2018-03-191-2/+2
| | | | * | clk: enable hi655x common clk automaticallyRiku Voipio2018-03-191-2/+4
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| | | * | clk: stm32: add configuration flags for each of the stm32 driversBenjamin Gaignard2018-03-192-2/+16
| | | * | clk: stm32mp1: add Debug clocksGabriel Fernandez2018-03-111-0/+22
| | | * | clk: stm32mp1: add MCO clocksGabriel Fernandez2018-03-111-0/+20
| | | * | clk: stm32mp1: add RTC clockGabriel Fernandez2018-03-111-0/+15
| | | * | clk: stm32mp1: add Peripheral & Kernel ClocksGabriel Fernandez2018-03-111-27/+820
| | | * | clk: stm32mp1: add Kernel timersGabriel Fernandez2018-03-111-0/+185
| | | * | clk: stm32mp1: add Sub System clocksGabriel Fernandez2018-03-111-0/+85
| | | * | clk: stm32mp1: add Post-dividers for PLLGabriel Fernandez2018-03-111-0/+221
| | | * | clk: stm32mp1: add PLL clocksGabriel Fernandez2018-03-111-0/+209
| | | * | clk: stm32mp1: add Source Clocks for PLLsGabriel Fernandez2018-03-111-0/+60
| | | * | clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillatorsGabriel Fernandez2018-03-111-0/+143
| | | * | clk: stm32mp1: Introduce STM32MP1 clock driverGabriel Fernandez2018-03-113-0/+371
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| | * | clk: stm32: Add clk entry for SDMMC2 on stm32F769Patrice Chotard2018-03-191-1/+2
| | * | clk: stm32: Add DSI clock for STM32F469 BoardGabriel Fernandez2018-03-191-1/+10
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| * / clk: sprd: add RTC gate for SC9860Chunyan Zhang2018-03-161-0/+76
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*-----. \ Merge branches 'clk-versatile', 'clk-doc', 'clk-must-check', 'clk-qcom' and '...Stephen Boyd2018-04-064-67/+15
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| | | | * clk: Re-use DEFINE_SHOW_ATTRIBUTE() macroAndy Shevchenko2018-03-191-53/+7
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| | | * clk: qcom: smd-rpm: Migrate to devm_of_clk_add_hw_provider()Stephen Boyd2018-03-161-8/+1
| | | * clk: qcom: gcc-msm8996: Mark aggre0 noc clks as criticalSrinivas Kandagatla2018-03-161-4/+4
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| * | clk: versatile: Remove WARNs in ->round_rate()Brian Starkey2018-03-161-2/+2
| * | clk: versatile: add min/max rate boundaries for vexpress osc clockSudeep Holla2018-03-161-0/+1
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*---. \ Merge branches 'clk-ti', 'clk-amlogic', 'clk-tegra' and 'clk-samsung' into cl...Stephen Boyd2018-04-0650-2586/+3780
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| | | * | clk: samsung: Mark a few things staticStephen Boyd2018-03-163-46/+46
| | | * | clk: samsung: Add fout=196608001 Hz EPLL rate entry for exynos4412Sylwester Nawrocki2018-03-151-0/+1
| | | * | clk: samsung: exynos5250: Add missing clocks for FIMC LITE SYSMMU devicesMarek Szyprowski2018-03-141-0/+6
| | | * | clk: samsung: exynos5420: Add more entries to EPLL rate tableSylwester Nawrocki2018-03-121-0/+3
| | | * | clk: samsung: exynos5420: Add CLK_SET_RATE_PARENT flag to mout_mau_epll_clkSylwester Nawrocki2018-03-121-1/+2
| | | * | clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMUMarek Szyprowski2018-03-064-16/+38
| | | * | clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMUMarek Szyprowski2018-03-064-26/+100
| | | * | clk: samsung: Add Exynos5 sub-CMU clock driverMarek Szyprowski2018-03-062-0/+212
| | | * | Merge branch 'for-v4.17/power_domains' into for-v4.17/nextSylwester Nawrocki2018-03-061-0/+8
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| | | | * | soc: samsung: pm_domains: Add blacklisting clock handlingMarek Szyprowski2018-03-061-0/+8
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| | | * | clk: samsung: Add compile time PLL rate validatorsAndrzej Hajda2018-02-2310-344/+372
| | | * | clk: samsung: s3c2410: Fix PLL ratesAndrzej Hajda2018-02-231-8/+8
| | | * | clk: samsung: exynos7: Fix PLL ratesAndrzej Hajda2018-02-231-1/+1
| | | * | clk: samsung: exynos5433: Fix PLL ratesAndrzej Hajda2018-02-231-6/+6
| | | * | clk: samsung: exynos5260: Fix PLL ratesAndrzej Hajda2018-02-231-1/+1
| | | * | clk: samsung: exynos5250: Fix PLL ratesAndrzej Hajda2018-02-231-4/+4
| | | * | clk: samsung: exynos3250: Fix PLL ratesAndrzej Hajda2018-02-231-2/+2
| | | * | clk: exynos5433: Extend list of available AUD_PLL output frequenciesSylwester Nawrocki2018-02-141-0/+1
| | | * | clk: exynos5433: Add CLK_IGNORE_UNUSED flag to sclk_ioclk_i2s1_bclkSylwester Nawrocki2018-02-141-1/+1
| | | * | clk: samsung: Remove redundant dev_err call in exynos_audss_clk_probe()Wei Yongjun2018-02-141-3/+1
| | | * | clk: samsung: Remove redundant dev_err call in exynos5433_cmu_probe()Wei Yongjun2018-02-141-3/+1
| | | * | clk: samsung: s3c: Remove unneeded enumerationChanwoo Choi2018-02-143-33/+12
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| | * | clk: tegra: Fix pll_u rate configurationMarcel Ziswiler2018-03-121-0/+2
| | * | clk: tegra: Specify VDE clock rateDmitry Osipenko2018-03-124-1/+4
| | * | clk: tegra20: Correct PLL_C_OUT1 setupDmitry Osipenko2018-03-121-3/+3
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-20 05:45:40 +0100