summaryrefslogtreecommitdiffstats
path: root/drivers (follow)
Commit message (Collapse)AuthorAgeFilesLines
* fbcon: when font is freed, clear also vc_font.dataMika Kuoppala2013-04-241-0/+2
| | | | | | | | | | | | | | | | | commit ae1287865f5361fa138d4d3b1b6277908b54eac9 Author: Dave Airlie <airlied@redhat.com> Date: Thu Jan 24 16:12:41 2013 +1000 fbcon: don't lose the console font across generic->chip driver switch uses a pointer in vc->vc_font.data to load font into the new driver. However if the font is actually freed, we need to clear the data so that we don't reload font from dangling pointer. Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=892340 Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon: disable UVD advanced semaphore modeChristian König2013-04-241-1/+1
| | | | | | | Not needed and seems to cause some problems. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix endian bugs in radeon_atom_get_clock_dividers() (v3)Alex Deucher2013-04-242-4/+4
| | | | | | | | | v2: fix copy paste typo. v3: clarify new union member Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix up audio dto programming for DCE2Alex Deucher2013-04-242-4/+18
| | | | | | Uses a different register than DCE3 asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/evergreen: set SAD registersRafał Miłecki2013-04-241-0/+63
| | | | | | | | | This allows audio (alsa) driver to read them and have a clue about audio capabilities of connected receiver. This has been verified to be compatible with fglrx behaviour for Onkyo TX-SR605 and Denon 1912. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm: add drm_edid_to_eld helper extracting SADs from EDID (v2)Rafał Miłecki2013-04-241-0/+59
| | | | | | | | | | | | | | | | Some devices (ATI/AMD cards) don't support passing ELD struct to the hardware but just require filling specific registers and then the hardware/firmware does the rest. In such cases we need to read the info from SAD blocks and put them in the correct registers. agd5f: note that the returned pointer needs to be kfreed as per Christian's suggestion. v2: fix warning Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/si: add support for golden register initAlex Deucher2013-04-241-0/+793
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/cayman,TN: add support for golden register init (v2)Alex Deucher2013-04-241-0/+281
| | | | | | v2: add richland support Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/evergreen: add support for golden register initAlex Deucher2013-04-241-0/+863
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/7xx: add support for golden register initAlex Deucher2013-04-241-0/+652
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add helper function to support golden registersAlex Deucher2013-04-242-0/+39
| | | | | | | Golden registers are arrays of register settings from the hw team that need to be initialized at asic startup. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix typo in si_select_se_sh()Alex Deucher2013-04-241-1/+1
| | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: switch audio handling to use callbacksAlex Deucher2013-04-246-88/+87
| | | | | | | | | Register audio callbacks for asic where we support audio. Cleans up the code and makes it easier to add support for newer asics. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: clean up audio dto programmingAlex Deucher2013-04-244-62/+50
| | | | | | | | | Split into DCE2/3 and DCE4/5 variants. Still todo is to calculate the DTO dividers properly. Add proper formula to the comments. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: clean up audio supported checkAlex Deucher2013-04-241-4/+1
| | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: raise UVD clocks on init v3Christian König2013-04-241-8/+24
| | | | | | | | | | | v2: not only raise the clocks on VCPU boot, but also on IB test. v3: agd5f: fix r600_uvd_init return value. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=63730 Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: raise UVD clocks only on demandChristian König2013-04-233-2/+34
| | | | | | | | | That not only saves some power, but also solves problems with older chips where an idle UVD block on higher clocks can cause problems. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: put UVD PLLs in bypass modeChristian König2013-04-223-23/+41
| | | | | | | | | Just power down the PLL when we get a VCLK or DCLK of zero. Enabling the bypass mode early should also allow us to switch UVD clocks on the fly. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: disable audio format interrupts on EvergreenAlex Deucher2013-04-221-1/+3
| | | | | | | The audio format change interrupts are an aid in debugging, but not required for operation. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix hdmi mode enable on RS600/RS690/RS740Alex Deucher2013-04-221-2/+2
| | | | | | | | These chips were previously skipped since they are pre-R600. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon/evergreen: write default channel numbersRafał Miłecki2013-04-221-0/+21
| | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/evergreen: reorder HDMI setupRafał Miłecki2013-04-221-12/+15
| | | | | | | | Driver fglrx setups audio and ACR packets after basic initialization, which sounds sane, do the same. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/evergreen: setup HDMI before enabling itRafał Miłecki2013-04-222-4/+12
| | | | | | | | Closed source driver fglrx seems to enable infoframes and audio packets at the end, which makes sense, do the same. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add helpers for masking and setting bits in regsRafał Miłecki2013-04-222-10/+8
| | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix alignment of UVD fenceChristian König2013-04-222-5/+4
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: cleanup UVD address checksChristian König2013-04-221-12/+14
| | | | | | | | Message and feedback buffers must be at start of VRAM, not at start of address space. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: disable the crtcs in mc_stop (evergreen+) (v2)Alex Deucher2013-04-221-0/+12
| | | | | | | | | | | | | | | Just disabling the mem requests should be enough, but that doesn't seem to work correctly on efi systems. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=57567 https://bugs.freedesktop.org/show_bug.cgi?id=43655 https://bugzilla.kernel.org/show_bug.cgi?id=56441 v2: blank displays first, then disable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: disable the crtcs in mc_stop (r5xx-r7xx) (v2)Alex Deucher2013-04-222-0/+12
| | | | | | | | | | Just disabling the mem requests should be enough, but that doesn't seem to work correctly on efi systems. v2: blank displays first, then disable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: properly lock disp in mc_stop/resume for evergreen+Alex Deucher2013-04-222-4/+45
| | | | | | | | Need to wait for the new addresses to take affect before re-enabling the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: properly lock disp in mc_stop/resume for r5xx-r7xxAlex Deucher2013-04-222-0/+44
| | | | | | | | Need to wait for the new addresses to take affect before re-enabling the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: update wait_for_vblank for evergreen+Alex Deucher2013-04-221-8/+36
| | | | | | | | Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: update wait_for_vblank for r5xx-r7xxAlex Deucher2013-04-221-8/+44
| | | | | | | | Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: update wait_for_vblank for r1xx-r4xxAlex Deucher2013-04-221-24/+53
| | | | | | | | Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* Merge tag 'drm/tegra/for-3.10' of git://anongit.freedesktop.org/tegra/linux ↵Dave Airlie2013-04-2252-644/+7150
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next drm/tegra: Changes for v3.10-rc1 The bulk of this pull-request is the host1x series that has been in the works for a few months. The current implementation looks good and has been tested by several independent parties. So far no issues have been found. To be on the safe side, the new Tegra-specific DRM IOCTLs depend on staging in order to give some amount of flexibility to change them just in case. The plan is to remove that dependency once more userspace exists to verify the adequacy of the IOCTLs. Currently only the 2D engine is supported, but patches are in the works to enable 3D support on top of this framework as well. Various bits of open-source userspace exist to test the 2D and 3D support[0]. This is still a bit immature but it allows to verify that the kernel interfaces work properly. To round things off there are two smaller cleanup patches, one of them adding a new pixel format and the other removing a redundent Kconfig dependency. [0]: https://github.com/grate-driver * tag 'drm/tegra/for-3.10' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: don't depend on OF drm/tegra: Support the XBGR8888 pixelformat drm/tegra: Add gr2d device gpu: host1x: drm: Add memory manager and fb gpu: host1x: Remove second host1x driver gpu: host1x: drm: Rename host1x to host1x_drm drm/tegra: Move drm to live under host1x gpu: host1x: Add debug support gpu: host1x: Add channel support gpu: host1x: Add syncpoint wait and interrupts gpu: host1x: Add host1x driver
| * drm/tegra: don't depend on OFStephen Warren2013-04-221-1/+1
| | | | | | | | | | | | | | | | ARCH_TEGRA always enabled OF, so there's no need for any driver to depend on it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * drm/tegra: Support the XBGR8888 pixelformatThierry Reding2013-04-221-0/+5
| | | | | | | | | | | | | | | | While at it, also include the RGB565 pixelformat in the list of formats supported by overlays. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com>
| * drm/tegra: Add gr2d deviceTerje Bergstrom2013-04-227-3/+595
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add client driver for 2D device, and IOCTLs to pass work to host1x channel for 2D. Also adds functions that can be called to access sync points from DRM. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * gpu: host1x: drm: Add memory manager and fbArto Merilainen2013-04-228-34/+700
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a memory manager for tegra drm and moves existing parts to use it. As cma framebuffer helpers can no more be used, this patch adds also a separate framebuffer driver for tegra. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * gpu: host1x: Remove second host1x driverTerje Bergstrom2013-04-2210-342/+317
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove second host1x driver, and bind tegra-drm to the new host1x driver. The logic to parse device tree and track clients is moved to drm.c. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * gpu: host1x: drm: Rename host1x to host1x_drmArto Merilainen2013-04-226-26/+28
| | | | | | | | | | | | | | | | | | | | | | | | Both host1x and drm drivers have host1x structures. This patch renames the host1x structure under drm to follow name host1x_drm. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * drm/tegra: Move drm to live under host1xTerje Bergstrom2013-04-2216-14/+11
| | | | | | | | | | | | | | | | | | | | | | Make drm part of host1x driver. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * gpu: host1x: Add debug supportTerje Bergstrom2013-04-2215-0/+807
| | | | | | | | | | | | | | | | | | | | | | | | Add support for host1x debugging. Adds debugfs entries, and dumps channel state to UART in case of stuck job. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * gpu: host1x: Add channel supportTerje Bergstrom2013-04-2224-1/+2721
| | | | | | | | | | | | | | | | | | | | | | | | Add support for host1x client modules, and host1x channels to submit work to the clients. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * gpu: host1x: Add syncpoint wait and interruptsTerje Bergstrom2013-04-2210-0/+846
| | | | | | | | | | | | | | | | | | | | | | | | Add support for sync point interrupts, and sync point wait. Sync point wait used interrupts for unblocking wait. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * gpu: host1x: Add host1x driverTerje Bergstrom2013-04-2214-0/+896
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add host1x, the driver for host1x and its client unit 2D. The Tegra host1x module is the DMA engine for register access to Tegra's graphics- and multimedia-related modules. The modules served by host1x are referred to as clients. host1x includes some other functionality, such as synchronization. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
* | drm: Perform a full mode set when the pixel format changedLaurent Pinchart2013-04-221-0/+3
| | | | | | | | | | | | | | | | Test whether the pixel format changes in the mode set handler, and perform a full mode set instead of a mode set base if it does. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm: Don't allow page flip to change pixel formatLaurent Pinchart2013-04-221-0/+6
| | | | | | | | | | | | | | | | | | A page flip is not a mode set, changing the frame buffer pixel format doesn't make sense and isn't handled by most drivers anyway. Disallow it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'exynos-drm-next' of ↵Dave Airlie2013-04-228-485/+324
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Inki writes: This is initial pull request for Exynos. It includes a big change that it makes drm_display_mode for timings parameters to be used for exynos4 and exynos5 commonly and cleans up unnecessary codes. And also it adds device tree support for fimd to get timing values and interrupt source from dts file. In addition, one more patch, device tree support feature for Exynos FIMC, is being reviewed. This patch was posted a little ago like below, http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg17568.html So we are going to request git pull one more time after reviewed. * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: prepare FIMD clocks Revert "of/exynos_g2d: Add Bindings for exynos G2D driver" drm/exynos: drm_connector: Fix error check condition drm/exynos: drm_rotator: Fix incorrect usage of IS_ERR_OR_NULL drm/exynos: mixer: Fix incorrect usage of IS_ERR_OR_NULL drm/exynos: hdmi: Fix incorrect usage of IS_ERR_OR_NULL drm/exynos: change the method for getting the interrupt drm/exynos: enable OF_VIDEOMODE and FB_MODE_HELPERS for exynos drm fimd drm/exynos: Add display-timing node parsing using video helper function drm/exynos: hdmi: move mode_fixup to drm common hdmi drm/exynos: hdmi: using drm_display_mode timings for exynos4
| * | drm/exynos: prepare FIMD clocksVikas Sajjan2013-04-201-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While migrating to common clock framework (CCF), I found that the FIMD clocks were pulled down by the CCF. If CCF finds any clock(s) which has NOT been claimed by any of the drivers, then such clock(s) are PULLed low by CCF. Calling clk_prepare() for FIMD clocks fixes the issue. This patch also replaces clk_disable() with clk_unprepare() during exit, since clk_prepare() is called in fimd_probe(). Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos: drm_connector: Fix error check conditionSachin Kamat2013-04-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | drm_add_edid_modes() returns 0 upon failure to find any modes. Hence check for 0 and not less than 0. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-02 05:49:47 +0100