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* gpio: make gpiochip_get_desc() gpiolib-privateAlexandre Courbot2014-07-233-2/+3
| | | | | | | | | As GPIO descriptors are not going to remain unique anymore, having this function public is not safe. Restrain its use to gpiolib since we have no user outside of it. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: simplify gpiochip_export()Alexandre Courbot2014-07-231-11/+9
| | | | | | | | | | | | | For some reason gpiochip_export() would invalidate all the descriptors of a chip if exporting it to sysfs failed. This does not appear as necessary. Remove that part of the code. While we are at it, add a note about the non-safety of temporarily releasing a spinlock in the middle of the loop that protects its iterator, and explain why this is done. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: remove export of private of_get_named_gpio_flags()Alexandre Courbot2014-07-231-1/+0
| | | | | | | | of_get_named_gpio_flags() has been made gpiolib-private by commit f01d907582, but its EXPORT statement has not been removed. Fix this. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Add support for GPIOF_ACTIVE_LOW to gpio_request_one functionsGuenter Roeck2014-07-231-0/+3
| | | | | | | | | | | | | | | | | | | | | The gpio include file and the gpio documentation declare and document GPIOF_ACTIVE_LOW as one of the flags to be passed to gpio_request_one and related functions. However, the flag is not evaluated or used. This can cause problems in at least two areas: First, the same API can be used to auto-export pins to user space. The missing support for GPIOF_ACTIVE_LOW results in unexpected behavior for such auto-exported pins. Second, the requested gpio pin can be convered for use by gpiod functions with gpio_to_desc(). While gpio API functions do not support GPIOF_ACTIVE_LOW, gpiod functions do, which again results in unexpected behavior. Check the flag in gpio_request_one and set the gpio internal flag FLAG_ACTIVE_LOW if it is set to address those problems. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Clear pending interrupt when enabling a IRQLars-Peter Clausen2014-07-231-0/+43
| | | | | | | | | | | | | | | | | | | | The Zynq GPIO controller does not disable the interrupt detection when the interrupt is masked and only disables the propagation of the interrupt. This means when the controller detects an interrupt condition while the interrupt is logically disabled (and masked) it will propagate the recorded interrupt event once the interrupt is enabled. This will cause the interrupt consumer to see spurious interrupts to prevent this first make sure that the interrupt is not asserted and then enable it. E.g. when a interrupt is requested with request_irq() it will be configured according to the requested type (edge/level triggered, etc.) after that it will be enabled. But the detection circuit might have already registered a false interrupt before the interrupt type was correctly configured and once the interrupt is unmasked this false interrupt will be propagated and the interrupt handler for the just request interrupt will called. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: remove all usage of gpio_remove retval in driver/gpioabdoulaye berthe2014-07-2257-242/+100
| | | | | Signed-off-by: abdoulaye berthe <berthe.ab@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Add driver for Zynq GPIO controllerHarini Katakam2014-07-103-0/+657
| | | | | | | | | | | | | | | | | | | | | | | | Add support for GPIO controller used by Xilinx Zynq. v3 changes: - Use linux/gpio/driver.h instead of linux/gpio.h - Make irq a local variable in probe v2 changes: - convert to pm_runtime_force_(suspend|resume) - add pm_runtime_set_active in probe() - also (un)prepare clocks when they are dis-/enabled - add some missing calls to pm_runtime_get() - use pm_runtime_put() instead of sync variant - remove gpio chip in driver remove() - remove redundant type casts - directly use IO helpers - use BIT macro to set/clear bits - migrate to GPIOLIB_IRQCHIP Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpiolib: of: Update debug messages for of_get_named_gpiod_flagsTushar Behera2014-07-091-3/+4
| | | | | | | | | | | | | | | | | | | | | | Following is the debug output (only a few examples) before and after the patch. $ dmesg | grep of_get_named_gpiod_flags Before: of_get_named_gpiod_flags: can't parse gpios property of node '/mmc@12220000[0]' of_get_named_gpiod_flags exited with status 0 After: of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/mmc@12220000[0]' of_get_named_gpiod_flags: parsed 'gpios' property of node '/gpio-keys/power[0]' - status (0) Signed-off-by: Tushar Behera <tushar.b@samsung.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: move integer GPIO support to its own fileAlexandre Courbot2014-07-093-105/+112
| | | | | | | | | | The old integer GPIO interface is, in effect, a privileged user of the gpiod interface. Reflect this fact further by moving legacy GPIO support into its own source file. This makes the code clearer and will allow us to disable legacy GPIO support in the (far) future. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: move sysfs support to its own fileAlexandre Courbot2014-07-094-907/+925
| | | | | | | | | | | | | | | sysfs support is currently entangled within the core GPIO support, while it should relly just be a (privileged) user of the integer GPIO API. This patch is a first step towards making the gpiolib code more readable by splitting it into logical parts. Move all sysfs support to their own source file, and share static members of gpiolib that need to be in the private gpiolib.h file. In the future we will want to put some of them back into gpiolib.c, but this first patch let us at least identify them. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: always compile label supportAlexandre Courbot2014-07-091-25/+2
| | | | | | | | | Compiling out GPIO labels results in a space gain so small that it can hardly be justified. Labels can also be useful for printing debug messages, so always keep them around. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: omap: Add an omap prefix to all functionsJavier Martinez Canillas2014-07-091-131/+137
| | | | | | | | | | | The GPIO OMAP driver didn't have a consistent naming scheme for all its functions. Some of them had an omap prefix while others didn't. There are many advantages on having a separate namespace for driver functions so let's add an "omap" prefix to all of them. Signed-off-by: Javier Martinez Canillas <jmartinez@softcrates.net> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: omap: Remove unneeded includeJavier Martinez Canillas2014-07-091-1/+0
| | | | | | | | | | | The <linux/irqchip/chained_irq.h> header is already included when selecting GPIOLIB_IRQCHIP so there is no need to do it in the driver. This is a left over from commit fb655f5 ("gpio: omap: convert driver to use gpiolib irqchip"). Signed-off-by: Javier Martinez Canillas <jmartinez@softcrates.net> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: omap: Remove unnecessary lockdep classJavier Martinez Canillas2014-07-091-6/+0
| | | | | | | | | | | | | | GPIO irqchips assign to the cascaded IRQs their own lock class in order to avoid warnings about lockdep recursions since that allow the lockdep core to keep track of things. Since commit e45d1c80 ("gpio: put GPIO IRQs into their own lock class") there is no need to do this in a driver if it's using the GPIO irqchip helpers since gpiolib already assigns a lockdep class. Signed-off-by: Javier Martinez Canillas <jmartinez@softcrates.net> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: gpio-ucb1400.c: Cleaning up null pointer checks that could never happenRickard Strandqvist2014-07-091-1/+1
| | | | | | | | | Removal of null pointer checks that could never happen This was found using a static code analysis program called cppcheck Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: gpio-twl4030.c: Cleaning up null pointer checks that could never happenRickard Strandqvist2014-07-091-1/+1
| | | | | | | | | Removal of null pointer checks that could never happen This was found using a static code analysis program called cppcheck Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: vr41xx: fix up errorpath on probe()Linus Walleij2014-07-091-2/+6
| | | | | | | | The driver was not checking the return value from gpiochip_add() properly, so add a bail-out check. Reported-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: rcar: clamp returned value to [0,1]Jürg Billeter2014-07-091-2/+2
| | | | | | | | While it will be clamped to bool by gpiolib, let's make this sane in the driver as well. Signed-off-by: Jürg Billeter <j@bitron.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio-pxa: gpio0 and gpio1 support on dtAndrew Ruder2014-07-071-0/+5
| | | | | | | | | | pxa_gpio_probe() has some issues supporting the gpio0 and gpio1 interrupts under device-tree - it never actually sets up the chain handler to get interrupts on edge detect for GPIO0 and GPIO1. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: pxa: Make of_device_id array constJingoo Han2014-06-191-1/+1
| | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Neil Zhang <zhangwm@marvell.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: lpc32xx: Make of_device_id array constJingoo Han2014-06-191-1/+1
| | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-By: Roland Stigge <stigge@antcom.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: intel-mid: switch to using gpiolib irqchip helpersLinus Walleij2014-06-191-61/+25
| | | | | | | | | This switches the Intel MID GPIO driver over to using the gpiolib irqchip helpers in the gpiolib core. Cc: xinhui.pan <xinhuiX.pan@intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: stmpe: switch to use gpiolib irqchip helpersLinus Walleij2014-06-192-84/+28
| | | | | | | | This switches the STMPE driver to use the gpiolib irqchip helpers. Tested-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds2014-06-161-13/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking fixes from David Miller: 1) Fix checksumming regressions, from Tom Herbert. 2) Undo unintentional permissions changes for SCTP rto_alpha and rto_beta sysfs knobs, from Denial Borkmann. 3) VXLAN, like other IP tunnels, should advertize it's encapsulation size using dev->needed_headroom instead of dev->hard_header_len. From Cong Wang. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: net: sctp: fix permissions for rto_alpha and rto_beta knobs vxlan: Checksum fixes net: add skb_pop_rcv_encapsulation udp: call __skb_checksum_complete when doing full checksum net: Fix save software checksum complete net: Fix GSO constants to match NETIF flags udp: ipv4: do not waste time in __udp4_lib_mcast_demux_lookup vxlan: use dev->needed_headroom instead of dev->hard_header_len MAINTAINERS: update cxgb4 maintainer
| * vxlan: Checksum fixesTom Herbert2014-06-151-9/+2
| | | | | | | | | | | | | | | | Call skb_pop_rcv_encapsulation and postpull_rcsum for the Ethernet header to work properly with checksum complete. Signed-off-by: Tom Herbert <therbert@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * vxlan: use dev->needed_headroom instead of dev->hard_header_lenCong Wang2014-06-141-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we mirror packets from a vxlan tunnel to other device, the mirror device should see the same packets (that is, without outer header). Because vxlan tunnel sets dev->hard_header_len, tcf_mirred() resets mac header back to outer mac, the mirror device actually sees packets with outer headers Vxlan tunnel should set dev->needed_headroom instead of dev->hard_header_len, like what other ip tunnels do. This fixes the above problem. Cc: "David S. Miller" <davem@davemloft.net> Cc: stephen hemminger <stephen@networkplumber.org> Cc: Pravin B Shelar <pshelar@nicira.com> Signed-off-by: Cong Wang <cwang@twopensource.com> Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge tag 'clk-for-linus-3.16-part2' of ↵Linus Torvalds2014-06-1616-225/+1531
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/mike.turquette/linux Pull more clock framework updates from Mike Turquette: "This contains the second half the of the clk changes for 3.16. They are simply fixes and code refactoring for the OMAP clock drivers. The sunxi clock driver changes include splitting out the one mega-driver into several smaller pieces and adding support for the A31 SoC clocks" * tag 'clk-for-linus-3.16-part2' of git://git.linaro.org/people/mike.turquette/linux: (25 commits) clk: sunxi: document PRCM clock compatible strings clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support clk: sun6i: Protect SDRAM gating bit clk: sun6i: Protect CPU clock clk: sunxi: Rework clock protection code clk: sunxi: Move the GMAC clock to a file of its own clk: sunxi: Move the 24M oscillator to a file of its own clk: sunxi: Remove calls to clk_put clk: sunxi: document new A31 USB clock compatible clk: sunxi: Implement A31 USB clock ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher frequencies CLK: TI: dpll: support OMAP5 MPU DPLL that need special handling for higher frequencies ARM: OMAP5+: dpll: support Duty Cycle Correction(DCC) CLK: TI: clk-54xx: Set the rate for dpll_abe_m2x2_ck CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic) dt:/bindings: DRA7 ATL (Audio Tracking Logic) clock bindings ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clock CLK: TI: gate: add composite interface clock to OMAP2 only build ARM: OMAP2: clock: add DT boot support for cpufreq_ck CLK: TI: OMAP2: add clock init support ...
| * | clk: sunxi: add PRCM (Power/Reset/Clock Management) clks supportBoris BREZILLON2014-06-114-0/+411
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PRCM (Power/Reset/Clock Management) unit provides several clock devices: - AR100 clk: used to clock the Power Management co-processor - AHB0 clk: used to clock the AHB0 bus - APB0 clk and gates: used to clk peripherals connected to the APB0 bus Add support for these clks in a separate driver so that they can be probed as platform devices instead of registered during early init. This is needed to be able to probe PRCM MFD subdevices. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | clk: sun6i: Protect SDRAM gating bitMaxime Ripard2014-06-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Prevent the SDRAM controller from being gated by force-enabling it in the machine code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | clk: sun6i: Protect CPU clockMaxime Ripard2014-06-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now, AHB is an indirect child clock of the CPU clock. If that happens to change, since the CPU clock has no other consumers declared in Linux, it would be shut down, which is not really a good idea. Prevent this by forcing it enabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | clk: sunxi: Rework clock protection codeMaxime Ripard2014-06-111-28/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we start to have a lot of clocks to protect, some of them in a few SoCs only, it becomes difficult to handle the clock protection without having to add per machine exceptions. Add per-SoC data to tell which clock to leave enabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | clk: sunxi: Move the GMAC clock to a file of its ownMaxime Ripard2014-06-113-99/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have a folder of our own, we can actually make use of it by splitting the huge clock file into several sub drivers. The gmac clock is pretty easy to deal with, since it's pretty much isolated and doesn't have any dependency on the other clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | clk: sunxi: Move the 24M oscillator to a file of its ownMaxime Ripard2014-06-113-57/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have a folder of our own, we can actually make use of it by splitting the huge clock file into several sub drivers. The main oscillator is pretty easy to deal with, since it's pretty much isolated. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | clk: sunxi: Remove calls to clk_putMaxime Ripard2014-06-111-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Callers of clk_put must disable the clock first. This also means that as long as the clock is enabled the driver should hold a reference to that clock. Hence, the call to clk_put here are bogus and should be removed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | clk: sunxi: Implement A31 USB clockMaxime Ripard2014-06-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A31 USB clock slightly differ from its older counterparts, mostly because it has a different gate for each PHY, while the older one had a single gate for all the phy. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Emilio López <emilio@elopez.com.ar>
| * | Merge branch 'for-v3.16/ti-clk-drv' of github.com:t-kristo/linux-pm into ↵Mike Turquette2014-06-119-38/+874
| |\ \ | | | | | | | | | | | | clk-next
| | * | CLK: TI: dpll: support OMAP5 MPU DPLL that need special handling for higher ↵Nishanth Menon2014-06-061-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | frequencies MPU DPLL on OMAP5, DRA75x, DRA72x has a limitation on the maximum frequency it can be locked at. Duty Cycle Correction circuit is used to recover a correct duty cycle for achieving higher frequencies (hardware internally switches output to M3 output(CLKOUTHIF) from M2 output (CLKOUT)). So provide support to setup required data to handle Duty cycle by the setting up the minimum frequency for DPLL. 1.4GHz is common for all these devices and is based on Technical Reference Manual information for OMAP5432((SWPU282U) chapter 3.6.3.3.1 "DPLLs Output Clocks Parameters", and equivalent information from DRA75x, DRA72x documentation(SPRUHP2E, SPRUHI2P). Signed-off-by: Nishanth Menon <nm@ti.com> [t-kristo@ti.com: updated for latest dpll init API call] Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: clk-54xx: Set the rate for dpll_abe_m2x2_ckPeter Ujfalusi2014-06-061-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to get correct clock dividers for AESS/ABE we need to set the dpll_abe_m2x2_ck rate to be double of dpll_abe_ck. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)Peter Ujfalusi2014-05-282-1/+314
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Audio Tracking Logic is designed to be used by HD Radio applications to synchronize the audio output clocks to the baseband clock. ATL can be also used to track errors between two reference clocks (BWS, AWS) and generate a modulated clock output which averages to some desired frequency. In essence ATL is generating a clock to be used by an audio codec and also to be used by the SoC as MCLK. To be able to integrate the ATL provided clocks to the clock tree we need two types of DT binding: - DT clock nodes to represent the ATL clocks towards the CCF - binding for the ATL IP itself which is going to handle the hw configuration The reason for this type of setup is that ATL itself is a separate device in the SoC, it has it's own address space and clock domain. Other IPs can use the ATL generated clock as their functional clock (McASPs for example) and external components like audio codecs can also use the very same clock as their MCLK. The ATL IP in DRA7 contains 4 ATL instences. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clockPeter Ujfalusi2014-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allign the name with the other atl clock names: atlclkin3_ck -> atl_clkin3_ck Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: gate: add composite interface clock to OMAP2 only buildTero Kristo2014-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Composite interface clock is needed by OMAP2, but it was only built in for OMAP3. Fixed the conditional build flag checks for this. Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | ARM: OMAP2: clock: add DT boot support for cpufreq_ckTero Kristo2014-05-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The clock and clkdev for this are added manually. Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: OMAP2: add clock init supportTero Kristo2014-05-282-0/+255
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for registering the alias clocks, boot time clock-enable list and disabling autoidle of clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: interface: add support for omap2430 specific interface clockTero Kristo2014-05-281-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP2430 I2CHS modules require specific hardware ops to be used, so added a new compatible string for this. Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: APLL: add support for omap2 apllsTero Kristo2014-05-281-0/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for omap2 type aplls, which have gating and autoidle functionality. Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: DPLL: add support for omap2 core dpllTero Kristo2014-05-281-11/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP2 has slightly different DPLL compared to later OMAP generations. This patch adds support for the ti,omap2-dpll-core-clock and also adds the bindings documentation. Signed-off-by: Tero Kristo <t-kristo@ti.com>
| | * | CLK: TI: DPLL: simplify autoidle register detection logicTero Kristo2014-05-281-24/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AMxxxx dpll_data previously had autoidle_mask set, even if these SoC:s don't have autoidle register. Remove the bit-field value as it is unused, also drop the unnecessary DPLL_HAS_AUTOIDLE flag passing during init, as we can just simply check against the contents of the autoidle_mask. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | | | Merge git://git.infradead.org/users/willy/linux-nvmeLinus Torvalds2014-06-162-90/+149
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull NVMe update from Matthew Wilcox: "Mostly bugfixes again for the NVMe driver. I'd like to call out the exported tracepoint in the block layer; I believe Keith has cleared this with Jens. We've had a few reports from people who're really pounding on NVMe devices at scale, hence the timeout changes (and new module parameters), hotplug cpu deadlock, tracepoints, and minor performance tweaks" [ Jens hadn't seen that tracepoint thing, but is ok with it - it will end up going away when mq conversion happens ] * git://git.infradead.org/users/willy/linux-nvme: (22 commits) NVMe: Fix START_STOP_UNIT Scsi->NVMe translation. NVMe: Use Log Page constants in SCSI emulation NVMe: Define Log Page constants NVMe: Fix hot cpu notification dead lock NVMe: Rename io_timeout to nvme_io_timeout NVMe: Use last bytes of f/w rev SCSI Inquiry NVMe: Adhere to request queue block accounting enable/disable NVMe: Fix nvme get/put queue semantics NVMe: Delete NVME_GET_FEAT_TEMP_THRESH NVMe: Make admin timeout a module parameter NVMe: Make iod bio timeout a parameter NVMe: Prevent possible NULL pointer dereference NVMe: Fix the buffer size passed in GetLogPage(CDW10.NUMD) NVMe: Update data structures for NVMe 1.2 NVMe: Enable BUILD_BUG_ON checks NVMe: Update namespace and controller identify structures to the 1.1a spec NVMe: Flush with data support NVMe: Configure support for block flush NVMe: Add tracepoints NVMe: Protect against badly formatted CQEs ...
| * | | | NVMe: Fix START_STOP_UNIT Scsi->NVMe translation.Dan McLeran2014-06-131-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains several fixes for Scsi START_STOP_UNIT. The previous code did not account for signed vs. unsigned arithmetic which resulted in an invalid lowest power state caculation when the device only supports 1 power state. The code for Power Condition == 2 (Idle) was not following the spec. The spec calls for setting the device to specific power states, depending upon Power Condition Modifier, without accounting for the number of power states supported by the device. The code for Power Condition == 3 (Standby) was using a hard-coded '0' which is replaced with the macro POWER_STATE_0. Signed-off-by: Dan McLeran <daniel.mcleran@intel.com> Reviewed-by: Vishal Verma <vishal.l.verma@linux.intel.com> Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
| * | | | NVMe: Use Log Page constants in SCSI emulationMatthew Wilcox2014-06-131-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nvme-scsi file defined its own Log Page constant. Use the newly-defined one from the header file instead. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 06:52:44 +0100