linux - linux

	Commit message (Expand)	Author	Age	Files	Lines
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\| * \| \| \| \|	spi: tegra: use reset framework	Stephen Warren	2013-12-12	4	-15/+42
\| * \| \| \| \|	staging: nvec: use reset framework	Stephen Warren	2013-12-12	2	-4/+12
\| * \| \| \| \|	i2c: tegra: use reset framework	Stephen Warren	2013-12-12	1	-3/+10
\| * \| \| \| \|	dma: tegra: register as an OF DMA controller	Stephen Warren	2013-12-12	1	-3/+36
\| * \| \| \| \|	dma: tegra: use reset framework	Stephen Warren	2013-12-12	1	-3/+10
\| * \| \| \| \|	ARM: tegra: pass reset to tegra_powergate_sequence_power_up()	Stephen Warren	2013-12-12	2	-3/+6
\| * \| \| \| \|	drm/tegra: use reset framework	Stephen Warren	2013-12-12	5	-6/+39
\| * \| \| \| \|	pci: tegra: use reset framework	Stephen Warren	2013-12-12	1	-14/+36
\| * \| \| \| \|	clk: tegra: implement a reset driver	Stephen Warren	2013-12-12	6	-6/+57
\| * \| \| \| \|	Merge tag 'clk-tegra-for-3.14' into for-3.14/dmas-resets-rework	Stephen Warren	2013-12-12	16	-3008/+4678
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\| \| * \| \| \| \|	clk: tegra: fix __clk_lookup() return value checks	Wei Yongjun	2013-11-28	1	-4/+4
\| \| * \| \| \| \|	clk: tegra: Do not print errors for clk_round_rate()	Thierry Reding	2013-11-28	1	-6/+3
\| \| * \| \| \| \|	clk: tegra: Initialize DSI low-power clocks	Thierry Reding	2013-11-26	1	-0/+2
\| \| * \| \| \| \|	clk: tegra: add FUSE clock device	Alexandre Courbot	2013-11-26	4	-1/+4
\| \| * \| \| \| \|	clk: tegra: Properly setup PWM clock on Tegra30	Thierry Reding	2013-11-26	1	-1/+3
\| \| * \| \| \| \|	clk: tegra: Initialize secondary gr3d clock on Tegra30	Thierry Reding	2013-11-26	1	-0/+1
\| \| * \| \| \| \|	clk: tegra114: Initialize clocks needed for HDMI	Mikko Perttunen	2013-11-26	1	-0/+2
\| \| * \| \| \| \|	clk: tegra124: add suspend/resume function for tegra_cpu_car_ops	Joseph Lo	2013-11-26	1	-0/+27
\| \| * \| \| \| \|	clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops	Joseph Lo	2013-11-26	1	-0/+26
\| \| * \| \| \| \|	clk: tegra124: Add support for Tegra124 clocks	Peter De Schrijver	2013-11-26	2	-0/+1371
\| \| * \| \| \| \|	clk: tegra124: Add new peripheral clocks	Peter De Schrijver	2013-11-26	1	-0/+69
\| \| * \| \| \| \|	clk: tegra124: Add common clk IDs to clk-id.h	Peter De Schrijver	2013-11-26	1	-0/+22
\| \| * \| \| \| \|	clk: tegra: add TEGRA_PERIPH_NO_GATE	Peter De Schrijver	2013-11-26	3	-3/+22
\| \| * \| \| \| \|	clk: tegra: add locking to periph clks	Peter De Schrijver	2013-11-26	2	-19/+24
\| \| * \| \| \| \|	clk: tegra: Add periph regs bank X	Peter De Schrijver	2013-11-26	1	-0/+10
\| \| * \| \| \| \|	clk: tegra: Add support for PLLSS	Peter De Schrijver	2013-11-26	2	-2/+126
\| \| * \| \| \| \|	clk: tegra: move tegra20 to common infra	Peter De Schrijver	2013-11-26	1	-402/+255
\| \| * \| \| \| \|	clk: tegra: move tegra30 to common infra	Peter De Schrijver	2013-11-26	1	-895/+403
\| \| * \| \| \| \|	clk: tegra: introduce common gen4 super clock	Peter De Schrijver	2013-11-26	4	-74/+155
\| \| * \| \| \| \|	clk: tegra: move PMC, fixed clocks to common files	Peter De Schrijver	2013-11-26	5	-74/+253
\| \| * \| \| \| \|	clk: tegra: move periph clocks to common file	Peter De Schrijver	2013-11-26	6	-581/+627
\| \| * \| \| \| \|	clk: tegra: move audio clk to common file	Peter De Schrijver	2013-11-26	4	-208/+402
\| \| * \| \| \| \|	clk: tegra: add clkdev registration infra	Peter De Schrijver	2013-11-26	3	-159/+179
\| \| * \| \| \| \|	clk: tegra: add common infra for DT clocks	Peter De Schrijver	2013-11-26	2	-0/+16
\| \| * \| \| \| \|	clk: tegra: add header for common tegra clock IDs	Peter De Schrijver	2013-11-26	1	-0/+213
\| \| * \| \| \| \|	clk: tegra: move fields to tegra_clk_pll_params	Peter De Schrijver	2013-11-26	5	-177/+175
\| \| * \| \| \| \|	clk: tegra: use pll_ref as the pll_e parent	Peter De Schrijver	2013-11-26	2	-4/+7
\| \| * \| \| \| \|	clk: tegra: move some PLLC and PLLXC init to clk-pll.c	Peter De Schrijver	2013-11-26	2	-93/+111
\| \| * \| \| \| \|	clk: tegra: Add TEGRA_PERIPH_NO_DIV flag	Peter De Schrijver	2013-11-26	2	-3/+9
\| \| * \| \| \| \|	clk: tegra: common periph_clk_enb_refcnt and clks	Peter De Schrijver	2013-11-26	6	-108/+85
\| \| * \| \| \| \|	clk: tegra: simplify periph clock data	Peter De Schrijver	2013-11-26	7	-584/+464
\| \| * \| \| \| \|	clk: tegra: Fix clock rate computation	Thierry Reding	2013-11-26	1	-0/+2
\| \| * \| \| \| \|	clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3d	Thierry Reding	2013-11-26	1	-4/+4
\| \| * \| \| \| \|	clk: tegra: PLLE spread spectrum control	Peter De Schrijver	2013-11-26	1	-1/+29
\| \| * \| \| \| \|	clk: tegra: Set the clk parent of host1x to pll_p	Andrew Chew	2013-11-26	1	-0/+1
\| \| * \| \| \| \|	clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clks	Peter De Schrijver	2013-11-26	2	-33/+39
\| \| * \| \| \| \|	clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2	Mark Zhang	2013-11-25	1	-0/+3
\| \| * \| \| \| \|	clk: tegra: Fix vde/2d/3d clock src offset	Mark Zhang	2013-11-25	1	-10/+3
\| \| * \| \| \| \|	clk: tegra: Correct sbc mux width & parent	Mark Zhang	2013-11-25	1	-6/+6
\| \| * \| \| \| \|	clk: tegra: replace enum tegra114_clk by binding header	Peter De Schrijver	2013-11-25	1	-233/+198
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