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* pinctrl: remove remaining users of gpiochip_remove() retvalLinus Walleij2014-09-236-39/+10
| | | | | | | | | Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* driver:gpio remove all usage of gpio_remove retval in driverabdoulaye berthe2014-09-1819-96/+40
| | | | | | | | | | | | | this remove all reference to gpio_remove retval in all driver except pinctrl and gpio. the same thing is done for gpio and pinctrl in two different patches. Signed-off-by: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: Michael Büsch <m@bues.ch> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: syscon: reuse for keystone 2 socsGrygorii Strashko2014-09-161-0/+35
| | | | | | | | | | | | | | | | | | | | | On Keystone SOCs, ARM host can send interrupts to DSP cores using the DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for each DSP core. This is one of the component used by the IPC mechanism used on Keystone SOCs. Keystone 2 DSP GPIO controller has specific features: - each GPIO can be configured only as output pin; - setting GPIO value to 1 causes IRQ generation on target DSP core; - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still pending. This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs, because the Keystone 2 DSP GPIO controller is controlled through Syscon devices and, as requested by Linus Walleij, such kind of GPIO controllers should be integrated with drivers/gpio/gpio-syscon.c driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: syscon: retrive syscon node and regs offsets from dtGrygorii Strashko2014-09-161-8/+43
| | | | | | | | | | | | | | | | | | | | | | This patch adds handling of new "gpio,syscon-dev" DT property, which allows to specify syscon node and data/direction registers offsets in DT. "gpio,syscon-dev" has following format: gpio,syscon-dev = <&syscon_dev data_reg_offset [direction_reg_offset]>; where - syscon_dev - phandle on syscon node - data_reg_offset - offset of data register (in bytes) - direction_reg_offset - offset of dirrection register (optional, in bytes) for example: gpio,syscon-dev = <&devctrl 0x254>; In such way, the support of multiple Syscon GPIO devices is added. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: syscon: add soc specific callback to assign output valueGrygorii Strashko2014-09-161-2/+6
| | | | | | | | | | | | | Some SoCs (like Keystone) may require to perform special sequence of operations to assign output GPIO value, so default implementation of .set() callback from gpio-syscon driver can't be used. Hence, add optional, SoC specific callback to assign output gpio value. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: mcp23s08 to support both device tree and platform dataSonic Zhang2014-09-042-31/+34
| | | | | | | | | | | | | | | | | Device tree is not enabled in some architecture where gpio driver mcp23s08 is still required. v2-changes: - Parse device tree properties into platform data other than individual variables. v3-changes: - Use of_node in gpio_chip device structure, because the struct device * always has an of_node which is NULL when OF is not used. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fixed broken wakeup implementationEzra Savard2014-09-041-14/+20
| | | | | | | | | | Use of unmask/mask in set_wake was an incorrect implementation. The new implementation correctly sets wakeup for the gpio chip's IRQ so the gpio chip will not sleep while wakeup-enabled gpio are in use. Signed-off-by: Ezra Savard <ezra.savard@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Mask non-wakeup GPIO interrupts on suspendEzra Savard2014-09-041-1/+3
| | | | | | | | | Added flag to the GPIO chip so that IRQ from non-wakeup GPIO will not wake the system. Signed-off-by: Ezra Savard <ezra.savard@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Take bank offset into account when reporting a IRQLars-Peter Clausen2014-09-031-1/+9
| | | | | | | | | | When looking up the IRQ the bank offset needs to be taken into account. Otherwise interrupts for banks other than bank 0 get incorrectly reported as interrupts for bank 0. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: adnp: switch to use irqchip helpersLinus Walleij2014-09-022-108/+48
| | | | | | | | | | | This switches the ADNP GPIO driver to use the gpiolib irqchip helpers. Also do some random refactoring to make it look like most other GPIO drivers. Cc: Roland Stigge <stigge@antcom.de> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: change gpiochip_request_own_desc() prototypeAlexandre Courbot2014-08-292-21/+17
| | | | | | | | | | | | | | | | The current prototype of gpiochip_request_own_desc() requires to obtain a pointer to a descriptor. This is in contradiction to all other GPIO request schemes, and imposes an extra step of obtaining a descriptor to drivers. Most drivers actually cannot even perform that step since the function that does it (gpichip_get_desc()) is gpiolib-private. Change gpiochip_request_own_desc() to return a descriptor from a (chip, hwnum) tuple and update users of this function (currently gpiolib-acpi only). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: acpi: normalize use of gpiochip_get_desc()Alexandre Courbot2014-08-291-8/+14
| | | | | | | | | | | | | GPIO descriptors are changing from unique and permanent tokens to allocated resources. Therefore gpiochip_get_desc() cannot be used as a way to obtain a global GPIO descriptor anymore. This patch updates the gpiolib ACPI support code to keep and use the descriptor returned by a centralized call to gpiochip_get_desc(). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Reduce level of indention in zynq_gpio_irqhandler()Lars-Peter Clausen2014-08-291-12/+19
| | | | | | | | | zynq_gpio_irqhandler() uses up to 7 tabs of indention in some parts. Refactor things to use a helper function for the inner loop to reduce the indention to a sane level. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Remove .owner field for driverMichal Simek2014-08-291-1/+0
| | | | | | | | | | | | | | There is no need to init .owner field. Based on the patch from Peter Griffin <peter.griffin@linaro.org> "mmc: remove .owner field for drivers using module_platform_driver" This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway." Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Add APM X-Gene SoC GPIO controller supportFeng Kan2014-08-283-0/+260
| | | | | | | Add APM X-Gene SoC gpio controller driver. Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: pca953x: Drop deprecated DT bindingsMarkus Pargmann2014-08-281-51/+3
| | | | | | | | Drop deprecated DT bindings and use automaticly assigned gpio and irq bases. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'renesas-sh-drivers-for-v3.17' of ↵Linus Torvalds2014-08-262-3/+6
|\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas Pull SH driver fix from Simon Horman: "Confine SH_INTC to platforms that need it" * tag 'renesas-sh-drivers-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: sh: intc: Confine SH_INTC to platforms that need it
| * sh: intc: Confine SH_INTC to platforms that need itGeert Uytterhoeven2014-08-222-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the sh-intc driver is compiled on all SuperH and non-multiplatform SH-Mobile platforms, while it's only used on a limited number of platforms: - SuperH: SH2(A), SH3(A), SH4(A)(L) (all but SH5) - ARM: sh7372, sh73a0 Drop the "default y" on SH_INTC, make all CPU platforms that use it select it, and protect all sub-options by "if SH_INTC" to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds2014-08-251-4/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: "A couple of EFI fixes, plus misc fixes all around the map" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: efi/arm64: Store Runtime Services revision firmware: Do not use WARN_ON(!spin_is_locked()) x86_32, entry: Clean up sysenter_badsys declaration x86/doc: Fix the 'tlb_single_page_flush_ceiling' sysconfig path x86/mm: Fix sparse 'tlb_single_page_flush_ceiling' warning and make the variable read-mostly x86/mm: Fix RCU splat from new TLB tracepoints
| * | firmware: Do not use WARN_ON(!spin_is_locked())Guenter Roeck2014-08-221-4/+4
| |/ | | | | | | | | | | | | | | | | | | | | spin_is_locked() always returns false for uniprocessor configurations in several architectures, so do not use WARN_ON with it. Use lockdep_assert_held() instead to also reduce overhead in non-debug kernels. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Cc: <stable@vger.kernel.org> Signed-off-by: Matt Fleming <matt.fleming@intel.com>
* | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2014-08-251-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A collection of fixes from this week, it's been pretty quiet and nothing really stands out as particularly noteworthy here -- mostly minor fixes across the field: - ODROID booting was fixed due to PMIC interrupts missing in DT - a collection of i.MX fixes - minor Tegra fix for regulators - Rockchip fix and addition of SoC-specific mailing list to make it easier to find posted patches" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: bus: arm-ccn: Fix warning message ARM: shmobile: koelsch: Remove non-existent i2c6 pinmux ARM: tegra: apalis/colibri t30: fix on-module 5v0 supplies MAINTAINERS: add new Rockchip SoC list ARM: dts: rockchip: readd missing mmc0 pinctrl settings ARM: dts: ODROID i2c improvements ARM: dts: Enable PMIC interrupts on ODROID ARM: dts: imx6sx: fix the pad setting for uart CTS_B ARM: dts: i.MX53: fix apparent bug in VPU clks ARM: imx: correct gpu2d_axi and gpu3d_axi clock setting ARM: dts: imx6: edmqmx6: change enet reset pin ARM: dts: vf610-twr: Fix pinctrl_esdhc1 pin definitions. ARM: imx: remove unnecessary ARCH_HAS_OPP select ARM: imx: fix TLB missing of IOMUXC base address during suspend ARM: imx6: fix SMP compilation again ARM: dt: sun6i: Add #address-cells and #size-cells to i2c controller nodes
| * | bus: arm-ccn: Fix warning messagePawel Moll2014-08-241-1/+1
| |/ | | | | | | | | | | | | | | | | A message warning a user about wrong vc value was printing out port instead. Reported-by: Drew Richardson <drew.richardson@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'gpio-v3.17-2' of ↵Linus Torvalds2014-08-254-12/+48
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull gpio fixes from Linus Walleij: - a largeish fix for the IRQ handling in the new Zynq driver. The quite verbose commit message gives the exact details. - move some defines for gpiod flags outside an ifdef to make stub functions work again. - various minor fixes that we can accept for -rc1. * tag 'gpio-v3.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio-lynxpoint: enable input sensing in resume gpio: move GPIOD flags outside #ifdef gpio: delete unneeded test before of_node_put gpio: zynq: Fix IRQ handlers gpiolib: devres: use correct structure type name in sizeof MAINTAINERS: Change maintainer for gpio-bcm-kona.c
| * | gpio-lynxpoint: enable input sensing in resumeMathias Nyman2014-08-211-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It appears that input sensing bit might be reset during suspend/resume. Set input sensing again for all requested gpios in resume Tested-by: Jerome Blin <jerome.blin@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: delete unneeded test before of_node_putJulia Lawall2014-08-171-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Of_node_put supports NULL as its argument, so the initial test is not necessary. Suggested by Uwe Kleine-König. The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; @@ -if (e) of_node_put(e); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: zynq: Fix IRQ handlersLars-Peter Clausen2014-08-171-8/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq GPIO interrupt handling code as two main issues: 1) It does not support IRQF_ONESHOT interrupt since it uses handle_simple_irq() for the interrupt handler. handle_simple_irq() does not do masking and unmasking of the IRQ that is required for this chip to be able to support IRQF_ONESHOT IRQs, causing the CPU to lock up in a interrupt storm if such a interrupt is requested. 2) Interrupts are acked after the primary interrupt handlers for all asserted interrupts in a bank have been called. For edge triggered interrupt this is to late and may cause a interrupt to be missed. For level triggered oneshot interrupts this is to early and causes the interrupt handler to run twice per interrupt. This patch addresses the issue by updating the driver to use the correct IRQ chip handler functions that are appropriate for this kind of IRQ controller. The following diagram gives an overview of how the interrupt detection circuit works, it is not necessarily a accurate depiction of the real hardware though. INT_POL/INT_ON_ANY | | +---+ INT_STATUS `-| | | | E |-. | ,---| | \ |\ +----+ | +---+ | +---+ `----| | ,-------|S | ,*--| | GPIO_IN -* | |- | Q|- | & |-- IRQ_OUT | +---+ ,-----| | ,-|R | ,o| | `---| | / |/ | +----+ | +---+ | = |- | | | ,-| | INT_TYPE ACK INT_MASK | +---+ | INT_POL GPIO_IN is the raw signal level connected to the hardware pin. This signal is routed to a edge detector and to a level detector. The edge detector can be configured to either detect a rising or falling edge or both edges. The level detector can detect either a level high or level low event. Depending on the setting of the INT_TYPE register either the edge or level event will be propagated to the INT_STATUS register. As long as a interrupt condition is detected the INT_STATUS register will be set to 1. It can be cleared to 0 if (and only if) the interrupt condition is no longer detected and software acknowledges the interrupt by writing a 1 to the address of the INT_STATUS register. There is also the INT_MASK register which can be used to disable the propagation of the INT_STATUS signal to the upstream IRQ controller. What is important to note is that the interrupt detection logic itself can not be disabled, only the propagation of the INT_STATUS register can be delayed. This means that for level type interrupts the interrupt must only be acknowledged after the interrupt source has been cleared otherwise it will stay asserted and the interrupt handler will be run a second time. For IRQF_ONESHOT interrupts this means that the IRQ must only be acknowledged after the threaded interrupt has finished running. If a second interrupt comes in between handling the first interrupt and acknowledging it the external interrupt will be asserted, which means trying to acknowledge the first interrupt will not clear the INT_STATUS register and the interrupt handler will be run a second time when the IRQ is unmasked, so no interrupts will be lost. The handle_fasteoi_irq() handler in combination with the IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED flags will have the desired behavior. For edge triggered interrupts a slightly different strategy is necessary. For edge triggered interrupts the interrupt condition is only true when the edge itself is detected, this means this is the only time the INT_STATUS register is set, acknowledging the interrupt any time after that will clear the INT_STATUS register until the next interrupt happens. This means in order to not loose any interrupts the interrupt needs to be acknowledged before running the interrupt handler. If a second interrupt occurs after the first interrupt handler has finished but before the interrupt is unmasked the INT_STATUS register will be re-asserted and the interrupt handler runs a second time once the interrupt is unmasked. This means with this flow handling strategy no interrupts are lost for edge triggered interrupts. The handle_level_irq() handler will have the desired behavior. (Note: The handle_edge_irq() only needs to be used for edge triggered interrupts where the controller stops detecting the interrupt event when the interrupt is masked, for this controller the detection logic still works, while only the propagation is delayed when the interrupt is masked.) Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: devres: use correct structure type name in sizeofJulia Lawall2014-08-171-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Correct typo in the name of the type given to sizeof. Because it is the size of a pointer that is wanted, the typo has no impact on compilation or execution. This problem was found using Coccinelle (http://coccinelle.lip6.fr/). The semantic patch used can be found in message 0 of this patch series. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-08-2541-167/+309
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm fixes from Dave Airlie: "Intel and radeon fixes. Post KS/LC git requests from i915 and radeon stacked up. They are all fixes along with some new pci ids for radeon, and one maintainers file entry. - i915: display fixes and irq fixes - radeon: pci ids, and misc gpuvm, dpm and hdp cache" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (29 commits) MAINTAINERS: Add entry for Renesas DRM drivers drm/radeon: add additional SI pci ids drm/radeon: add new bonaire pci ids drm/radeon: add new KV pci id Revert "drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe" drm/radeon: fix active_cu mask on SI and CIK after re-init (v3) drm/radeon: fix active cu count for SI and CIK drm/radeon: re-enable selective GPUVM flushing drm/radeon: Sync ME and PFP after CP semaphore waits v4 drm/radeon: fix display handling in radeon_gpu_reset drm/radeon: fix pm handling in radeon_gpu_reset drm/radeon: Only flush HDP cache for indirect buffers from userspace drm/radeon: properly document reloc priority mask drm/i915: don't try to retrain a DP link on an inactive CRTC drm/i915: make sure VDD is turned off during system suspend drm/i915: cancel hotplug and dig_port work during suspend and unload drm/i915: fix HPD IRQ reenable work cancelation drm/i915: take display port power domain in DP HPD handler drm/i915: Don't try to enable cursor from setplane when crtc is disabled drm/i915: Skip load detect when intel_crtc->new_enable==true ...
| * | drm/radeon: add new KV pci idAlex Deucher2014-08-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | bug: https://bugs.freedesktop.org/show_bug.cgi?id=82912 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | Merge tag 'drm-intel-fixes-2014-08-21' of ↵Dave Airlie2014-08-218-55/+109
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel Display fixes from Ville and Imre, all cc: stable. * tag 'drm-intel-fixes-2014-08-21' of git://anongit.freedesktop.org/drm-intel: drm/i915: don't try to retrain a DP link on an inactive CRTC drm/i915: make sure VDD is turned off during system suspend drm/i915: cancel hotplug and dig_port work during suspend and unload drm/i915: fix HPD IRQ reenable work cancelation drm/i915: take display port power domain in DP HPD handler drm/i915: Don't try to enable cursor from setplane when crtc is disabled drm/i915: Skip load detect when intel_crtc->new_enable==true drm/i915: Fix locking for intel_enable_pipe_a()
| | * | drm/i915: don't try to retrain a DP link on an inactive CRTCImre Deak2014-08-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Atm we may retrain the DP link even if the CRTC is inactive through HPD work->intel_dp_check_link_status(). This in turn can lock up the PHY (at least on BYT), since the DP port is disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81948 Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: stable@vger.kernel.org (3.16+) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: make sure VDD is turned off during system suspendImre Deak2014-08-183-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Atm we may leave eDP VDD enabled during system suspend after the CRTCs are disabled through an HPD->DPCD read event. So disable VDD during suspend at a point when no HPDs can occur. Note that runtime suspend doesn't have the same problem, since there the RPM ref held by VDD provides already the needed serialization. v2: - add note to commit message about the runtime suspend path (Ville) - use edp_panel_vdd_off_sync(), so we can keep the WARN in edp_panel_vdd_off() (Ville) v3: - rebased on -fixes (for_each_intel_encoder()->list_for_each_entry()) (Imre) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v2) Cc: stable@vger.kernel.org (3.16+) [Jani: fix sparse warning reported by Fengguang Wu] Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: cancel hotplug and dig_port work during suspend and unloadImre Deak2014-08-183-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure these work handlers don't run after we system suspend or unload the driver. Note that we don't cancel the handlers during runtime suspend. That could lead to a lockup, since we take a runtime PM ref from the handlers themselves. Fortunaltely canceling there is not needed since the RPM ref itself provides for the needed serialization. v2: - fix the order of canceling dig_port_work wrt. hotplug_work (Ville) - zero out {long,short}_hpd_port_mask and hpd_event_bits for speed (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: stable@vger.kernel.org (3.16+) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: fix HPD IRQ reenable work cancelationImre Deak2014-08-183-22/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Atm, the HPD IRQ reenable timer can get rearmed right after it's canceled. Also to access the HPD IRQ mask registers we need to wake up the HW. Solve both issues by converting the reenable timer to a delayed work and grabbing a runtime PM reference in the work. By this we can also forgo canceling the timer during runtime suspend, since the only important thing there is that the HW is awake when we write the registers and that's ensured by the RPM ref. So do the cancelation only during driver unload time; this is also a requirement for an upcoming patch where we want to cancel all HPD related works only during system suspend and driver unload time, but not during runtime suspend. Note that there is still a race between the HPD IRQ reenable work and drm_irq_uninstall() during driver unload, where the work can reenable the HPD IRQs disabled by drm_irq_uninstall(). This isn't a problem since the HPD IRQs will still be effectively masked by the first level interrupt mask. v2-3: - unchanged v4: - use proper API for changing the expiration time for an already pending delayed work (Jani) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v2) Cc: stable@vger.kernel.org (3.16+) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: take display port power domain in DP HPD handlerImre Deak2014-08-181-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ville noticed that we can call ibx_digital_port_connected() which accesses the HW without holding any power well/runtime pm reference. Fix this by holding a display port power domain reference around the whole hpd_pulse handler. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Cc: stable@vger.kernel.org (3.16+) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: Don't try to enable cursor from setplane when crtc is disabledVille Syrjälä2014-08-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure the cursor gets fully clipped when enabling it on a disabled crtc via setplane. This will prevent the lower level code from attempting to enable the cursor in hardware. Cc: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: Skip load detect when intel_crtc->new_enable==trueVille Syrjälä2014-08-181-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During suspend we turn off the crtcs, but leave the staged config in place so that we can restore the display(s) to their previous state on resume. During resume when we attempt to apply the force pipe A quirk we use the load detect mechanism. That doesn't check whether there was an already staged configuration for the crtc since that's not even possible during normal runtime load detection. But during resume it is possible, and if we just blindly go and overwrite the staged crtc configuration for the load detection we can no longer restore the display to the correct state. Even worse, we don't even clear all the staged connector->encoder->crtc links so we may end up using a cloned setup for the load detection, and after we're done we just clear the links related to the VGA output leaving the links for the other outputs in place. This will eventually result in calling intel_set_mode() with mode==NULL but with valid connector->encoder->crtc links which will result in dereferencing the NULL mode since the code thinks it will have to a modeset. To avoid these problems don't use any crtc with new_enabled==true for load detection. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org (for 3.16) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: Fix locking for intel_enable_pipe_a()Ville Syrjälä2014-08-184-21/+17
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | intel_enable_pipe_a() gets called with all the modeset locks already held (by drm_modeset_lock_all()), so trying to grab the same locks using another drm_modeset_acquire_ctx is going to fail miserably. Move most of the drm_modeset_acquire_ctx handling (init/drop/fini) out from intel_{get,release}_load_detect_pipe() into the callers (intel_{crt,tv}_detect()). Only the actual locking and backoff handling is left in intel_get_load_detect_pipe(). And in intel_enable_pipe_a() we just share the mode_config.acquire_ctx from drm_modeset_lock_all() which is already holding all the relevant locks. It's perfectly legal to lock the same ww_mutex multiple times using the same ww_acquire_ctx. drm_modeset_lock() will convert the returned -EALREADY into 0, so the caller doesn't need to do antyhing special. Fixes a hang on resume on my 830. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | Revert "drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe"Alex Deucher2014-08-191-3/+1
| | | | | | | | | | | | | | | | | | This reverts commit 1490434f0da63afc6006411c8829c6a7935a4e7e. Several people have reported regressions with this patch on kabini.
| * | drm/radeon: fix active_cu mask on SI and CIK after re-init (v3)Alex Deucher2014-08-192-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to initialize the mask to 0 on init, otherwise it keeps increasing. bug: https://bugzilla.kernel.org/show_bug.cgi?id=82581 v2: also fix cu count v3: split count fix into separate patch Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: fix active cu count for SI and CIKAlex Deucher2014-08-192-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the CU count reported to userspace for OpenCL. bug: https://bugzilla.kernel.org/show_bug.cgi?id=82581 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: re-enable selective GPUVM flushingAlex Deucher2014-08-191-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Now that the PFP and ME synchronization is fixed, we can enable this again reliably. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com>
| * | drm/radeon: Sync ME and PFP after CP semaphore waits v4Christian König2014-08-193-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes lockups due to CP read GPUVM faults when running piglit on Cape Verde. v2 (chk): apply the fix to R600+ as well, on CIK only the GFX CP has a PFP, add more comments to R600 code, enable flushing again v3: (agd5f): only apply to 7xx+. r6xx does not have the packet. v4: (agd5f): split flush change into a separate patch, fix formatting Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com>
| * | drm/radeon: fix display handling in radeon_gpu_resetAlex Deucher2014-08-191-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | If the display hw was reset or a hard reset was used, we need to re-init some of the common display hardware as well. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: fix pm handling in radeon_gpu_resetAlex Deucher2014-08-191-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pm_suspend is handled in the radeon_suspend callbacks. pm_resume has special handling depending on whether dpm or legacy pm is enabled. Change radeon_gpu_reset to mirror the behavior in the suspend and resume pathes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: Only flush HDP cache for indirect buffers from userspaceMichel Dänzer2014-08-1825-66/+73
| | | | | | | | | | | | | | | | | | | | | | | | It isn't necessary for command streams generated by the kernel (at least not while we aren't storing ring or indirect buffers in VRAM). Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: properly document reloc priority maskChristian König2014-08-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of hard coding the value properly document that this is an userspace interface. No intended functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | Merge branch 'drm-fixes-3.17' of git://people.freedesktop.org/~agd5f/linuxDave Airlie2014-08-1810-31/+50
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | radeon fixes for 3.17, kind of all over the place (dpm, GPUVM, etc.) * 'drm-fixes-3.17' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: Remove duplicate include from Makefile drm/radeon/dpm: select the appropriate vce power state for KV/KB/ML drm/radeon: Add ability to get and change dpm state when radeon PX card is turned off drm/radeon: Add missing lines to ci_set_thermal_temperature_range drm/radeon: Always flush VM again on < CIK drm/radeon: add a check for allocation failure (v2) drm/radeon: use pfp for all vm_flush related updates drm/radeon: add bapm module parameter
| | * drm/radeon: Remove duplicate include from MakefileAndreas Ruprecht2014-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the Makefile, radeon_uvd.o is added to radeon-y twice. As it belongs to the UVD block marked with a comment, the other include from the block of includes labelled as "KMS driver" is deleted. Signed-off-by: Andreas Ruprecht <rupran@einserver.de> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon/dpm: select the appropriate vce power state for KV/KB/MLAlex Deucher2014-08-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Compare the clock in the limits table to the requested evclk rather than just taking the first value. Improves vce performance in certain cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-23 00:10:07 +0100