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* net: txgbe: Add build support for txgbeJiawen Wu2022-06-308-0/+295
| | | | | | | | | Add doc build infrastructure for txgbe driver. Initialize PCI memory space for WangXun 10 Gigabit Ethernet devices. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com> Link: https://lore.kernel.org/r/20220628095530.889344-1-jiawenwu@trustnetic.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: dsa: microchip: count pause packets together will all other packetsOleksij Rempel2022-06-301-2/+4
| | | | | | | | | | | | This switch is calculating tx/rx_bytes for all packets including pause. So, include rx/tx_pause counter to rx/tx_packets to make tx/rx_bytes fit to rx/tx_packets. Link: https://lore.kernel.org/all/20220624220317.ckhx6z7cmzegvoqi@skbuf/ Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: dsa: microchip: add pause stats supportOleksij Rempel2022-06-302-0/+20
| | | | | | | | | | | Add support for pause specific stats. Tested on ksz9477. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: dsa: ar9331: add support for pause statsOleksij Rempel2022-06-301-0/+17
| | | | | | | | | Add support for pause stats. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: prestera: acl: add support for 'egress' rulesMaksym Glubokiy2022-06-297-34/+82
| | | | | | | | | | The following is now supported: $ tc qdisc add PORT clsact $ tc filter add dev PORT egress ... Signed-off-by: Maksym Glubokiy <maksym.glubokiy@plvision.eu> Signed-off-by: David S. Miller <davem@davemloft.net>
* nfp: flower: fix comment typos and formattingWalter Heymans2022-06-297-17/+17
| | | | | | | | | | | A number of spelling and language mistakes in the flower section are fixed. The spacing between the text inside some comments and the comment symbols are also updated for consistency. Signed-off-by: Walter Heymans <walter.heymans@corigine.com> Reviewed-by: Louis Peens <louis.peens@corigine.com> Signed-off-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: microchip: move remaining register offset to ksz_chip_regArun Ramadoss2022-06-292-42/+18
| | | | | | | | This patch moves the broadcast ctrl, multicast ctrl and start control registers from ksz_chip_dat to ksz_chip_reg. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: microchip: add P_STP_CTRL to ksz_chip_regArun Ramadoss2022-06-296-29/+35
| | | | | | | | This patch moves the stp_ctrl_reg from the ksz_chip_data to ksz_chip_reg structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: microchip: change the size of reg from u8 to u16Arun Ramadoss2022-06-293-14/+14
| | | | | | | | | The register size for the ksz8 switches is u8 and for ksz9477 series is u16. To have common struct for ksz series switches the size of reg is increased from u8 to u16. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: microchip: remove the struct ksz8Arun Ramadoss2022-06-293-27/+4
| | | | | | | | | This patch removes the struct ksz8 from ksz8.h which is no longer needed. The platform bus specific details are now deferenced through dev->priv. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: microchip: move ksz8->shifts to ksz_commonArun Ramadoss2022-06-294-56/+46
| | | | | | | | This patch moves ksz8->shifts from ksz8795.c to ksz_common.c. The shifts are dereferenced using dev->info->shifts. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: microchip: move ksz8->masks to ksz_commonArun Ramadoss2022-06-295-86/+81
| | | | | | | | This patch moves the ksz8->masks from ksz8795.c to ksz_common.c. The mask will be dereferenced using dev->info->masks. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: microchip: move ksz8->regs to ksz_commonArun Ramadoss2022-06-295-73/+79
| | | | | | | | This patch moves the ksz8->regs from ksz8795.c to the ksz_common.c. And the regs is dereferrenced using dev->info->regs. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: enable half duplex hardware supportBiao Huang2022-06-291-18/+12
| | | | | | | | | Current driver doesn't support half duplex correctly. This patch enable half duplex capability in hardware. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: separate tx/rx handling with two NAPIsBiao Huang2022-06-291-141/+199
| | | | | | | | | | | | Current driver may lost tx interrupts under bidirectional test with iperf3, which leads to some unexpected issues. This patch let rx/tx interrupt enable/disable separately, and rx/tx are handled in different NAPIs. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: add support for MII interfaceBiao Huang2022-06-291-1/+11
| | | | | | | | | Add support for MII interface. If user wants to use MII, assign "MII" to "phy-mode" property in dts. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: add timing adjustment supportBiao Huang2022-06-291-0/+33
| | | | | | | | | | Add simple clock inversion for timing adjustment in driver. Add property "mediatek,txc-inverse" or "mediatek,rxc-inverse" to device node when necessary. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: add clock pad selection for RMIIBiao Huang2022-06-291-2/+17
| | | | | | | | | | | | | This patch add a new dts property named "mediatek,rmii-rxc" parsing in driver, which will configure MAC to select which pin the RMII reference clock is connected to, TXC or RXC. TXC pad is the default reference clock pin. If user wants to use RXC pad instead, add "mediatek,rmii-rxc" to corresponding device node. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: add support for MT8365 SoCBiao Huang2022-06-291-11/+64
| | | | | | | | | Add Ethernet driver support for MT8365 SoC. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com> Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: modify IRQ trigger flagsBiao Huang2022-06-291-1/+1
| | | | | | | | | | | If the flags in request_irq() is IRQF_TRIGGER_NONE, the trigger method is determined by "interrupt" property in dts. So, modify the flag from IRQF_TRIGGER_FALLING to IRQF_TRIGGER_NONE. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com> Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: mtk-star-emac: store bit_clk_div in compat structureBiao Huang2022-06-291-4/+19
| | | | | | | | | Not all the SoC are using the same clock divider. Move the divider into a compat structure specific to the SoCs. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Separate netdev probe/remove from PCI probe/removeJonathan Cooper2022-06-298-148/+183
| | | | | | | | | | | | | The netdev probe will be used when moving from vDPA to EF100 BAR config. The netdev remove will be used when moving from EF100 to vDPA BAR config. In the process, change several log messages to pci_ instead of netif_ to remove the "(unregistered net_device)" text. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Co-developed-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: replace function name in string with __func__Jonathan Cooper2022-06-291-1/+2
| | | | | | | | Minor fix to existing code to make later patch checkpatch clean. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Acked-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Unsplit literal string.Jonathan Cooper2022-06-291-2/+2
| | | | | | | | Minor fix to existing code to later patch checkpatch clean. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Acked-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Move EF100 efx_nic_type structs to the end of the fileJonathan Cooper2022-06-291-172/+172
| | | | | | | | | This avoids a forward declaration in a subsequent patch. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Co-developed-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Separate efx_nic memory from net_device memoryJonathan Cooper2022-06-294-9/+46
| | | | | | | | | As we have a lot of common code this applies to all NIC architectures. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Co-developed-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Encapsulate access to netdev_priv()Jonathan Cooper2022-06-2913-73/+78
| | | | | | | | | | | | | Once we separate struct efx_nic memory from net_device memory the existing usage will have to change. Apart from the new function efx_netdev_priv() accesses have been changed using: sed -i 's/netdev_priv/efx_netdev_priv/' Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Co-developed-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Change BUG_ON to WARN_ON and recovery code.Jonathan Cooper2022-06-291-1/+2
| | | | | | | | | Pre-emptively fix a checkpatch warning in a subsequent patch. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Co-developed-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Remove netdev init from efx_init_structJonathan Cooper2022-06-294-8/+7
| | | | | | | | | | | Move functionality involving the struct net_device out of efx_init_struct so that we can initialise without a net dev for VDPA operation. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Co-developed-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Add a PROBED state for EF100 VDPA use.Jonathan Cooper2022-06-294-8/+12
| | | | | | | | | | | | For VDPA we need to tear down the driver to the point where it has various control channels like MCDI, but it no longer has a network device. This adds a state corresponding to that mode that will be used when VDPA support is added. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Co-developed-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* sfc: Split STATE_READY in to STATE_NET_DOWN and STATE_NET_UP.Jonathan Cooper2022-06-296-31/+72
| | | | | | | | | | | | | This patch splits the READY state in to NET_UP and NET_DOWN. This is to prepare for future work to delay resource allocation until interface up so that we can use resources more efficiently in SRIOV environments, and also to lay the ground work for an extra PROBED state where we don't create a network interface, for VDPA operation. Signed-off-by: Jonathan Cooper <jonathan.s.cooper@amd.com> Acked-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Convert MDB code to use PGT APIsAmit Cohen2022-06-291-304/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous patches added common APIs for maintaining PGT (Port Group Table) table. In the legacy model, software did not interact with this table directly. Instead, it was accessed by firmware in response to registers such as SFTR and SMID. In the new model, software has full control over the PGT table using the SMID register. The configuration of MDB entries is already done via SMID, so the new PGT APIs can be used also using the legacy model, the only difference is that MID index should be aligned to bridge model. See a previous patch which added API for that. The main changes are: - MDB code does not maintain bitmap of ports in MDB entry anymore, instead, it stores a list of ports with additional information. - MDB code does not configure SMID register directly anymore, it will be done via PGT API when port is first added or removed. - Today MDB code does not update SMID when port is added/removed while multicast is disabled. Instead, it maintains bitmap of ports and once multicast is enabled, it rewrite the entry to hardware. Using PGT APIs, the entry will be updated also when multicast is disabled, but the mapping between {MAC, FID}->{MID} will not appear in SFD register. It means that SMID will be updated all the time and disable/enable multicast will impact only SFD configuration. - For multicast router, today only SMID is updated and the bitmap is not updated. Using the new list of ports, there is a reference count for each port, so it can be saved in software also. For such port, 'struct mlxsw_sp_mdb_entry.ports_count' will not be updated and the port in the list will be marked as 'mrouter'. - Finally, `struct mlxsw_sp_mid.in_hw` is not needed anymore. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Flush port from MDB entries according to FID indexAmit Cohen2022-06-291-6/+11
| | | | | | | | | | | | | | | | Currently, flushing port from all MDB entries is done when the last VLAN is removed. This behavior is inaccurate, as port can be removed while there is another port which uses the same VLAN, in such case, this is not the last port which uses this VLAN and removed, but this port is supposed to be removed from the MDB entries. Flush the port from MDB when it is removed, regardless the state of other ports. Flush only the MDB entries which are relevant for the same FID index. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Add support for getting and putting MDB entryAmit Cohen2022-06-291-2/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | A previous patch added support for init() and fini() for MDB entries. MDB entry can be updated, ports can be added and removed from the entry. Add get() and put() functions, the first one checks if the entry already exists and otherwise initializes the entry. The second removes the entry just in case that there are no more ports in this entry. Use the list of the ports which was added in a previous patch. When the list contains only one port which is not multicast router, and this port is removed, the MDB entry can be removed. Use 'struct mlxsw_sp_mdb_entry.ports_count' to know how many ports use the entry, regardless the use of multicast router ports. When mlxsw_sp_mc_mdb_entry_put() is called with specific port which supposed to be removed, check if the removal will cause a deletion of the entry. If this is the case, call mlxsw_sp_mc_mdb_entry_fini() which first deletes the MDB entry and then releases the PGT entry, to avoid a temporary situation in which the MDB entry points to an empty PGT entry, as otherwise packets will be temporarily dropped instead of being flooded. The new functions will be used in the next patches. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Implement mlxsw_sp_mc_mdb_entry_{init, fini}()Amit Cohen2022-06-291-2/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The next patches will convert MDB code to use PGT APIs. The change will move the responsibility of allocating MID indexes and writing PGT configurations to hardware to PGT code. As part of this change, most of the MDB code will be changed and improved. As a preparation for the above mentioned change, implement mlxsw_sp_mc_mdb_entry_{init, fini}(). Currently, there is a function __mlxsw_sp_mc_alloc(), which does not only allocate MID. In addition, there is no an equivalent function to free the MID. When mlxsw_sp_port_remove_from_mid() removes the last port, it handles MID removal. Instead, add init() and fini() functions, which use PGT APIs. The differences between the existing and the new functions are as follows: 1. Today MDB code does not update SMID when port is added/removed while multicast is disabled. It maintains a bitmap of ports and once multicast is enabled, it writes the entry to hardware. Instead, using PGT APIs, the entry will be updated also when multicast is disabled, but the mapping between {MAC, FID}->{MID} (is configured using SFD) will be updated according to multicast state. It means that SMID will be updated all the time and disable/enable multicast will impact only SFD configuration. 2. Today the allocation of MID index is done as part of mlxsw_sp_mc_write_mdb_entry(). The fact that the entry will be written in hardware all the time, moves the allocation of the index to be as part of the MDB entry initialization. PGT API is used for the allocation. 3. Today the update of multicast router ports is done as part of mlxsw_sp_mc_write_mdb_entry(). Instead, add functions to add/remove all multicast router ports when entry is first added or removed. When new multicast router port will be added/removed, the dedicated API will be used to add/remove it from the existing entries. 4. A list of ports will be stored per MDB entry instead of the exiting bitmap. The list will contain the multicast router ports and maintain reference counter per port. Add mlxsw_sp_mdb_entry_write() which is almost identical to mlxsw_sp_port_mdb_op(). Use more clear name and align the MID index to bridge model using PGT API. The existing function will be removed in the next patches. Note that PGT APIs configure the firmware using SMID register, like the driver already does today for MDB entries, so PGT APIs can be used also using legacy bridge model. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Add support for maintaining list of ports per MDB ↵Amit Cohen2022-06-291-0/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | entry As part of converting MDB code to use PGT APIs, PGT code stores which ports are mapped to each PGT entry. PGT code is not aware of the type of the port (multicast router or not), as it is not relevant there. To be able to release an MDB entry when the there are no ports which are not multicast routers, the entry should be aware of the state of its ports. Add support for maintaining list of ports per MDB entry. Each port will hold a reference count as multiple MDB entries can use the same hardware MDB entry. It occurs because MDB entries in the Linux bridge are keyed according to their multicast IP, when these entries are notified to device drivers via switchdev, the multicast IP is converted to a multicast MAC. This conversion might cause collisions, for example, ff0e::1 and ff0e:1234::1 are both mapped to the multicast MAC 33:33:00:00:00:01. Multicast router port will take a reference once, and will be marked as 'mrouter', then when port in the list is multicast router and its reference value is one, it means that the entry can be removed in case that there are no other ports which are not multicast routers. For that, maintain a counter per MDB entry to count ports in the list, which were added to the multicast group, and not because they are multicast routers. When this counter is zero, the entry can be removed. Add mlxsw_sp_mdb_entry_port_{get,put}() for regular ports and mlxsw_sp_mdb_entry_mrouter_port_{get,put}() for multicast router ports. Call PGT API to add or remove port from PGT entry when port is first added or removed, according to the reference counting. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Add support for maintaining hash table of MDB entriesAmit Cohen2022-06-291-0/+15
| | | | | | | | | | | | | | | Currently MDB entries are stored in a list as part of 'struct mlxsw_sp_bridge_device'. Storing them in a hash table in addition to the list will allow finding a specific entry more efficiently. Add support for the required hash table, the next patches will insert and remove MDB entries from the table. The existing code which adds and removes entries will be removed and replaced by new code in the next patches, so there is no point to adjust the existing code. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Save MAC and FID as a key in 'struct ↵Amit Cohen2022-06-291-10/+14
| | | | | | | | | | | | | mlxsw_sp_mdb_entry' The next patch will add support for storing all the MDB entries in a hash table. As a preparation, save the MAC address and the FID in a separate structure. This structure will be used later as a key for the hash table. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Rename MIDs listAmit Cohen2022-06-291-10/+11
| | | | | | | | | | | | | | | Currently, the list which stores the MDB entries for a given bridge instance is called 'mids_list'. This name is not accurate as a MID entry stores a bitmap of ports to which a packet needs to be replicated and a MDB entry stores the mapping from {MAC, FID} to PGT index (MID) Rename it to 'mdb_list'. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: spectrum_switchdev: Rename MID structureAmit Cohen2022-06-292-91/+97
| | | | | | | | | | | | | | | | Currently the structure which represents MDB entry is called 'struct mlxsw_sp_mid'. This name is not accurate as a MID entry stores a bitmap of ports to which a packet needs to be replicated and a MDB entry stores the mapping from {MAC, FID} to PGT index (MID). Rename the structure to 'struct mlxsw_sp_mdb_entry'. The structure 'mlxsw_sp_mid' is defined as part of spectrum.h. The only file which uses it is spectrum_switchdev.c, so there is no reason to expose it to other files. Move the definition to spectrum_switchdev.c. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mlxsw: Align PGT index to legacy bridge modelAmit Cohen2022-06-292-3/+14
| | | | | | | | | | | | | | | | | | | | | | | FID code reserves about 15K entries in PGT table for flooding. These entries are just allocated and are not used yet because the code that uses them is skipped now. The next patches will convert MDB code to use PGT APIs. The allocation of indexes for multicast is done after FID code reserves 15K entries. Currently, legacy bridge model is used and firmware manages PGT table. That means that the indexes which are allocated using PGT API are too high when legacy bridge model is used. To not exceed firmware limitation for MDB entries, add an API that returns the correct 'mid_index', based on bridge model. For legacy model, subtract the number of flood entries from PGT index. Use it to write the correct MID to SMID register. This API will be used also from MDB code in the next patches. PGT should not be aware of MDB and FID different usage, this API is temporary and will be removed once unified bridge model will be used. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phylink: disable PCS polling over major configurationRussell King (Oracle)2022-06-291-10/+20
| | | | | | | | | | | While we are performing a major configuration, there is no point having the PCS polling timer running. Stop it before we begin preparing for the configuration change, and restart it only once we've successfully completed the change. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: phylink: remove pcs_ops memberRussell King (Oracle)2022-06-291-20/+19
| | | | | | | | | Remove the pcs_ops member from struct phylink, using the one stored in struct phylink_pcs instead. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net/funeth: Support for ethtool -mDimitris Michailidis2022-06-292-0/+74
| | | | | | | | | Add the FW command for reading port module memory pages and implement ethtool's get_module_eeprom_by_page operation. Signed-off-by: Dimitris Michailidis <dmichail@fungible.com> Link: https://lore.kernel.org/r/20220627182000.8198-1-dmichail@fungible.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* mlxsw: spectrum_fid: Configure flooding entries using PGT APIsAmit Cohen2022-06-281-6/+59
| | | | | | | | | | | | | | | | | | | | | | The PGT (Port Group Table) table maps an index to a bitmap of local ports to which a packet needs to be replicated. This table is used for layer 2 multicast and flooding. In the legacy model, software did not interact with PGT table directly. Instead, it was accessed by firmware in response to registers such as SFTR and SMID. In the new model, the SFTR register is deprecated and software has full control over the PGT table using the SMID register. Use the new PGT APIs to allocate entries for flooding as part of flood tables initialization. Add mlxsw_sp_fid_flood_tables_fini() to free the allocated indexes. In addition, use PGT APIs to add/remove ports from PGT table. The existing code which configures the flood entries via SFTR2 will be removed later. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* mlxsw: spectrum_fid: Set 'mid_base' as part of flood tables initializationAmit Cohen2022-06-282-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PGT (Port Group Table) table maps an index to a bitmap of local ports to which a packet needs to be replicated. This table is used for layer 2 multicast and flooding. The index to PGT table which is called 'mid_index', is a result of 'mid_base' + 'fid_offset'. Using the legacy bridge model, firmware configures 'mid_base'. However, using the new model, software is responsible to configure it via SFGC register. The first 15K entries will be used for flooding and the rest for multicast. The table will look as follows: +----------------------------+ | | | 802.1q, unicast flooding | 4K entries | | +----------------------------+ | | | 802.1q, multicast flooding | 4K entries | | +----------------------------+ | | | 802.1q, broadcast flooding | 4K entries | | +----------------------------+ | 802.1d, unicast flooding | 1K entries +----------------------------+ | 802.1d, multicast flooding | 1K entries +----------------------------+ | 802.1d, broadcast flooding | 1K entries +----------------------------+ | | | | | Multicast entries | The rest of the table | | | | +----------------------------+ Add 'pgt_base' to 'struct mlxsw_sp_fid_family' and use it to calculate MID base, set 'SFGC.mid_base' as part of flood tables initialization. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* mlxsw: spectrum: Initialize PGT tableAmit Cohen2022-06-281-0/+9
| | | | | | | | | | | Initialize PGT table as part of mlxsw_sp_init(). This table will be used first in the next patch by FID code to set flooding entries, and later by MDB code to add multicast entries. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* mlxsw: Extend PGT APIs to support maintaining list of ports per entryAmit Cohen2022-06-282-0/+231
| | | | | | | | | | | | | Add an API to associate a PGT entry with SMPE index and add or remove a port. This API will be used by FID code and MDB code, to add/remove port from specific PGT entry. When the first port is added to PGT entry, allocate the entry in the given MID index, when the last port is removed from PGT entry, free it. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* mlxsw: Add a dedicated structure for bitmap of portsAmit Cohen2022-06-282-19/+43
| | | | | | | | | | | | | | | Currently when bitmap of ports is needed, 'unsigned long *' type is used. The functions which use the bitmap assume its length according to its name, i.e., each function which gets a bitmap of ports queries the maximum number of ports and uses it as the size. As preparation for the next patch which will use bitmap of ports, add a dedicated structure for it. Refactor the existing code to use the new structure. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* mlxsw: Add an indication of SMPE index validity for PGT tableAmit Cohen2022-06-283-0/+7
| | | | | | | | | | | | | | | | | | | | In Spectrum-1, the index into the MPE table - called switch multicast to port egress VID (SMPE) - is derived from the PGT entry, whereas in Spectrum-2 and later ASICs it is derived from the FID. Therefore, in Spectrum-1, the SMPE index needs to be programmed as part of the PGT entry via SMID register, while it is reserved for Spectrum-2 and later ASICs. Add 'pgt_smpe_index_valid' boolean as part of 'struct mlxsw_sp' and set it to true for Spectrum-1 and to false for the later ASICs. Add 'smpe_index_valid' as part of 'struct mlxsw_sp_pgt' and set it according to the value in 'struct mlxsw_sp' as part of PGT initialization. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 18:07:45 +0100