| Commit message (Expand) | Author | Age | Files | Lines |
* | drm/i915/skl: init/uninit display core as part of the HW power domain state | Imre Deak | 2015-11-17 | 5 | -21/+61 |
* | drm/i915: rename intel_power_domains_resume to *_sync_hw | Imre Deak | 2015-11-17 | 1 | -2/+2 |
* | drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences | Damien Lespiau | 2015-11-17 | 4 | -4/+35 |
* | drm/i915: fix lookup_power_well for power wells without any domain | Imre Deak | 2015-11-17 | 1 | -2/+4 |
* | drm/i915: fix the power well ID for always on wells | Imre Deak | 2015-11-17 | 2 | -1/+5 |
* | drm/i915: get runtime PM reference around GEM set_tiling IOCTL | Imre Deak | 2015-11-17 | 1 | -0/+4 |
* | drm/i915: Serialise updates to GGTT with access through GGTT on Braswell | Chris Wilson | 2015-11-17 | 2 | -0/+25 |
* | drm/i915: force link training when requested by Sink | Shubhangi Shrivastava | 2015-11-17 | 1 | -1/+3 |
* | drm/i915: Cleanup test data during long/short hotplug | Shubhangi Shrivastava | 2015-11-17 | 1 | -8/+22 |
* | drm/i915/skl: Correct other-pipe watermark update condition check (v2) | Kumar, Mahesh | 2015-11-17 | 1 | -7/+5 |
* | drm/i915: Model PSR AUX register selection more like the normal AUX code | Ville Syrjälä | 2015-11-16 | 1 | -6/+21 |
* | drm/i915: Add dev_priv->psr_mmio_base | Ville Syrjälä | 2015-11-16 | 4 | -21/+27 |
* | drm/i915: Store aux data reg offsets in intel_dp->aux_ch_data_reg[] | Ville Syrjälä | 2015-11-16 | 2 | -10/+85 |
* | drm/i915: Remove the magic AUX_CTL is at DP + foo tricks | Ville Syrjälä | 2015-11-16 | 2 | -76/+105 |
* | drm/i915: Parametrize AUX registers | Ville Syrjälä | 2015-11-16 | 3 | -63/+62 |
* | drm/i915: Replace the aux ddc name switch statement with kasprintf() | Ville Syrjälä | 2015-11-16 | 1 | -29/+46 |
* | drm/i915: Replace aux_ch_ctl_reg check with port check | Ville Syrjälä | 2015-11-16 | 1 | -1/+1 |
* | drm/i915/skl: Update DDI translation tables for SKL | jim.bride@linux.intel.com | 2015-11-13 | 1 | -11/+11 |
* | drm/i915: Fix SKL i_boost level | Ander Conselvan de Oliveira | 2015-11-13 | 1 | -3/+3 |
* | drm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6 | Animesh Manna | 2015-11-12 | 1 | -1/+0 |
* | drm/i915/gen9: flush DMC fw loading work during system suspend | Imre Deak | 2015-11-12 | 1 | -0/+3 |
* | drm/i915/gen9: Use flush_work to synchronize with dmc loader | Animesh Manna | 2015-11-12 | 2 | -2/+2 |
* | drm/i915: Use request_firmware and our own async work | Daniel Vetter | 2015-11-12 | 2 | -13/+14 |
* | drm/i915/gen9: extract parse_csr_fw | Daniel Vetter | 2015-11-12 | 1 | -19/+31 |
* | drm/i915/gen9: Use dev_priv in csr functions | Daniel Vetter | 2015-11-12 | 4 | -24/+18 |
* | drm/i915/gen9: Don't try to load garbage dmc firmware on resume | Daniel Vetter | 2015-11-12 | 1 | -1/+1 |
* | drm/i915/gen9: Simplify csr loading failure printing. | Daniel Vetter | 2015-11-12 | 3 | -23/+4 |
* | drm/i915/gen9: Align line continuations in intel_csr.c. | Daniel Vetter | 2015-11-12 | 1 | -15/+15 |
* | drm/i915/gen9: Remove csr.state, csr_lock and related code. | Daniel Vetter | 2015-11-12 | 6 | -83/+5 |
* | drm/i915/gen9: move assert_csr_loaded into intel_rpm.c | Daniel Vetter | 2015-11-12 | 3 | -11/+8 |
* | drm/i915: use correct power domain for csr loading | Daniel Vetter | 2015-11-12 | 1 | -2/+2 |
* | drm/i915/gen9: csr_init after runtime pm enable | Animesh Manna | 2015-11-12 | 1 | -3/+2 |
* | drm/i915: refactor stepping info retrieval | Jani Nikula | 2015-11-12 | 1 | -23/+23 |
* | drm/i915: constify bxt stepping info | Jani Nikula | 2015-11-12 | 1 | -1/+1 |
* | drm/i915: fix indentation on skl stepping info | Jani Nikula | 2015-11-12 | 1 | -3/+3 |
* | drm/i915: Remove redundant check in i915_gem_obj_to_vma | Tvrtko Ursulin | 2015-11-12 | 1 | -4/+2 |
* | drm/i915: Clean up LVDS register handling harder | Lukas Wunner | 2015-11-11 | 1 | -2/+1 |
* | drm/i915: Move the fbdev async_schedule() into intel_fbdev.c | Ville Syrjälä | 2015-11-11 | 3 | -5/+9 |
* | drm/i915: Do fbdev fini first during unload | Ville Syrjälä | 2015-11-11 | 1 | -2/+2 |
* | drm/i915: Kill intel_runtime_pm_disable() | Ville Syrjälä | 2015-11-11 | 1 | -17/+0 |
* | drm/i915: Setup DDI clk for MST on SKL | Ville Syrjälä | 2015-11-10 | 3 | -27/+32 |
* | drm/i915: Configure eDP PLL freq from ironlake_edp_pll_on() | Ville Syrjälä | 2015-11-10 | 1 | -26/+19 |
* | drm/i915: Use intel_dp->DP in eDP PLL setup | Ville Syrjälä | 2015-11-10 | 1 | -27/+14 |
* | drm/i915: Clean up eDP PLL state asserts | Ville Syrjälä | 2015-11-10 | 1 | -15/+39 |
* | drm/i915: Remove ILK-A eDP PLL workaround notes | Ville Syrjälä | 2015-11-10 | 1 | -4/+0 |
* | drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/ | Ville Syrjälä | 2015-11-10 | 2 | -6/+6 |
* | drm/i915: Hide underruns from eDP PLL and port enable on ILK | Ville Syrjälä | 2015-11-10 | 1 | -3/+31 |
* | drm/i915: Disable FIFO underrun reporting around IBX transcoder B workaround | Ville Syrjälä | 2015-11-10 | 4 | -0/+42 |
* | drm/i915: Check for CPT and not !IBX in ironlake_disable_pch_transcoder() | Ville Syrjälä | 2015-11-10 | 1 | -1/+1 |
* | drm/i915: Check for FIFO underruns after modeset on IVB/HSW and CPT/PPT | Ville Syrjälä | 2015-11-10 | 3 | -31/+103 |