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*-----. Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' in...Stephen Boyd2022-03-2951-1488/+598
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| | | | * clk: zynq: Update the parameters to zynq_clk_register_periph_clkShubhrajyoti Datta2022-03-291-6/+6
| | | | * clk: zynq: trivial warning fixShubhrajyoti Datta2022-03-291-0/+1
| | | | * clk: qcom: sm6125-gcc: fix typos in commentsJulia Lawall2022-03-151-1/+1
| | | | * clk: ti: clkctrl: fix typos in commentsJulia Lawall2022-03-151-1/+1
| | | | * clk: COMMON_CLK_LAN966X should depend on SOC_LAN966Geert Uytterhoeven2022-03-121-0/+1
| | | | * clk: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)2022-03-121-5/+1
| | | | * clk: bcm2835: Remove unused variableMaxime Ripard2022-03-121-2/+0
| | | | * clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driverMiaoqian Lin2022-03-121-0/+1
| | | | * clk: cleanup commentsTom Rix2022-03-129-9/+9
| | | | * clk: socfpga: cleanup spdx tagsTom Rix2022-03-123-3/+3
| | | * | clk: actions: Make sentinel elements more obviousJonathan Neuschäfer2022-03-123-29/+31
| | | * | clk: clps711x: Terminate clk_div_table with sentinel elementJonathan Neuschäfer2022-03-121-0/+2
| | | * | clk: hisilicon: Terminate clk_div_table with sentinel elementJonathan Neuschäfer2022-03-121-2/+2
| | | * | clk: loongson1: Terminate clk_div_table with sentinel elementJonathan Neuschäfer2022-03-121-0/+1
| | | * | clk: actions: Terminate clk_div_table with sentinel elementJonathan Neuschäfer2022-03-122-1/+2
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| | * | clk: ti: Drop legacy compatibility clocks for dra7Tony Lindgren2022-03-154-832/+5
| | * | clk: ti: Drop legacy compatibility clocks for am4Tony Lindgren2022-03-155-246/+6
| | * | clk: ti: Drop legacy compatibility clocks for am3Tony Lindgren2022-03-154-230/+4
| | * | Merge tag 'v5.17-rc4' into clk-tiStephen Boyd2022-03-15413-1865/+4533
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| | * | | clk: ti: Update component clocks to use ti_dt_clk_name()Tony Lindgren2022-03-118-11/+23
| | * | | clk: ti: Update pll and clockdomain clocks to use ti_dt_clk_name()Tony Lindgren2022-03-114-12/+22
| | * | | clk: ti: Add ti_dt_clk_name() helper to use clock-output-namesTony Lindgren2022-03-112-1/+20
| | * | | clk: ti: Use clock-output-names for clkctrlTony Lindgren2022-03-111-2/+20
| | * | | clk: ti: Add ti_find_clock_provider() to use clock-output-namesTony Lindgren2022-03-111-2/+41
| | * | | clk: ti: Optionally parse IO address from parent clock nodeTony Lindgren2022-03-111-2/+8
| | * | | clk: ti: Preserve node in ti_dt_clocks_register()Tony Lindgren2022-03-111-5/+8
| | * | | clk: ti: Constify clkctrl_nameTony Lindgren2022-03-111-1/+1
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| * | | clk: starfive: Add JH7100 audio clock driverEmil Renner Berthing2022-03-113-0/+179
| * | | clk: starfive: jh7100: Support more clock typesEmil Renner Berthing2022-03-112-0/+41
| * | | clk: starfive: jh7100: Make hw clock implementation reusableEmil Renner Berthing2022-03-112-89/+104
| * | | clk: starfive: jh7100: Handle audio_div clock properlyEmil Renner Berthing2022-03-111-1/+67
| * | | clk: starfive: jh7100: Don't round divisor up twiceEmil Renner Berthing2022-03-111-11/+3
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*-----. \ \ Merge branches 'clk-mvebu', 'clk-const', 'clk-imx' and 'clk-rockchip' into cl...Stephen Boyd2022-03-2927-221/+1320
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| | | | * | | clk: rockchip: re-add rational best approximation algorithm to the fractional...Quentin Schulz2022-02-241-0/+3
| | | | * | | clk/rockchip: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)2022-02-231-4/+2
| | | | * | | clk: rockchip: Add CLK_SET_RATE_PARENT to the HDMI reference clock on rk3568Sascha Hauer2022-02-081-1/+1
| | | | * | | clk: rockchip: drop CLK_SET_RATE_PARENT from dclk_vop* on rk3568Sascha Hauer2022-02-081-3/+3
| | | | * | | clk: rockchip: Add more PLL rates for rk3568Sascha Hauer2022-02-081-0/+6
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| | | * | | clk: imx: Select MXC_CLK for i.MX93 clock driverAbel Vesa2022-03-151-0/+1
| | | * | | clk: imx: remove redundant re-assignment of pll->baseColin Ian King2022-03-091-1/+0
| | | * | | clk: imx: pll14xx: Support dynamic ratesSascha Hauer2022-03-041-17/+126
| | | * | | clk: imx: pll14xx: Add pr_fmtSascha Hauer2022-03-041-6/+6
| | | * | | clk: imx: pll14xx: explicitly return lowest rateSascha Hauer2022-03-041-2/+2
| | | * | | clk: imx: pll14xx: name variables after usageSascha Hauer2022-03-041-21/+21
| | | * | | clk: imx: pll14xx: consolidate rate calculationSascha Hauer2022-03-041-33/+26
| | | * | | clk: imx: pll14xx: Use FIELD_GET/FIELD_PREPSascha Hauer2022-03-041-21/+19
| | | * | | clk: imx: pll14xx: Drop wrong shiftingSascha Hauer2022-03-041-2/+2
| | | * | | clk: imx: pll14xx: Use register defines consistentlySascha Hauer2022-03-041-24/+25
| | | * | | clk: imx8mp: remove SYS PLL 1/2 clock gatesPeng Fan2022-03-041-32/+16
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-22 00:33:45 +0100