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* Merge tag 'dmaengine-6.0-rc1' of ↵Linus Torvalds2022-08-0532-216/+1035
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "New support / Core: - Remove DMA_MEMCPY_SG for lack of users - Tegra 234 dmaengine support - Mediatek MT8365 dma support - Apple ADMAC driver Updates: - Yaml conversion for ST-Ericsson DMA40 binding and Freescale edma - rz-dmac updates and device_synchronize support - Bunch of typo in comments fixes in drivers - multithread support in sf-pdma driver" * tag 'dmaengine-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (50 commits) dmaengine: mediatek: mtk-hsdma: Fix typo 'the the' in comment dmaengine: axi-dmac: check cache coherency register dmaengine: sh: rz-dmac: Add device_synchronize callback dmaengine: sprd: Cleanup in .remove() after pm_runtime_get_sync() failed dmaengine: tegra: Add terminate() for Tegra234 dt-bindings: dmaengine: Add compatible for Tegra234 dmaengine: xilinx: use strscpy to replace strlcpy dmaengine: imx-sdma: Add FIFO stride support for multi FIFO script dmaengine: idxd: Correct IAX operation code names dmaengine: imx-dma: Cast of_device_get_match_data() with (uintptr_t) dmaengine: dw-axi-dmac: ignore interrupt if no descriptor dmaengine: dw-axi-dmac: do not print NULL LLI during error dmaengine: altera-msgdma: Fixed some inconsistent function name descriptions dmaengine: imx-sdma: Add missing struct documentation dmaengine: sf-pdma: Add multithread support for a DMA channel dt-bindings: dma: dw-axi-dmac: extend the number of interrupts dmaengine: dmatest: use strscpy to replace strlcpy dmaengine: ste_dma40: fix typo in comment dmaengine: jz4780: fix typo in comment dmaengine: s3c24xx: fix typo in comment ...
| * dmaengine: mediatek: mtk-hsdma: Fix typo 'the the' in commentSlark Xiao2022-07-261-1/+1
| | | | | | | | | | | | | | | | Replace 'the the' with 'the' in the comment. Signed-off-by: Slark Xiao <slark_xiao@163.com> Link: https://lore.kernel.org/r/20220721055647.46085-1-slark_xiao@163.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: axi-dmac: check cache coherency registerMathias Tausen2022-07-261-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | Marking the DMA as cache coherent (dma-coherent in devicetree) is only safe with versions of axi_dmac that have this feature enabled. Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Mathias Tausen <mta@satlab.com> Link: https://lore.kernel.org/r/20220726140213.786939-1-mta@satlab.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: sh: rz-dmac: Add device_synchronize callbackBiju Das2022-07-261-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some on-chip peripheral modules(for eg:- rspi) on RZ/G2L SoC use the same signal for both interrupt and DMA transfer requests. The signal works as a DMA transfer request signal by setting DMARS, and subsequent interrupt requests to the interrupt controller are masked. We can re-enable the interrupt by clearing the DMARS. This patch adds device_synchronize callback for clearing DMARS and thereby allowing DMA consumers to switch to interrupt mode. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220722084430.969333-1-biju.das.jz@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: sprd: Cleanup in .remove() after pm_runtime_get_sync() failedUwe Kleine-König2022-07-261-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's not allowed to quit remove early without cleaning up completely. Otherwise this results in resource leaks that probably yield graver problems later. Here for example some tasklets might survive the lifetime of the sprd-dma device and access sdev which is freed after .remove() returns. As none of the device freeing requires an active device, just ignore the return value of pm_runtime_get_sync(). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/20220721204054.323602-1-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: tegra: Add terminate() for Tegra234Akhil R2022-07-261-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In certain cases where the DMA client bus gets corrupted or if the end device ceases to send/receive data, DMA can wait indefinitely for the data to be received/sent. Attempting to terminate the transfer will put the DMA in pause flush mode and it remains there. The channel is irrecoverable once this pause times out in Tegra194 and earlier chips. Whereas, from Tegra234, it can be recovered by disabling the channel and reprograming it. Hence add a new terminate() function that ignores the outcome of dma_pause() so that terminate_all() can proceed to disable the channel. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20220720104045.16099-3-akhilrajeev@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: xilinx: use strscpy to replace strlcpyXueBing Chen2022-07-211-1/+1
| | | | | | | | | | | | | | | | | | | | The strlcpy should not be used because it doesn't limit the source length. Preferred is strscpy. Signed-off-by: XueBing Chen <chenxuebing@jari.cn> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/39aa840f.e31.181ed9461c2.Coremail.chenxuebing@jari.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: imx-sdma: Add FIFO stride support for multi FIFO scriptShengjiu Wang2022-07-211-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The peripheral may have several FIFOs, but some case just select some FIFOs from them for data transfer, which means FIFO0 and FIFO2 may be selected. So add FIFO address stride support, 0 means all FIFOs are continuous, 1 means 1 word stride between FIFOs. All stride between FIFOs should be same. Another option words_per_fifo means how many audio channel data copied to one FIFO one time, 1 means one channel per FIFO, 2 means 2 channels per FIFO. If 'n_fifos_src = 4' and 'words_per_fifo = 2', it means the first two words(channels) fetch from FIFO0 and then jump to FIFO1 for next two words, and so on after the last FIFO3 fetched, roll back to FIFO0. Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1657162829-9273-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: imx-dma: Cast of_device_get_match_data() with (uintptr_t)Fabio Estevam2022-07-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Change the of_device_get_match_data() cast to (uintptr_t) to silence the following clang warning: drivers/dma/imx-dma.c:1048:20: warning: cast to smaller integer type 'enum imx_dma_type' from 'const void *' [-Wvoid-pointer-to-enum-cast] Reported-by: kernel test robot <lkp@intel.com> Fixes: 0ab785c894e6 ("dmaengine: imx-dma: Remove unused .id_table") Signed-off-by: Fabio Estevam <festevam@denx.de> Link: https://lore.kernel.org/r/20220706111327.940764-1-festevam@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: ignore interrupt if no descriptorBen Dooks2022-07-211-0/+6
| | | | | | | | | | | | | | | | | | | | If the channel has no descriptor and the interrupt is raised then the kernel will OOPS. Check the result of vchan_next_desc() in the handler axi_chan_block_xfer_complete() to avoid the error happening. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Link: https://lore.kernel.org/r/20220708170153.269991-4-ben.dooks@sifive.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: do not print NULL LLI during errorBen Dooks2022-07-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | During debugging we have seen an issue where axi_chan_dump_lli() is passed a NULL LLI pointer which ends up causing an OOPS due to trying to get fields from it. Simply print NULL LLI and exit to avoid this. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Link: https://lore.kernel.org/r/20220708170153.269991-3-ben.dooks@sifive.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: altera-msgdma: Fixed some inconsistent function name descriptionsJiapeng Chong2022-07-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Inconsistent function names describing msgdma_chan_remove() and msgdma_dma_remove are modified to msgdma_dev_remove() and msgdma_remove(). Remove some warnings found by running scripts/kernel-doc, which is caused by using 'make W=1'. drivers/dma/altera-msgdma.c:927: warning: expecting prototype for msgdma_dma_remove(). Prototype was for msgdma_remove() instead. drivers/dma/altera-msgdma.c:758: warning: expecting prototype for msgdma_chan_remove(). Prototype was for msgdma_dev_remove() instead. Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Reviewed-by: Stefan Roese <sr@denx.de> Link: https://lore.kernel.org/r/20220706082605.114907-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: imx-sdma: Add missing struct documentationShengjiu Wang2022-07-061-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compile warning that 'Function parameter or member not described' with 'W=1' option: Add missing description for struct sdma_desc There is not any description for struct sdma_script_start_addrs, so use /* instead of /** Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1657086309-7964-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: sf-pdma: Add multithread support for a DMA channelViacheslav Mitrofanov2022-07-061-14/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we get a DMA channel and try to use it in multiple threads it will cause oops and hanging the system. % echo 64 > /sys/module/dmatest/parameters/threads_per_chan % echo 10000 > /sys/module/dmatest/parameters/iterations % echo 1 > /sys/module/dmatest/parameters/run [ 89.480664] Unable to handle kernel NULL pointer dereference at virtual address 00000000000000a0 [ 89.488725] Oops [#1] [ 89.494708] CPU: 2 PID: 1008 Comm: dma0chan0-copy0 Not tainted 5.17.0-rc5 [ 89.509385] epc : vchan_find_desc+0x32/0x46 [ 89.513553] ra : sf_pdma_tx_status+0xca/0xd6 This happens because of data race. Each thread rewrite channels's descriptor as soon as device_prep_dma_memcpy() is called. It leads to the situation when the driver thinks that it uses right descriptor that actually is freed or substituted for other one. With current fixes a descriptor changes its value only when it has been used. A new descriptor is acquired from vc->desc_issued queue that is already filled with descriptors that are ready to be sent. Threads have no direct access to DMA channel descriptor. Now it is just possible to queue a descriptor for further processing. Fixes: 6973886ad58e ("dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00") Signed-off-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com> Link: https://lore.kernel.org/r/20220701082942.12835-1-v.v.mitrofanov@yadro.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dmatest: use strscpy to replace strlcpyXueBing Chen2022-07-061-6/+6
| | | | | | | | | | | | | | | | | | The strlcpy should not be used because it doesn't limit the source length. Preferred is strscpy. Signed-off-by: XueBing Chen <chenxuebing@jari.cn> Link: https://lore.kernel.org/r/12e4cf06.a35.180fa748c29.Coremail.chenxuebing@jari.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: ste_dma40: fix typo in commentJulia Lawall2022-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220521111145.81697-17-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: jz4780: fix typo in commentJulia Lawall2022-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Acked-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20220521111145.81697-20-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: s3c24xx: fix typo in commentJulia Lawall2022-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220521111145.81697-46-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: owl: fix typo in commentJulia Lawall2022-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220521111145.81697-7-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: mediatek-cqdma: fix typo in commentJulia Lawall2022-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220521111145.81697-61-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: fix typos in commentsJulia Lawall2022-07-062-2/+2
| | | | | | | | | | | | | | | | | | | | Spelling mistakes (triple letters) in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220521111145.81697-51-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: xilinx_dpdma: Omit superfluous error message in xilinx_dpdma_probe()Tang Bin2022-07-061-3/+1
| | | | | | | | | | | | | | | | | | | | In the function xilinx_dpdma_probe(), when get irq failed, the function platform_get_irq() logs an error message, so remove redundant message here. Signed-off-by: Tang Bin <tangbin@cmss.chinamobile.com> Link: https://lore.kernel.org/r/20220519130855.7664-1-tangbin@cmss.chinamobile.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: sun4i: Set the maximum segment sizeSamuel Holland2022-07-051-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sun4i DMA engine supports transfer sizes up to 128k for normal DMA and 16M for dedicated DMA, as documented in the A10 and A20 manuals. Since this is larger than the default segment size limit (64k), exposing the real limit reduces the number of transfers needed for a transaction. However, because the device can only report one segment size limit, we have to expose the smaller limit from normal DMA. One complication is that the driver combines pairs of periodic transfers to reduce programming overhead. This only works when the period size is at most half of the maximum transfer size. With the default 64k segment size limit, this was always the case, but for normal DMA it is no longer guaranteed. Skip the optimization if the period is too long; even without it, the overhead is less than before. Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220621031350.36187-1-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: fsl-edma: remove redundant assignment to pointer last_sgColin Ian King2022-07-011-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer last_sg is being assigned a value at the start of a loop however it is never read and is being re-assigned later on in both brances of an if-statement. The assignment is redundant and can be removed. Cleans up clang scan-build warning: drivers/dma/fsl-edma-common.c:563:3: warning: Value stored to 'last_sg' is never read [deadcode.DeadStores] Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20220614184759.164379-1-colin.i.king@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: mediatek: mtk-hsdma: Fix typo in commentXiang wangx2022-07-011-1/+1
| | | | | | | | | | | | | | | | Delete the redundant word 'be'. Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com> Link: https://lore.kernel.org/r/20220618130120.9783-1-wangxiang@cdjrlc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: at_xdmac: Fix typo in commentXiang wangx2022-07-011-1/+1
| | | | | | | | | | | | | | | | Delete the redundant word 'the'. Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com> Link: https://lore.kernel.org/r/20220618130349.11507-1-wangxiang@cdjrlc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: ep93xx: Fix typo in commentsJiang Jian2022-07-011-1/+1
| | | | | | | | | | | | | | | | Remove the repeated word 'and' from comments Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Link: https://lore.kernel.org/r/20220622143158.15091-1-jiangjian@cdjrlc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: imx-sdma: Improve the SDMA irq nameFabio Estevam2022-07-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | On SoCs with several SDMA instances, such as i.MX8M for example, all the SDMA related interrupts appear with the same "sdma" name. Improve the SDMA irq name by associating it with the SDMA instance via dev_name(), so that the SDMA irq names can be unique. Signed-off-by: Fabio Estevam <festevam@denx.de> Link: https://lore.kernel.org/r/20220623123353.2570410-1-festevam@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: ti: k3-psil-j721s2: Add psil threads for sa2ulJayesh Choudhary2022-07-011-0/+8
| | | | | | | | | | | | | | | | | | Add endpoint configuration for the four ingress and two egress threads for main domain crypto accelerator. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20220628050232.331956-1-j-choudhary@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: remove DMA_MEMCPY_SG once againChristoph Hellwig2022-06-272-129/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was removed before due to the complete lack of users, but 3218910fd585 ("dmaengine: Add core function and capability check for DMA_MEMCPY_SG") and 29cf37fa6dd9 ("dmaengine: Add consumer for the new DMA_MEMCPY_SG API function.") added it back despite still not having any users whatsoever. Fixes: 3218910fd585 ("dmaengine: Add core function and capability check for DMA_MEMCPY_SG") Fixes: 29cf37fa6dd9 ("dmaengine: Add consumer for the new DMA_MEMCPY_SG API function.") Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220606074733.622616-1-hch@lst.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: stm32-mdma: Remove dead code in stm32_mdma_irq_handler()Alexey Khoroshilov2022-06-161-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Local variable chan is initialized by an address of element of chan array that is part of stm32_mdma_device struct, so it does not make sense to compare chan with NULL. Found by Linux Verification Center (linuxtesting.org) with SVACE. Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Fixes: a4ffb13c8946 ("dmaengine: Add STM32 MDMA driver") Reviewed-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/1655072638-9103-1-git-send-email-khoroshilov@ispras.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: apple-admac: Use {low,upp}er_32_bits() to split 64-bit addressGeert Uytterhoeven2022-06-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_PHYS_ADDR_T_64BIT is not set: drivers/dma/apple-admac.c: In function ‘admac_cyclic_write_one_desc’: drivers/dma/apple-admac.c:213:22: error: right shift count >= width of type [-Werror=shift-count-overflow] 213 | writel_relaxed(addr >> 32, ad->base + REG_DESC_WRITE(channo)); | ^~ Fix this by using the {low,upp}er_32_bits() helper macros to obtain the address parts. Reported-by: noreply@ellerman.id.au Fixes: b127315d9a78c011 ("dmaengine: apple-admac: Add Apple ADMAC driver") Acked-by: Martin Povišer <povik+lin@cutebit.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/20220616141312.1953819-1-geert@linux-m68k.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-edma: remove a macro conditional with similar branchesVladimir Zapolskiy2022-06-101-8/+0
| | | | | | | | | | | | | | | | | | | | | | After adding commit 8fc5133d6d4d ("dmaengine: dw-edma: Fix unaligned 64bit access") two branches under macro conditional become identical, thus the code can be simplified without any functional change. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Acked-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20220610100700.2295522-1-vladimir.zapolskiy@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw: dmamux: Fix build without CONFIG_OFMiquel Raynal2022-06-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When built without OF support, of_match_node() expands to NULL, which produces the following output: >> drivers/dma/dw/rzn1-dmamux.c:105:34: warning: unused variable 'rzn1_dmac_match' [-Wunused-const-variable] static const struct of_device_id rzn1_dmac_match[] = { One way to silence the warning is to enclose the structure definition with an #ifdef CONFIG_OF/#endif block. Fixes: 134d9c52fca2 ("dmaengine: dw: dmamux: Introduce RZN1 DMA router support") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220609141455.300879-2-miquel.raynal@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw: dmamux: Export the module device tableMiquel Raynal2022-06-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | This is a tristate driver that can be built as a module, as a result, the OF match table should be exported with MODULE_DEVICE_TABLE(). Fixes: 134d9c52fca2 ("dmaengine: dw: dmamux: Introduce RZN1 DMA router support") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220609141455.300879-1-miquel.raynal@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: apple-admac: Fix print formatVinod Koul2022-06-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We get a warning (treated as error now) drivers/dma/apple-admac.c: In function 'admac_cyclic_write_one_desc': drivers/dma/apple-admac.c:209:26: error: format '%x' expects argument of type 'unsigned int', but argument 7 has type 'long unsigned int' [-Werror=format=] 209 | dev_dbg(ad->dev, "ch%d descriptor: addr=0x%pad len=0x%zx flags=0x%x\n", Use %lx for priniting the flag Fixes: b127315d9a78 ("dmaengine: apple-admac: Add Apple ADMAC driver") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220610043117.39337-1-vkoul@kernel.org Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: apple-admac: Add Apple ADMAC driverMartin Povišer2022-06-093-0/+827
| | | | | | | | | | | | | | | | | | Add driver for Audio DMA Controller present on Apple SoCs from the "Apple Silicon" family. Signed-off-by: Martin Povišer <povik+lin@cutebit.org> Link: https://lore.kernel.org/r/20220531213615.7822-3-povik+lin@cutebit.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dmatest: Replace symbolic permissions by octal permissionsGeert Uytterhoeven2022-06-091-15/+14
| | | | | | | | | | | | | | | | Octal permissions are easier to read. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/a745b883288f95e999b71fac677bbc2daa13c22d.1654702928.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dmatest: Remove spaces before tabsGeert Uytterhoeven2022-06-091-2/+2
| | | | | | | | | | | | | | | | Scripts/checkpath.pl says "please, no space before tabs". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/d863916120d043e3f9dd2f2670238c34f68f7d5f.1654702886.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | Merge tag 'clk-for-linus' of ↵Linus Torvalds2022-08-0581-1455/+5873
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The clk core gains a new set of APIs that allow drivers to both acquire clks and prepare and enable them at the same time. This also comes with devm support so that drivers can make a single call to get and prepare and enable the clk and have that all undone when their driver is removed. Many folks have requested this feature over the years, but we've had disagreements about how to implement it and if it was worthwhile to encourage drivers to use such an API. Now it's here, so let's see how it goes. I hope that by introducing this API we can identify drivers that would benefit from further consolidation of clk API usage, possibly by moving such logic to the bus layer and out of drivers altogether. Outside of that major API update, we have the usual collection of driver updates. A few new SoCs are supported, mostly Qualcomm and Renesas this time around. Then we have the long tail of non-critical fixes and minor feature additions to various clk drivers. And finally more clk provider migration to struct clk_parent_data, reducing boot times in the process. Summary: Core: - devm helpers for clk_get() + clk_prepare() and clk_enable() New Drivers: - Support for the camera clock controller in Qualcomm SM8450 and the display and gpu clock controllers in Qualcomm SM8350 - Add support for the Renesas RZ/Five SoC Updates: - Various fixes, new clocks and USB GDSCs are introduced for Qualcomm IPQ8074 - Fixes to Qualcomm MSM8939 for issues introduced by inheriting the MSM8916 GCC driver - Support for a new type of voteable GDSCs used by Qualcomm SC8280XP PCIe GDSCs - Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux implementation - Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994 GCC are migrated to use clk_parent_data - Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845 and SM8250 - Qualcomm MSM8916 gains more possible frequencies for its GP clocks. - The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic the design in IPQ8074 to allow the GCC driver to probe earlier. - The regulator based mmcx supply for Qualcomm dispcc and videocc is dropped, as the only upstream target that adapted this interface was transitioned several kernel versions ago - Qualcomm GDSCs found to be enabled at boot will now reflect in the enable count of the supply, as was done with the regulator supplies previously - Correct adc1, nic_media and edma1's parents for NXP i.MX93 - rdiv, mfd values, the return rate in recalc_rate and add more frequencies in the table for fracn-gppll on i.MX - Remove Allwinner workaround logic/compatible in fixed factor code - MediaTek clk driver cleanups - Add reset support to more MediaTek clk drivers - deduplicate Allwinner ccu_clks arrays - Allwinner H6 GPU DFS support - Adjust Allwinner Kconfig to limit choice - Fix initconst confusion on Renesas R-Car Gen4 - Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L - Add PFC and WDT clocks and resets on Renesas RZ/V2M - Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on Renesas R-Car S4-8" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits) clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw() clk: mux: Introduce devm_clk_hw_register_mux_parent_hws() clk: divider: Introduce devm_clk_hw_register_divider_parent_hw() clk: qcom: gcc-msm8994: use parent_hws for gpll0/4 clk: qcom: clk-rpm: convert to parent_data API dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled clk: qcom: Drop mmcx gdsc supply for dispcc and videocc clk: qcom: fix build error initializer element is not constant clk: sprd: Add dt-bindings include file for UMS512 dt-bindings: clk: sprd: Add bindings for ums512 clock controller clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources clk: qcom: add support for SM8350 DISPCC ...
| * \ Merge branch 'clk-allwinner' into clk-nextStephen Boyd2022-08-027-295/+50
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * clk-allwinner: clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS clk: sunxi: Do not select the PRCM MFD clk: sunxi: Limit legacy clocks to 32-bit ARM clk: sunxi-ng: Deduplicate ccu_clks arrays
| | * | clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFSRoman Stratiienko2022-07-081-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using simple bash script it was discovered that not all CCU registers can be safely used for DFS, e.g.: while true do devmem 0x3001030 4 0xb0003e02 devmem 0x3001030 4 0xb0001e02 done Script above changes the GPU_PLL multiplier register value. While the script is running, the user should interact with the user interface. Using this method the following results were obtained: | Register | Name | Bits | Values | Result | | -- | -- | -- | -- | -- | | 0x3001030 | GPU_PLL.MULT | 15..8 | 20-62 | OK | | 0x3001030 | GPU_PLL.INDIV | 1 | 0-1 | OK | | 0x3001030 | GPU_PLL.OUTDIV | 0 | 0-1 | FAIL | | 0x3001670 | GPU_CLK.DIV | 3..0 | ANY | FAIL | DVFS started to work seamlessly once dividers which caused the glitches were set to fixed values. Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220705075226.359475-1-r.stratiienko@gmail.com
| | * | clk: sunxi: Do not select the PRCM MFDSamuel Holland2022-07-041-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PRCM MFD driver is already selected by the two platforms where it is actually used (MACH_SUN6I and MACH_SUN8I). Selecting it here builds it unnecessarily on the rest of the Allwinner platforms. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702190135.51744-2-samuel@sholland.org
| | * | clk: sunxi: Limit legacy clocks to 32-bit ARMSamuel Holland2022-07-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi legacy clocks were never compatible with any 64-bit SoC, so there is no point in building them as part of a 64-bit ARM kernel. They make even less sense being built in to a 64-bit RISC-V kernel. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702190135.51744-1-samuel@sholland.org
| | * | clk: sunxi-ng: Deduplicate ccu_clks arraysSamuel Holland2022-06-065-289/+37
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ccu_clks arrays are used to link ccu_common objects to a platform device during probe. There is no requirement that the clk_hw inside the ccu_common object ever gets registered with the clock framework. So the drivers do not need a separate ccu_clks array for each CCU variant. A single array per driver, containing the union of the CCU clocks from all variants, is sufficient. Let's save some space by combining the ccu_clks arrays in each driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531043539.41549-1-samuel@sholland.org
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| *-----. \ Merge branches 'clk-renesas', 'clk-spreadtrum', 'clk-imx' and 'clk-qcom' ↵Stephen Boyd2022-08-0246-757/+5026
| |\ \ \ \ \ | | | | |_|/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into clk-next * clk-renesas: (22 commits) clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config clk: renesas: r9a07g043: Add support for RZ/Five SoC dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions clk: renesas: r8a779f0: Add HSCIF clocks clk: renesas: r8a779f0: Add PCIe clocks clk: renesas: r8a779f0: Add Z0 and Z1 clock support dt-bindings: clock: renesas,rzg2l: Simplify header file references clk: renesas: rza1: Remove struct rz_cpg clk: renesas: r8a7779: Remove struct r8a7779_cpg clk: renesas: r8a7778: Remove struct r8a7778_cpg clk: renesas: sh73a0: Remove sh73a0_cpg.reg clk: renesas: r8a7740: Remove r8a7740_cpg.reg clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg clk: renesas: r8a779f0: Add SDHI0 clock clk: renesas: r8a779f0: Add thermal clock clk: renesas: rzg2l: Fix reset status function clk: renesas: r9a06g032: Fix UART clkgrp bitsel clk: renesas: r9a06g032: Drop some unused fields clk: renesas: r9a09g011: Add WDT clock and reset entries clk: renesas: r9a09g011: Add PFC clock and reset entries ... * clk-spreadtrum: clk: sprd: Add dt-bindings include file for UMS512 dt-bindings: clk: sprd: Add bindings for ums512 clock controller * clk-imx: clk: imx: clk-fracn-gppll: Add more freq config for video pll clk: imx: clk-fracn-gppll: correct rdiv clk: imx: clk-fracn-gppll: Return rate in rate table properly in ->recalc_rate() clk: imx: clk-fracn-gppll: fix mfd value clk: imx93: Correct the edma1's parent clock clk: imx93: correct nic_media parent clk: imx93: use adc_root as the parent clock of adc1 * clk-qcom: (62 commits) clk: qcom: gcc-msm8994: use parent_hws for gpll0/4 clk: qcom: clk-rpm: convert to parent_data API dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled clk: qcom: Drop mmcx gdsc supply for dispcc and videocc clk: qcom: fix build error initializer element is not constant dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources clk: qcom: add support for SM8350 DISPCC clk: qcom: add support for SM8350 GPUCC clk: qcom: add camera clock controller driver for SM8450 SoC clk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfaces clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description ...
| | | | | * clk: qcom: gcc-msm8994: use parent_hws for gpll0/4Dmitry Baryshkov2022-07-191-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use parent_hws for two remaining clocks in gcc-msm8994 that used parent_names. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220620080505.1573948-1-dmitry.baryshkov@linaro.org
| | | | | * clk: qcom: clk-rpm: convert to parent_data APIChristian Marangi2022-07-191-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert clk-rpm driver to parent_data API. We keep the old pxo/cxo_board parent naming to keep compatibility with old DT and we use the new pxo/cxo for new implementation where these clock are defined in DTS. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706225321.26215-4-ansuelsmth@gmail.com
| | | | | * clk: qcom: gcc-msm8939: Add missing USB HS system clock frequenciesBryan O'Donoghue2022-07-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The shipped qcom driver defines: static struct clk_freq_tbl ftbl_gcc_usb_hs_system_clk[] = { F( 57140000, gpll0_out_main, 14, 0, 0), F( 80000000, gpll0_out_main, 10, 0, 0), F( 100000000, gpll0_out_main, 8, 0, 0), F_END }; In the upstream code we omit 57.14 MHz and 100 MHz. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220712125922.3461675-7-bryan.odonoghue@linaro.org
| | | | | * clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequenciesBryan O'Donoghue2022-07-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Again the msm8936/msm8939 supports a wider range of operating frequencies to the antecedent msm8916 from which the msm8939.c driver is derived. static struct clk_freq_tbl ftbl_gcc_mdss_mdp_clk[] = { F( 50000000, gpll0_out_aux, 16, 0, 0), F( 80000000, gpll0_out_aux, 10, 0, 0), F( 100000000, gpll0_out_aux, 8, 0, 0), F( 145500000, gpll0_out_aux, 5.5, 0, 0), F( 153600000, gpll1_out_main, 4, 0, 0), F( 160000000, gpll0_out_aux, 5, 0, 0), F( 177780000, gpll0_out_aux, 4.5, 0, 0), F( 200000000, gpll0_out_aux, 4, 0, 0), F( 266670000, gpll0_out_aux, 3, 0, 0), F( 307200000, gpll1_out_main, 2, 0, 0), F( 366670000, gpll3_out_aux, 3, 0, 0), F_END }; We are missing 145.5 MHz and 153.6 MHz. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220712125922.3461675-6-bryan.odonoghue@linaro.org
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 04:12:31 +0100