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* Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds2013-02-2615-600/+1454
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull GPIO changes from Grant Likely: "This branch contains the usual set of individual driver improvements and bug fixes, as well as updates to the core code. The more notable changes include: - Internally add new API for referencing GPIOs by gpio_desc instead of number. Eventually this will become a public API - ACPI GPIO binding support" * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: (33 commits) arm64: select ARCH_WANT_OPTIONAL_GPIOLIB gpio: em: Use irq_domain_add_simple() to fix runtime error gpio: using common order: let 'static const' instead of 'const static' gpio/vt8500: memory cleanup missing gpiolib: Fix locking on gpio debugfs files gpiolib: let gpio_chip reference its descriptors gpiolib: use descriptors internally gpiolib: use gpio_chips list in gpiochip_find_base gpiolib: use gpio_chips list in sysfs ops gpiolib: use gpio_chips list in gpiochip_find gpiolib: use gpio_chips list in gpiolib_sysfs_init gpiolib: link all gpio_chips using a list gpio/langwell: cleanup driver gpio/langwell: Add Cloverview ids to pci device table gpio/lynxpoint: add chipset gpio driver. gpiolib: add missing braces in gpio_direction_show gpiolib-acpi: Fix error checks in interrupt requesting gpio: mpc8xxx: don't set IRQ_TYPE_NONE when creating irq mapping gpiolib: remove gpiochip_reserve() arm: pxa: tosa: do not use gpiochip_reserve() ...
| * gpio: em: Use irq_domain_add_simple() to fix runtime errorMagnus Damm2013-02-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the gpio-em.c driver to reconsider the pdata->irq_base variable. Non-DT board code like for instance board-kzm9d.c needs to operate of a static IRQ range for platform devices. So this patch is updating the code to make use of the function irq_domain_add_simple() instead of irq_domain_add_linear(). Fixes a EMEV2 / KZM9D runtime error caused by the following commit: 7385500 gpio/em: convert to linear IRQ domain Cc: stable@kernel.org Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Simon Horman <horms+renesas@verge.net.au> Reported-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: using common order: let 'static const' instead of 'const static'Chen Gang2013-02-111-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'const static ' is not a common order, better to use 'static const' instead. building: make EXTRA_CFLAGS=-W ARCH=arm drivers/gpio/gpio-omap.c:1479: warning: 'static' is not at beginning of declaration drivers/gpio/gpio-omap.c:1485: warning: 'static' is not at beginning of declaration drivers/gpio/gpio-omap.c:1491: warning: 'static' is not at beginning of declaration Signed-off-by: Chen Gang <gang.chen@asianux.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpio/vt8500: memory cleanup missingTony Prisk2013-02-111-12/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is missing a .remove callback, and the fail path on probe is incomplete. If an error occurs in vt8500_add_chips, gpio_base is not unmapped. The driver is also ignoring the return value from this function so if a chip fails to register it completes as successful. Replaced pr_err with dev_err in vt8500_add_chips since the device is available. There is also no .remove callback defined so the function is added. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: Fix locking on gpio debugfs filesGrant Likely2013-02-111-3/+9
| | | | | | | | | | | | | | | | | | The debugfs files really need to hold the gpiolib spinlock before accessing the list. Otherwise chip addition/removal will cause an oops. Cc: Alexandre Courbot <acourbot@nvidia.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: let gpio_chip reference its descriptorsAlexandre Courbot2013-02-111-16/+23
| | | | | | | | | | | | | | | | | | | | | | Add a pointer to the gpio_chip structure that references the array of GPIO descriptors belonging to the chip, and update gpiolib code to use this pointer instead of the global gpio_desc[] array. This is another step towards the removal of the gpio_desc[] global array. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.orh> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: use descriptors internallyAlexandre Courbot2013-02-111-176/+338
| | | | | | | | | | | | | | | | | | | | | | | | Make sure gpiolib works internally with descriptors and (chip, offset) pairs instead of using the global integer namespace. This prepares the ground for the removal of the global gpio_desc[] array and the introduction of the descriptor-based GPIO API. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [grant.likely: Squash in fix for link error when CONFIG_SYSFS=n] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: use gpio_chips list in gpiochip_find_baseAlexandre Courbot2013-02-091-21/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-implement gpiochip_find_base using the list of chips instead of the global gpio_desc[] array. This makes it both simpler and more efficient, and is needed to remove the global descriptors array. The new code should preserve the exact same GPIO number assignment policy as the code it is replacing. There shouldn't be any visible change to the assigned GPIO numbers. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> [grant.likely: Added comment about assignment policy] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: use gpio_chips list in sysfs opsAlexandre Courbot2013-02-091-27/+10
| | | | | | | | | | | | | | | | This makes the code both simpler and faster compared to parsing the GPIO number space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: use gpio_chips list in gpiochip_findAlexandre Courbot2013-02-091-10/+7
| | | | | | | | | | | | | | | | | | Using the GPIO chips list is much faster than parsing the entire GPIO number space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: use gpio_chips list in gpiolib_sysfs_initAlexandre Courbot2013-02-091-5/+2
| | | | | | | | | | | | | | | | | | Use the small list of GPIO chips instead of parsing the whole GPIO number space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpiolib: link all gpio_chips using a listAlexandre Courbot2013-02-091-7/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a list member to gpio_chip that allows all chips to be parsed quickly. The current method requires parsing the entire GPIO integer space, which is painfully slow. Using a list makes many chip operations that involve lookup or parsing faster, and also simplifies the code. It is also necessary to eventually get rid of the global gpio_desc[] array. The list of gpio_chips is always ordered by base GPIO number to ensure chips traversal is done in the right order. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * Merge branch 'linusw/devel' of ↵Grant Likely2013-02-0511-294/+463
| |\ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git into gpio/next Device driver features, cleanups and bug fixes. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * gpiolib: add missing braces in gpio_direction_showAlexandre Courbot2013-02-041-2/+3
| | | | | | | | | | | | | | | | | | | | | Add missing braces in an if..else condition. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpiolib-acpi: Fix error checks in interrupt requestingMathias Nyman2013-02-041-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | Print error message if requesting an interrupt fails. Use int instead of unsigned for interrupts in case of error values Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: mpc8xxx: don't set IRQ_TYPE_NONE when creating irq mappingAnatolij Gustschin2013-02-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exporting gpios over sysfs GPIO interface throws genirq error messages, i.e. on an mpc5121 based board exporting GPIO 5 triggers it: # echo 229 > /sys/class/gpio/export genirq: Setting trigger mode 0 for irq 44 failed (mpc512x_irq_set_type+0x0/0x18c) Similar error messages appear in the kernel boot log since the board specifies GPIOs for matrix keypad and also SD Card write protect and card detect GPIOs in its device tree. For all these GPIOs there is an error message in the log. The issue is triggered by setting the irq type to IRQ_TYPE_NONE in the driver's irq_domain map function mpc8xxx_gpio_irq_map(). ... mpc8xxx_gpio_irq_map irq_set_irq_type __irq_set_trigger __irq_set_trigger() calls irq_set_type() callback of the mpc8xxx gpio irq chip with the IRQ_TYPE_NONE in its 'flags' argument. This callback is either mpc8xxx_irq_set_type() or mpc512x_irq_set_type(). Both these functions return -EINVAL in the case if IRQ_TYPE_NONE is passed in the flow_type argument. This return value triggers the observed error message in __irq_set_trigger(). Modifying these callbacks to not return an error in IRQ_TYPE_NONE case doesn't make any sense to me. The line setting IRQ_TYPE_NONE type has been originally added by commit 345e5c8a "powerpc: Add interrupt support to mpc8xxx_gpio". At this time set_irq_type() checked its type argument and returned 0 if the type argument didn't specify any meaningful type in its type sense bits (and thus was equal to IRQ_TYPE_NONE). Effectively this line was a nop and I wonder what was the point of adding it. Remove IRQ_TYPE_NONE setting in the irq_domain mapping function. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpiolib: remove gpiochip_reserve()Alexandre Courbot2013-02-041-50/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | gpiochip_reserve() has no user and stands in the way of the removal of the static gpio_desc[] array. Remove this function as well as the now unneeded RESERVED flag of struct gpio_desc. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: mxs: Add IRQ_TYPE_EDGE_BOTH supportGwenhael Goavec-Merou2013-01-291-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for IRQ_TYPE_EDGE_BOTH needed for some driver (gpio-keys). Inspired from gpio-mxc.c Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpiolib-acpi: Add ACPI5 event model support to gpio.Mathias Nyman2013-01-291-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ability to handle ACPI events signalled by GPIO interrupts. ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are handled by ACPI event methods which need to be called from the GPIO controller's interrupt handler. acpi_gpio_request_interrupt() finds out which gpio pins have acpi event methods and assigns interrupt handlers that calls the acpi event methods for those pins. Partially based on work by Rui Zhang <rui.zhang@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: use managed resourcesLinus Walleij2013-01-281-24/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the devm_* managed resources the pca driver can be simplified and cut down on boilerplate code. [gcl: fixed a inccorect reference to a removed label, "goto fail_out" became "return ret"] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: use simple irqdomainGregory CLEMENT2013-01-281-37/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This switches the legacy irqdomain to the simple one, which will auto-allocate descriptors, and also make sure that we use irq_create_mapping() in the to_irq function. Also use the map function of irq_domain_ops to setup the irq configuration on demand and no more statically during the initialization of the driver. Based on a initial patch from Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pxa: set initcall level to module initHaojian Zhuang2013-01-251-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | gpio & pinctrl driver are used together. The pinctrl driver is already launched before gpio driver in Makefile. So set gpio driver to module init level. Otherwise, the sequence will be inverted. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: add support for pca9505Gregory CLEMENT2013-01-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that pca953x driver can handle GPIO expanders with more than 32 bits this patch adds the support for the pca9505 which cam with 40 GPIOs. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: make the register access by GPIO bankGregory CLEMENT2013-01-251-106/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now the pca953x driver accessed all the bank of a given register in a single command using only a 32 bits variable. New expanders from the pca53x family come with 40 GPIOs which no more fit in a 32 variable. This patch make access to the registers more generic by relying on an array of u8 variables. This fits exactly the way the registers are represented in the hardware. It also adds helpers to access to a single register of a bank instead of reading or writing all the banks for a given register. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pl061: set initcall level to module initHaojian Zhuang2013-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace subsys initcall by module initcall level. Since pinctrl driver is already launched before gpio driver. It's unnecessary to set gpio driver in subsys init call level. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Tested-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: devm_gpio_* support should not depend on GPIOLIBShawn Guo2013-01-222-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some architectures (e.g. blackfin) provide gpio API without requiring GPIOLIB support (ARCH_WANT_OPTIONAL_GPIOLIB). devm_gpio_* functions should also work for these architectures, since they do not really depend on GPIOLIB. Add a new option GPIO_DEVRES (enabled by default) to control the build of devres.c. It also removes the empty version of devm_gpio_* functions for !GENERIC_GPIO build from linux/gpio.h, and moves the function declarations from asm-generic/gpio.h into linux/gpio.h. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: twl4030: Cache the direction and output states in private dataPeter Ujfalusi2013-01-171-35/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use more coherent locking in the driver. Use bitfield to store the GPIO direction and if the pin is configured as output store the status also in a bitfiled. In this way we can just look at these bitfields when we need information about the pin status and only reach out to the chip when it is needed. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: twl4030: Introduce private structure to store variables needed runtimePeter Ujfalusi2013-01-171-32/+50
| | | | | | | | | | | | | | | | | | | | | | | | Move most of the global variables inside a private structure and allocate it dynamically. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: vt8500: Export dedicated GPIO before multifunction pins.Tony Prisk2013-01-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vendor does not provide numbering for gpio pins. Vendor source exports dedicated gpio pins first, followed by multifunction pins. As this is what end users expect, this patch changes vt8500 and wm8505 to do the same. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio/langwell: cleanup driverDavid Cohen2013-02-051-34/+17
| | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up cosmetic issues, remove useless functions and add to_lnw_priv() macro to replace many usages of container_of(). Signed-off-by: David Cohen <david.a.cohen@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio/langwell: Add Cloverview ids to pci device tableDavid Cohen2013-02-051-0/+2
| | | | | | | | | | | | | | | | | | | | | Adds support for new Cloverview hardware. Signed-off-by: David Cohen <david.a.cohen@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio/lynxpoint: add chipset gpio driver.Mathias Nyman2013-02-053-0/+478
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add gpio support for Intel Lynxpoint chipset. Lynxpoint supports 94 gpio pins which can generate interrupts. Driver will fail requests for pins that are marked as owned by ACPI, or set in an alternate mode (non-gpio). Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | Merge tag 'for-3.9-rc1' of git://gitorious.org/linux-pwm/linux-pwmLinus Torvalds2013-02-2611-39/+707
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull PWM changes from Thierry Reding: "A new driver has been added to support the PWM mode of the timer counter blocks found on Atmel AT91 SoCs. The VT8500 driver now supports changing the PWM signal polarity and the TI drivers (EHRPWM and ECAP) gained suspend and resume functionality. User drivers can now query the core for whether access to a PWM device will sleep (if the PWM chip is on a slow bus such as I2C or SPI). The pwm-backlight driver now handles the backlight BL_CORE_FBBLANK state in addition to the FB layer's blanking states. To round things off, a few fixes and cleanups are also included" * tag 'for-3.9-rc1' of git://gitorious.org/linux-pwm/linux-pwm: pwm: twl: Use to_twl() instead of container_of() pwm: tegra: assume CONFIG_OF pwm_backlight: Validate dft_brightness in main probe function pwm: Export pwm_{set,get}_chip_data() pwm: Make Kconfig entries more consistent pwm: Add can_sleep property to drivers pwm: Add pwm_can_sleep() as exported API to users pwm-backlight: handle BL_CORE_FBBLANK state pwm: pwm-tiecap: Low power sleep support pwm: pwm-tiehrpwm: Low power sleep support pwm: pwm-tiehrpwm: Update the clock handling of pwm-tiehrpwm driver pwm: vt8500: Add polarity support pwm: vt8500: Register write busy test performed incorrectly pwm: atmel: add Timer Counter Block PWM driver
| * | | pwm: twl: Use to_twl() instead of container_of()Johannes Thumshirn2013-02-171-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Always use to_twl() for converting into private data instead of container_of(). Signed-off-by: Johannes Thumshirn <morbidrsa@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: tegra: assume CONFIG_OFStephen Warren2013-02-151-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra only supports, and always enables, device tree. Remove all ifdefs for DT support from the driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm_backlight: Validate dft_brightness in main probe functionPeter Ujfalusi2013-01-311-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the dft_brightness validity check from the DT parsing function to the main probe. In this way we can validate it in case we are booting with or without DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: Export pwm_{set,get}_chip_data()Thierry Reding2013-01-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When building a driver as a module, these functions need to be exported for linking to succeed. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: Make Kconfig entries more consistentThierry Reding2013-01-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | PWM is now consistently spelled in all uppercase letters. For the Atmel driver the entry now also mentions Atmel to make it easier to find. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: Add can_sleep property to driversFlorian Vaussard2013-01-302-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calls to PWM drivers connected through I2C can sleep. Use the new can_sleep property. Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: Add pwm_can_sleep() as exported API to usersFlorian Vaussard2013-01-301-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calls to some external PWM chips can sleep. To help users, add pwm_can_sleep() API. Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm-backlight: handle BL_CORE_FBBLANK stateAlexandre Courbot2013-01-301-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to include/linux/backlight.h, the fb_blank field is to be removed and blank status should preferably be set by setting the BL_CORE_FBBLANK bit of the state field. This patch ensures this condition is also taken into account when updating the backlight state. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: pwm-tiecap: Low power sleep supportPhilip Avinash2013-01-171-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In low power modes of AM33XX platforms, peripherals power is cut off. This patch supports low power sleep transition support for ECAP driver. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: pwm-tiehrpwm: Low power sleep supportPhilip Avinash2013-01-171-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In low power modes of AM33XX platforms, peripherals power is cut off. This patch supports low power sleep transition support for EHRPWM driver. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: pwm-tiehrpwm: Update the clock handling of pwm-tiehrpwm driverPhilip, Avinash2013-01-141-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock framework has changed and it's now better to invoke clock_prepare_enable() and clk_disable_unprepare() rather than the legacy clk_enable() and clk_disable() calls. This patch converts the pwm-tiehrpwm driver to the new framework. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: vt8500: Add polarity supportTony Prisk2013-01-091-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to set polarity on PWM devices, allowing for inverted duty cycles. Also update the binding document to #pwm-cells = <3> to allow passing the flags from devicetree. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: vt8500: Register write busy test performed incorrectlyTony Prisk2013-01-091-15/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct operation for register writes is to perform a busy-wait after writing the register. Currently the busy wait it performed before, meaning subsequent register writes to bitfields may occur before the previous field has been updated. Also, all registers are defined as 32-bit read/write. Change pwm_busy_wait() to use readl rather than readb. Improve readability of code with defines for registers and bitfields. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | | pwm: atmel: add Timer Counter Block PWM driverBoris BREZILLON2013-01-083-0/+458
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a PWM driver based on Atmel Timer Counter Block. The Timer Counter Block is used in Waveform generator mode. A Timer Counter Block provides up to 6 PWM devices grouped by 2: * group 0 = PWM 0 and 1 * group 1 = PWM 2 and 3 * group 2 = PMW 4 and 5 PWM devices in a given group must be configured with the same period value. If a PWM device in a group tries to change the period value and the other device is already configured with a different value an error will be returned. This driver requires device tree support. The Timer Counter Block number used to create a PWM chip is given by the tc-block field in an "atmel,tcb-pwm" compatible node. This patch was tested on kizbox board (at91sam9g20 SoC) with pwm-leds. Signed-off-by: Boris BREZILLON <linux-arm@overkiz.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
* | | | Merge tag 'mmc-updates-for-3.9-rc1' of ↵Linus Torvalds2013-02-2636-807/+2866
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC update from Chris Ball: "MMC highlights for 3.9: Core: - Support for packed commands in eMMC 4.5. (This requires a host capability to be turned on. It increases write throughput by 20%+, but may also increase average write latency; more testing needed.) - Add DT bindings for capability flags. - Add mmc_of_parse() for shared DT parsing between drivers. Drivers: - android-goldfish: New MMC driver for the Android Goldfish emulator. - mvsdio: Add DT bindings, pinctrl, use slot-gpio for card detection. - omap_hsmmc: Fix boot hangs with RPMB partitions. - sdhci-bcm2835: New driver for controller used by Raspberry Pi. - sdhci-esdhc-imx: Add 8-bit data, auto CMD23 support, use slot-gpio. - sh_mmcif: Add support for eMMC DDR, bundled MMCIF IRQs. - tmio_mmc: Add DT bindings, support for vccq regulator" * tag 'mmc-updates-for-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (92 commits) mmc: tegra: assume CONFIG_OF, remove platform data mmc: add DT bindings for more MMC capability flags mmc: tmio: add support for the VccQ regulator mmc: tmio: remove unused and deprecated symbols mmc: sh_mobile_sdhi: use managed resource allocations mmc: sh_mobile_sdhi: remove unused .pdata field mmc: tmio-mmc: parse device-tree bindings mmc: tmio-mmc: define device-tree bindings mmc: sh_mmcif: use mmc_of_parse() to parse standard MMC DT bindings mmc: (cosmetic) remove "extern" from function declarations mmc: provide a standard MMC device-tree binding parser centrally mmc: detailed definition of CD and WP MMC line polarities in DT mmc: sdhi, tmio: only check flags in tmio-mmc driver proper mmc: sdhci: Fix parameter of sdhci_do_start_signal_voltage_switch() mmc: sdhci: check voltage range only on regulators aware of voltage value mmc: bcm2835: set SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK mmc: support packed write command for eMMC4.5 devices mmc: add packed command feature of eMMC4.5 mmc: rtsx: remove driving adjustment mmc: use regulator_can_change_voltage() instead of regulator_count_voltages ...
| * | | | mmc: tegra: assume CONFIG_OF, remove platform dataStephen Warren2013-02-241-74/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Rework the driver to parse the device tree directly into struct sdhci_tegra. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Chris Ball <cjb@laptop.org>
| * | | | mmc: add DT bindings for more MMC capability flagsGuennadi Liakhovetski2013-02-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many MMC capability flags are platform-dependent and are traditionally set in platform data. With DT often each such capability requires a special binding. Add bindings for MMC_CAP_SD_HIGHSPEED, MMC_CAP_MMC_HIGHSPEED, MMC_CAP_POWER_OFF_CARD and MMC_CAP_SDIO_IRQ capabilities. Also add code to DT parser to look up "keep-power-in-suspend" and "enable-sdio-wakeup" bindings and set MMC_PM_KEEP_POWER and MMC_PM_WAKE_SDIO_IRQ respectively, if found. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Chris Ball <cjb@laptop.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-14 03:40:53 +0100