linux - linux

	Commit message (Expand)	Author	Files	Lines
2021-06-30	clk: lmk04832: Fix spelling mistakes in dev_err messages and comments	Colin Ian King	1	-4/+4
2021-06-30	clk: lmk04832: fix return value check in lmk04832_probe()	Wang Hai	1	-6/+6
2021-06-30	clk: stm32mp1: fix missing spin_lock_init()	Wang Hai	1	-0/+1
2021-06-29	clk: zynqmp: Handle divider specific read only flag	Rajan Vaja	1	-1/+9
2021-06-29	clk: zynqmp: Use firmware specific mux clock flags	Rajan Vaja	2	-1/+30
2021-06-29	clk: zynqmp: Use firmware specific divider clock flags	Rajan Vaja	2	-1/+33
2021-06-29	clk: zynqmp: Use firmware specific common clock flags	Rajan Vaja	6	-6/+52
2021-06-29	clk: lmk04832: Use of match table	Stephen Boyd	1	-2/+4
2021-06-29	clk: lmk04832: Depend on SPI	Stephen Boyd	1	-0/+1
2021-06-29	clk: stm32mp1: new compatible for secure RCC support	Gabriel Fernandez	2	-1/+110
2021-06-29	dt-bindings: clock: stm32mp1 new compatible for secure rcc	Gabriel Fernandez	1	-2/+4
2021-06-29	dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15	Gabriel Fernandez	1	-0/+2
2021-06-29	dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15	Gabriel Fernandez	1	-0/+13
2021-06-29	dt-bindings: clock: add IDs for SCMI clocks on stm32mp15	Gabriel Fernandez	1	-0/+27
2021-06-29	reset: stm32mp1: remove stm32mp1 reset	Gabriel Fernandez	3	-122/+0
2021-06-28	clk: hisilicon: Add clock driver for hi3559A SoC	Dongjiu Geng	5	-2/+856
2021-06-28	dt-bindings: Document the hi3559a clock bindings	Dongjiu Geng	2	-0/+224
2021-06-28	clk: si5341: Add sysfs properties to allow checking/resetting device faults	Robert Hancock	1	-0/+96
2021-06-28	clk: si5341: Add silabs,iovdd-33 property	Robert Hancock	1	-1/+9
2021-06-28	clk: si5341: Add silabs,xaxb-ext-clk property	Robert Hancock	1	-2/+7
2021-06-28	clk: si5341: Allow different output VDD_SEL values	Robert Hancock	1	-26/+110
2021-06-28	clk: si5341: Update initialization magic	Robert Hancock	1	-1/+3
2021-06-28	clk: si5341: Check for input clock presence and PLL lock on startup	Robert Hancock	1	-0/+26
2021-06-28	clk: si5341: Avoid divide errors due to bogus register contents	Robert Hancock	1	-2/+13
2021-06-28	clk: si5341: Wait for DEVICE_READY on startup	Robert Hancock	1	-0/+32
2021-06-28	dt-bindings: clock: clk-si5341: Add new attributes	Robert Hancock	1	-6/+10
2021-06-28	drivers: ti: remove redundant error message in adpll.c	Yu Jiahua	1	-4/+1
2021-06-28	dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible	Alain Volmat	1	-0/+3
2021-06-28	clk: st: clkgen-fsyn: embed soc clock outputs within compatible data	Alain Volmat	1	-12/+101
2021-06-28	dt-bindings: clock: st: clkgen-pll: add new introduced compatible	Alain Volmat	1	-0/+3
2021-06-28	clk: st: clkgen-pll: embed soc clock outputs within compatible data	Alain Volmat	1	-14/+106
2021-06-28	dt-bindings: clock: st: flexgen: add new introduced compatible	Alain Volmat	1	-0/+10
2021-06-28	clk: st: flexgen: embed soc clock outputs within compatible data	Alain Volmat	1	-14/+353
2021-06-28	clk: st: clkgen-pll: remove unused variable of struct clkgen_pll	Alain Volmat	1	-1/+0
2021-06-28	clk: ingenic: Add support for the JZ4760	Paul Cercueil	5	-0/+495
2021-06-28	clk: ingenic: Support overriding PLLs M/N/OD calc algorithm	Paul Cercueil	2	-13/+30
2021-06-28	clk: ingenic: Remove pll_info.no_bypass_bit	Paul Cercueil	3	-8/+6
2021-06-28	clk: ingenic: Read bypass register only when there is one	Paul Cercueil	1	-8/+11
2021-06-28	clk: Support bypassing dividers	Paul Cercueil	5	-29/+42
2021-06-28	dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles	Paul Cercueil	1	-0/+4
2021-06-28	clk: qcom: clk-alpha-pll: fix CAL_L write in alpha_pll_fabia_prepare	Jonathan Marek	1	-1/+1
2021-06-28	clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC	Cristian Ciocaltea	1	-1/+16
2021-06-28	dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC	Cristian Ciocaltea	1	-2/+4
2021-06-28	clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC	Cristian Ciocaltea	1	-8/+11
2021-06-28	clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC	Cristian Ciocaltea	1	-15/+29
2021-06-28	clk: actions: Fix SD clocks factor table on Owl S500 SoC	Cristian Ciocaltea	1	-4/+2
2021-06-28	clk: actions: Fix UART clock dividers on Owl S500 SoC	Cristian Ciocaltea	1	-6/+6
2021-06-28	clk: bd718xx: Drop BD70528 support	Matti Vaittinen	2	-12/+5
2021-06-28	clk: stm32mp1: move RCC reset controller into RCC clock driver	Gabriel Fernandez	1	-13/+144
2021-06-28	clk: stm32mp1: convert to module driver	Gabriel Fernandez	1	-43/+78