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* [PATCH] semaphore: Remove __MUTEX_INITIALIZER()Arthur Othieno2005-10-311-2/+0
| | | | | | | | | __MUTEX_INITIALIZER() has no users, and equates to the more commonly used DECLARE_MUTEX(), thus making it pretty much redundant. Remove it for good. Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] vm: remove unused/broken page_pte[_prot] macrosTejun Heo2005-10-311-3/+0
| | | | | | | | | | | | | | | | | | | | | | | This patch removes page_pte_prot and page_pte macros from all architectures. Some architectures define both, some only page_pte (broken) and others none. These macros are not used anywhere. page_pte_prot(page, prot) is identical to mk_pte(page, prot) and page_pte(page) is identical to page_pte_prot(page, __pgprot(0)). * The following architectures define both page_pte_prot and page_pte arm, arm26, ia64, sh64, sparc, sparc64 * The following architectures define only page_pte (broken) frv, i386, m32r, mips, sh, x86-64 * All other architectures define neither Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] unify sys_ptrace prototypeChristoph Hellwig2005-10-311-2/+0
| | | | | | | | | | Make sure we always return, as all syscalls should. Also move the common prototype to <linux/syscalls.h> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Miklos Szeredi <miklos@szeredi.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mm: tlb_finish_mmu forget rssHugh Dickins2005-10-301-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | zap_pte_range has been counting the pages it frees in tlb->freed, then tlb_finish_mmu has used that to update the mm's rss. That got stranger when I added anon_rss, yet updated it by a different route; and stranger when rss and anon_rss became mm_counters with special access macros. And it would no longer be viable if we're relying on page_table_lock to stabilize the mm_counter, but calling tlb_finish_mmu outside that lock. Remove the mmu_gather's freed field, let tlb_finish_mmu stick to its own business, just decrement the rss mm_counter in zap_pte_range (yes, there was some point to batching the update, and a subsequent patch restores that). And forget the anal paranoia of first reading the counter to avoid going negative - if rss does go negative, just fix that bug. Remove the mmu_gather's flushes and avoided_flushes from arm and arm26: no use was being made of them. But arm26 alone was actually using the freed, in the way some others use need_flush: give it a need_flush. arm26 seems to prefer spaces to tabs here: respect that. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mm: tlb_is_full_mm was obscureHugh Dickins2005-10-301-6/+0
| | | | | | | | | | | | | | | | tlb_is_full_mm? What does that mean? The TLB is full? No, it means that the mm's last user has gone and the whole mm is being torn down. And it's an inline function because sparc64 uses a different (slightly better) "tlb_frozen" name for the flag others call "fullmm". And now the ptep_get_and_clear_full macro used in zap_pte_range refers directly to tlb->fullmm, which would be wrong for sparc64. Rather than correct that, I'd prefer to scrap tlb_is_full_mm altogether, and change sparc64 to just use the same poor name as everyone else - is that okay? Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mm: tlb_gather_mmu get_cpu_varHugh Dickins2005-10-301-2/+4
| | | | | | | | | | | | | tlb_gather_mmu dates from before kernel preemption was allowed, and uses smp_processor_id or __get_cpu_var to find its per-cpu mmu_gather. That works because it's currently only called after getting page_table_lock, which is not dropped until after the matching tlb_finish_mmu. But don't rely on that, it will soon change: now disable preemption internally by proper get_cpu_var in tlb_gather_mmu, put_cpu_var in tlb_finish_mmu. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] add sem_is_read/write_locked()Rik Van Riel2005-10-301-0/+5
| | | | | | | | | | Add sem_is_read/write_locked functions to the read/write semaphores, along the same lines of the *_is_locked spinlock functions. The swap token tuning patch uses sem_is_read_locked; sem_is_write_locked is added for completeness. Signed-off-by: Rik van Riel <riel@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge branch 'release' of ↵Linus Torvalds2005-10-2918-94/+167
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
| * Pull fix-slow-tlb-purge into release branchTony Luck2005-10-291-1/+1
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| | * [IA64] - Avoid slow TLB purges on SGI Altix systemsDean Roe2005-10-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush_tlb_all() can be a scaling issue on large SGI Altix systems since it uses the global call_lock and always executes on all cpus. When a process enters flush_tlb_range() to purge TLBs for another process, it is possible to avoid flush_tlb_all() and instead allow sn2_global_tlb_purge() to purge TLBs only where necessary. This patch modifies flush_tlb_range() so that this case can be handled by platform TLB purge functions and updates ia64_global_tlb_purge() accordingly. sn2_global_tlb_purge() now calculates the region register value from the mm argument introduced with this patch. Signed-off-by: Dean Roe <roe@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | Pull xpc-disengage into release branchTony Luck2005-10-291-2/+12
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| | * | [IA64-SGI] fixes for XPC disengage and open/close protocolDean Nelson2005-10-261-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses a few issues with the open/close protocol that were revealed by the newly added disengage functionality combined with more extensive testing. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | [IA64-SGI] get XPC to cleanly disengage from remote memory referencesDean Nelson2005-09-071-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When XPC is being shutdown (i.e., rmmod, reboot) it doesn't ensure that other partitions with whom it was connected have completely disengaged from any attempt at cross-partition memory references. This can lead to MCAs in any of these other partitions when the partition is reset. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | Pull sparsemem-v5 into release branchTony Luck2005-10-285-9/+33
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| | * | | [PATCH] V5 ia64 SPARSEMEM - conditional changes for SPARSEMEMBob Picco2005-10-045-9/+33
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the conditional changes required for the three memory models. With [patch 1/4] there are three memory models; FLATMEM, DISCONTIG and SPARSEMEM. Also a new arch include file sparemem.h is introduced for defining SPARSEMEM parameters. Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | Pull remove-sn-bist-lock into release branchTony Luck2005-10-282-3/+0
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| | * | | [IA64-SGI] Remove references to the SN bist_lockDean Roe2005-10-042-3/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove all references to the bist_lock in the SN code as it is not used for anything. Signed-off-by: Dean Roe <roe@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | Pull new-efi-memmap into release branchTony Luck2005-10-281-1/+3
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| | * | | [IA64] simplified efi memory map parsingTony Luck2005-09-081-1/+3
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New version leaves the original memory map unmodified. Also saves any granule trimmings for use by the uncached memory allocator. Inspired by Khalid Aziz (various traces of his patch still remain). Fixes to uncached_build_memmap() and sn2 testing by Martin Hicks. Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | Pull define-node-cleanup into release branchTony Luck2005-10-286-56/+33
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| | * | | [IA64-SGI] Increase max system size of SGI SN systemsJack Steiner2005-09-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Increase the maximum system size of SGI SN systems. Note that this is not the maximum SSI size. The maximum system size is the number of nodes in the numalink domain. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64] Cleanup use of various #defines related to nodesJack Steiner2005-09-166-56/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the SN code & #defines related to compact nodes & IO discovery have gotten stale over the years. This patch attempts to clean them up. Some of the various SN MAX_xxx #defines were also unclear & misused. The primary changes are: - use MAX_NUMNODES. This is the generic linux #define for the number of nodes that are known to the generic kernel. Arrays & loops for constructs that are 1:1 with linux-defined nodes should use the linux #define - not an SN equivalent. - use MAX_COMPACT_NODES for MAX_NUMNODES + NUM_TIOS. This is the number of nodes in the SSI system. Compact nodes are a hack to get around the IA64 architectural limit of 256 nodes. Large SGI systems have more than 256 nodes. When we upgrade to ACPI3.0, I _hope_ that all nodes will be real nodes that are known to the generic kernel. That will allow us to delete the notion of "compact nodes". - add MAX_NUMALINK_NODES for the total number of nodes that are in the numalink domain - all partitions. - simplified (understandable) scan_for_ionodes() - small amount of cleanup related to cnodes Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull sn_pci_legacy_read-write into release branchTony Luck2005-10-281-1/+1
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| | * | | | [IA64-SGI] fix sn_pci_legacy_read/fix sn_pci_legacy_writeMark Maule2005-09-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a #define for SN_SAL_IOIF_PCI_SAFE and makes that the preferred method of implementing sn_pci_legacy_read() and sn_pci_legacy_write(). This SAL call has been present in SGI proms since version 4.10. If the SN_SAL_IOIF_PCI_SAFE call fails, revert to the previous code for compatability with older proms. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | Pull hp-machvec into release branchTony Luck2005-10-282-13/+11
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| | * | | | | [IA64] more robust zx1/sx1000 machvec supportAlex Williamson2005-09-152-13/+11
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Machine vector selection has always been a bit of a hack given how early in system boot it needs to be done. Services like ACPI namespace are not available and there are non-trivial problems to moving them to early boot. However, there's no reason we can't change to a different machvec later in boot when the services we need are available. By adding a entry point for later initialization of the swiotlb, we can add an error path for the hpzx1 machevec initialization and fall back to the DIG machine vector if IOMMU hardware isn't found in the system. Since ia64 uses 4GB for zone DMA (no ISA support), it's trivial to allocate a contiguous range from the slab for bounce buffer usage. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | Pull altix-mmr into release branchTony Luck2005-10-282-7/+16
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| | * | | | | [IA64-SGI] volatile semantics in places where it seems necessaryMark Maule2005-09-082-7/+16
| | | |_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Resend using accessors instead of volatile qualifiers per hch comments, and easier to understand convenience macros per rja comments. Patch to apply volatile semantics when accessing MMR's in various SN files. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | Pull altix-fpga-reset into release branchTony Luck2005-10-283-1/+57
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| | * | | | [IA64] Altix patch for fpga resetBruce Losure2005-09-063-1/+57
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) workaround a h/w reset issue 2) to improve the determination of FPGA-based h/w in the arch/ia64/sn/kernel/tiocx code. Signed-off-by: Bruce Losure <blosure@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | / / / [PATCH] gfp_t: dma-mapping (ia64)Al Viro2005-10-281-1/+1
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | ... and related annotations for amd64 - swiotlb code is shared, but prototypes are not. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | / [PATCH] ia64 basic __user annotationsAl Viro2005-09-291-6/+6
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | - document places where we pass kernel address to low-level primitive that deals with kernel/user addresses - uintptr_t is unsigned long, not long Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [IA64] Wire in the MCA/INIT handler stacksKeith Owens2005-09-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire the MCA/INIT handler stacks into DTR[2] and track them in IA64_KR(CURRENT_STACK). This gives the MCA/INIT handler stacks the same TLB status as normal kernel stacks. Reload the old CURRENT_STACK data on return from OS to SAL. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | [PATCH] Remove unused var from asm/futex.hPaolo 'Blaisorblade' Giarrusso2005-09-221-1/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As recently done by Russell King for ARM, commit 4732efbeb997189d9f9b04708dc26bf8613ed721 introduces a generic asm/futex.h copied along most arches, which includes a "-ENOSYS support" to be changed if needed. However, it includes an unused var (taken from the "real" version) which GCC warns about. Remove it from all arches having that file version (i.e. same GIT id). $ git-diff-tree -r HEAD and $ git-ls-tree -r HEAD include/|grep 9feff4ce1424bc390608326240be369eb13aa648 may be more interesting than looking at the patch itself, to make sure I've just copied the arm header to all other archs having the original dummy version of this file. Cc: Jakub Jelinek <jakub@redhat.com> Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Pull fix-offsets-h into release branchTony Luck2005-09-142-0/+9
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| * | [IA64] fix circular dependency on generation of asm-offsets.hTony Luck2005-09-132-0/+9
| | | | | | | | | | | | | | | | | | Fix? One ugly hack is replaced by a different ugly hack. Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | [PATCH] feature removal of io_remap_page_range()Randy Dunlap2005-09-131-4/+0
|/ / | | | | | | | | | | | | | | | | As written in Documentation/feature-removal-schedule.txt, remove the io_remap_page_range() kernel API. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Pull sn-features into release branchTony Luck2005-09-112-9/+84
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| * | [IA64-SGI] Add new vendor-specific SAL calls for:Jack Steiner2005-08-312-9/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - notifying the PROM of specific features that are supported by the OS. This is used to enable PROM feature if and only if the corresponding feature is implemented in the OS - fetch feature sets that are supported by the current PROM. This allows the OS to selectively enable features when the PROM support is available. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | [IA64] MCA/INIT: remove obsolete unwind codeKeith Owens2005-09-111-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | Delete the special case unwind code that was only used by the old MCA/INIT handler. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | [PATCH] MCA/INIT: use per cpu stacksKeith Owens2005-09-112-136/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bulk of the change. Use per cpu MCA/INIT stacks. Change the SAL to OS state (sos) to be per process. Do all the assembler work on the MCA/INIT stacks, leaving the original stack alone. Pass per cpu state data to the C handlers for MCA and INIT, which also means changing the mca_drv interfaces slightly. Lots of verification on whether the original stack is usable before converting it to a sleeping process. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | [IA64] MCA/INIT: add an extra thread_info flagKeith Owens2005-09-112-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add an extra thread_info flag to indicate the special MCA/INIT stacks. Mainly for debuggers. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | [PATCH] spinlock consolidationIngo Molnar2005-09-102-43/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (written by me and also containing many suggestions of Arjan van de Ven) does a major cleanup of the spinlock code. It does the following things: - consolidates and enhances the spinlock/rwlock debugging code - simplifies the asm/spinlock.h files - encapsulates the raw spinlock type and moves generic spinlock features (such as ->break_lock) into the generic code. - cleans up the spinlock code hierarchy to get rid of the spaghetti. Most notably there's now only a single variant of the debugging code, located in lib/spinlock_debug.c. (previously we had one SMP debugging variant per architecture, plus a separate generic one for UP builds) Also, i've enhanced the rwlock debugging facility, it will now track write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too. All locks have lockup detection now, which will work for both soft and hard spin/rwlock lockups. The arch-level include files now only contain the minimally necessary subset of the spinlock code - all the rest that can be generalized now lives in the generic headers: include/asm-i386/spinlock_types.h | 16 include/asm-x86_64/spinlock_types.h | 16 I have also split up the various spinlock variants into separate files, making it easier to see which does what. The new layout is: SMP | UP ----------------------------|----------------------------------- asm/spinlock_types_smp.h | linux/spinlock_types_up.h linux/spinlock_types.h | linux/spinlock_types.h asm/spinlock_smp.h | linux/spinlock_up.h linux/spinlock_api_smp.h | linux/spinlock_api_up.h linux/spinlock.h | linux/spinlock.h /* * here's the role of the various spinlock/rwlock related include files: * * on SMP builds: * * asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the * initializers * * linux/spinlock_types.h: * defines the generic type and initializers * * asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel * implementations, mostly inline assembly code * * (also included on UP-debug builds:) * * linux/spinlock_api_smp.h: * contains the prototypes for the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. * * on UP builds: * * linux/spinlock_type_up.h: * contains the generic, simplified UP spinlock type. * (which is an empty structure on non-debug builds) * * linux/spinlock_types.h: * defines the generic type and initializers * * linux/spinlock_up.h: * contains the __raw_spin_*()/etc. version of UP * builds. (which are NOPs on non-debug, non-preempt * builds) * * (included on UP-non-debug builds:) * * linux/spinlock_api_up.h: * builds the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. */ All SMP and UP architectures are converted by this patch. arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should be mostly fine. From: Grant Grundler <grundler@parisc-linux.org> Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU). Builds 32-bit SMP kernel (not booted or tested). I did not try to build non-SMP kernels. That should be trivial to fix up later if necessary. I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids some ugly nesting of linux/*.h and asm/*.h files. Those particular locks are well tested and contained entirely inside arch specific code. I do NOT expect any new issues to arise with them. If someone does ever need to use debug/metrics with them, then they will need to unravel this hairball between spinlocks, atomic ops, and bit ops that exist only because parisc has exactly one atomic instruction: LDCW (load and clear word). From: "Luck, Tony" <tony.luck@intel.com> ia64 fix Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjanv@infradead.org> Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Cc: Matthew Wilcox <willy@debian.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se> Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild Linus Torvalds2005-09-102-2/+2
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| * | | kbuild: m68k,parisc,ppc,ppc64,s390,xtensa use generic asm-offsets.h supportSam Ravnborg2005-09-092-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Delete obsoleted parts form arch makefiles and rename to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* | | | [PATCH] Prefetch kernel stacks to speed up context switchChen, Kenneth W2005-09-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For architecture like ia64, the switch stack structure is fairly large (currently 528 bytes). For context switch intensive application, we found that significant amount of cache misses occurs in switch_to() function. The following patch adds a hook in the schedule() function to prefetch switch stack structure as soon as 'next' task is determined. This allows maximum overlap in prefetch cache lines for that structure. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | Merge branch 'release' of ↵Linus Torvalds2005-09-092-8/+0
|\ \ \ \ | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6
| * | | | [IA64] Manual merge fix for 3 filesTony Luck2005-09-0813-153/+84
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/ia64/Kconfig arch/ia64/kernel/acpi.c include/asm-ia64/irq.h Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | [IA64] Minor cleanups - remove unnecessary function prototype in iosapic.hKenji Kaneshige2005-09-071-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function prototypes for iosapic_enable_intr() and iosapic_pci_fixup() in include/asm-ia64/iosapic.h are no longer needed. This patch removes them. The original patch has been posted by Satoru Takeuchi. Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | [IA64] Minor cleanups - remove CONFIG_ACPI_DEALLOCATE_IRQKenji Kaneshige2005-09-071-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The config option 'CONFIG_ACPI_DEALLOCATE_IRQ' is no longer needed. This patch removes it. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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