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* It's UTF-8Alexey Dobriyan2006-03-221-1/+1
| | | | | | | Fix some comments to "UTF-8". Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/usb-2.6Linus Torvalds2006-03-211-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/gregkh/usb-2.6: (81 commits) [PATCH] USB: omninet: fix up debugging comments [PATCH] USB serial: add navman driver [PATCH] USB: Fix irda-usb use after use [PATCH] USB: rtl8150 small fix [PATCH] USB: ftdi_sio: add Icom ID1 USB product and vendor ids [PATCH] USB: cp2101: add new device IDs [PATCH] USB: fix check_ctrlrecip to allow control transfers in state ADDRESS [PATCH] USB: vicam.c: fix a NULL pointer dereference [PATCH] USB: ZC0301 driver bugfix [PATCH] USB: add support for Creativelabs Silvercrest USB keyboard [PATCH] USB: storage: new unusual_devs.h entry: Mitsumi 7in1 Card Reader [PATCH] USB: storage: unusual_devs.h entry 0420:0001 [PATCH] USB: storage: another unusual_devs.h entry [PATCH] USB: storage: sandisk unusual_devices entry [PATCH] USB: fix initdata issue in isp116x-hcd [PATCH] USB: usbcore: usb_set_configuration oops (NULL ptr dereference) [PATCH] USB: usbcore: Don't assume a USB configuration includes any interfaces [PATCH] USB: ub 03 drop stall clearing [PATCH] USB: ub 02 remove diag [PATCH] USB: ub 01 remove first_open ...
| * [PATCH] USB: EHCI for AU1200Jordan Crouse2006-03-201-0/+4
| | | | | | | | | | | | | | | | | | | | ALCHEMY: Add EHCI support for AU1200 Updated by removing the OHCI support Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | [MIPS] War on whitespace: cleanup initial spaces followed by tabs.Ralf Baechle2006-03-214-9/+9
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Reformat __xchg().Ralf Baechle2006-03-211-4/+4
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Remove CONFIG_BUILD_ELF64.Ralf Baechle2006-03-213-27/+4
| | | | | | | | | | | | | | This option is no longer usable with supported compilers. It will be replaced by usage of -msym32 in a separate patch. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Further sparsification for 32-bit compat code.Atsushi Nemoto2006-03-211-4/+4
| | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Signal cleanupAtsushi Nemoto2006-03-211-1/+19
| | | | | | | | | | | | | | | | | | Move function prototypes to asm/signal.h to detect trivial errors and add some __user tags to get rid of sparse warnings. Generated code should not be changed. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Make I/O helpers more customizableAtsushi Nemoto2006-03-214-57/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Move ioswab*() and __mem_ioswab*() to mangle-port.h. This gets rid of CONFIG_SGI_IP22 from include/asm-mips/io.h. 2. Pass a virtual address to *ioswab*(). Then we can provide mach-specific *ioswab*() and can do every evil thing based on its argument. It could be useful on machines which have regions with different endian conversion scheme. 3. Call __swizzle_addr*() _after_ adding mips_io_port_base. This unifies the meaning of the argument of __swizzle_addr*() (always virtual address). Then mach-specific __swizzle_addr*() can do every evil thing based on the argument. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] sc-rm7k.c cleanupAtsushi Nemoto2006-03-211-0/+1
| | | | | | | | | | | | | | | | Use blast_scache_range, blast_inv_scache_range for rm7k scache routine. Output code should be logically same. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] MIPS64 R2 optimizations for 64-bit endianess swapping.Ralf Baechle2006-03-211-0/+18
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Add early console for Cobalt.Peter Horton2006-03-211-0/+2
|/ | | | | Signed-off-by: Peter Horton <pdh@colonel-panic.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fix race in sb1250_gettimeoffset().Ralf Baechle2006-03-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | From Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>: sb1250_gettimeoffset() simply reads the current cpu 0 timer remaining value, however once this counter reaches 0 and the interrupt is raised, it immediately resets and begins to count down again. If sb1250_gettimeoffset() is called on cpu 1 via do_gettimeofday() after the timer has reset but prior to cpu 0 processing the interrupt and taking write_seqlock() in timer_interrupt() it will return a full value (or close to it) causing time to jump backwards 1ms. Once cpu 0 handles the interrupt and timer_interrupt() gets far enough along it will jump forward 1ms. Fix this problem by implementing mips_hpt_*() on sb1250 using a spare timer unrelated to the existing periodic interrupt timers. It runs at 1Mhz with a full 23bit counter. This eliminated the custom do_gettimeoffset() for sb1250 and allowed use of the generic fixed_rate_gettimeoffset() using mips_hpt_*() and timerhi/timerlo. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fix M_SCD_TIMER_INIT and M_SCD_TIMER_CNT wrong field width.Ralf Baechle2006-03-181-2/+3
| | | | | | | | From Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>: Field width should be 23 bits not 20 bits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Work around bad code generation for <asm/io.h>.Ralf Baechle2006-03-181-3/+15
| | | | | | | | | If a call to set_io_port_base() was being followed by usage of mips_io_port_base in the same function gcc was possibly using the old value due to some clever abuse of const. Adding a barrier will keep the optimization and result in correct code with latest gcc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto2006-03-183-1/+6
| | | | | | | | | | If dcache_size != icache_size or dcache_size != scache_size, or set-associative cache, icache/scache does not flushed properly. Make blast_?cache_page_indexed() masks its index value correctly. Also, use physical address for physically indexed pcache/scache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SB1: Fix interrupt disable hazard.Ralf Baechle2006-03-181-77/+103
| | | | | | | The SB1 core has a three cycle interrupt disable hazard but we were wrongly treating it as fully interlocked. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Undefine scr_writew and scr_readw in <asm/vga.h>.Ralf Baechle2006-03-091-0/+3
| | | | | | | This is gluing the build of cirrusfb but really the mess that would need cleaning and fixing is <video/vga.h> and <linux/vt_buffer.h> ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix build error on processors that don's support copy-on-write.Ralf Baechle2006-02-281-0/+18
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix atomic*_sub_if_positive return value.Ralf Baechle2006-02-271-0/+12
| | | | | | | Reported and initial fix by Thomas Koeller <thomas.koeller@baslerweb.com>, rewritten by me. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SMP: Fix initialization order bug.Ralf Baechle2006-02-271-2/+9
| | | | | | | | | | | | | | A recent change requires cpu_possible_map to be initialized before smp_sched_init() but most MIPS platforms were initializing their processors in the prom_prepare_cpus callback of smp_prepare_cpus. The simple fix of calling prom_prepare_cpus from one of the earlier SMP initialization hooks doesn't work well either since IPIs may require init_IRQ() to have completed, so bit the bullet and split prom_prepare_cpus into two initialization functions, plat_smp_setup which is called early from setup_arch and plat_prepare_cpus called where prom_prepare_cpus used to be called. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Use "=R" constraint to avoid compiler errors in cmpxchg().Ralf Baechle2006-02-271-4/+4
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Follow Uli's latest *at syscall changes.Ralf Baechle2006-02-211-3/+3
| | | | | | | (This really is only the half of the patch which was forgotten in 326a625748535c4cdb1c632b1dcb07030989a393 ...) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fixes for uaccess.h with gcc >= 4.0.1Atsushi Nemoto2006-02-211-3/+3
| | | | | | | | | | It seems current get_user() incorrectly sign-extend an unsigned int value on 64bit kernel. I think this is because '(__typeof__(val))' cast in final assignment. I suppose the cast should be '(__typeof__(*(addr))'. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] add asm-generic/mman.hMichael S. Tsirkin2006-02-161-10/+12
| | | | | | | | | | | | | | Make new MADV_REMOVE, MADV_DONTFORK, MADV_DOFORK consistent across all arches. The idea is to make it possible to use them portably even before distros include them in libc headers. Move common flags to asm-generic/mman.h Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Cc: Roland Dreier <rolandd@cisco.com> Cc: Badari Pulavarty <pbadari@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] madvise MADV_DONTFORK/MADV_DOFORKMichael S. Tsirkin2006-02-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Currently, copy-on-write may change the physical address of a page even if the user requested that the page is pinned in memory (either by mlock or by get_user_pages). This happens if the process forks meanwhile, and the parent writes to that page. As a result, the page is orphaned: in case of get_user_pages, the application will never see any data hardware DMA's into this page after the COW. In case of mlock'd memory, the parent is not getting the realtime/security benefits of mlock. In particular, this affects the Infiniband modules which do DMA from and into user pages all the time. This patch adds madvise options to control whether memory range is inherited across fork. Useful e.g. for when hardware is doing DMA from/into these pages. Could also be useful to an application wanting to speed up its forks by cutting large areas out of consideration. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Acked-by: Hugh Dickins <hugh@veritas.com> Cc: Michael Kerrisk <mtk-manpages@gmx.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [MIPS] Fix CPU type bitmasks for MIPS III, IV and V.Maciej W. Rozycki2006-02-141-3/+3
| | | | | Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Get rid of kludgery needed to keep stdargs of old compilers working.Ralf Baechle2006-02-141-17/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] More uaccess.h fixes with gcc >= 4.0.1.Ralf Baechle2006-02-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Richard Sandiford <richard@codesourcery.com>: This patch caused a miscompilation of the restore_gp_regs() block in restore_sigcontext(). This was in a 32-bit kernel compiled with GCC CVS head. restore_gp_regs() copies 64-bit user fields into 32-bit variables, and in this combination, the new __get_user_asm_ll32() clobbers too many registers. It says: /* * Get a long long 64 using 32 bit registers. */ { \ __asm__ __volatile__( \ "1: lw %1, (%3) \n" \ "2: lw %D1, 4(%3) \n" \ " move %0, $0 \n" \ "3: .section .fixup,\"ax\" \n" \ "4: li %0, %4 \n" \ " move %1, $0 \n" \ " move %D1, $0 \n" \ " j 3b \n" \ " .previous \n" \ " .section __ex_table,\"a\" \n" \ " " __UA_ADDR " 1b, 4b \n" \ " " __UA_ADDR " 2b, 4b \n" \ " .previous \n" \ : "=r" (__gu_err), "=&r" (val) \ : "0" (0), "r" (addr), "i" (-EFAULT)); \ } and this requires val (%1) to be a 64-bit value. In the case I saw, gcc was using $3 for the 32-bit val, and wasn't expecting $4 to be clobbered. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add protected_blast_icache_range, blast_icache_range, etc.Atsushi Nemoto2006-02-141-33/+41
| | | | | | | | | | Add blast_xxx_range(), protected_blast_xxx_range() etc. for common use. They are built by __BUILD_BLAST_CACHE_RANGE(). Use protected_cache_op() macro for various protected_ routines. Output code should be logically same. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fold non-__mips64 case into CONFIG_32BIT case.Ralf Baechle2006-02-141-3/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] RM200: Give RM200 it's own timex.h.Ralf Baechle2006-02-142-10/+14
| | | | | | | So we can get rid of config.h and the #ifdef crapola in the generic timex.h. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2006-02-084-10/+62
|\
| * [MIPS] Add 'const' to readb and friendsAtsushi Nemoto2006-02-081-1/+1
| | | | | | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
| * [MIPS] Wire up new syscalls.Ralf Baechle2006-02-081-7/+57
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
| * [MIPS] Make do_signal return void.Ralf Baechle2006-02-081-1/+1
| | | | | | | | | | | | | | | | It's return value is ignored everywhere. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
| * [MIPS] Add support for TIF_RESTORE_SIGMASK.Ralf Baechle2006-02-082-2/+4
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
* | [PATCH] mips: namespace pollution - mem_... -> __mem_... in io.hAl Viro2006-02-081-16/+16
|/ | | | | | | A pile of internal functions use only inside mips io.h has names starting with mem_... and clashing with names in drivers; renamed to __mem_.... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* [PATCH] remove bogus asm/bug.h includes.Al Viro2006-02-081-1/+0
| | | | | | | A bunch of asm/bug.h includes are both not needed (since it will get pulled anyway) and bogus (since they are done too early). Removed. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* [MIPS] TX49x7: Fix reporting of the CPU name and PCI clockSergei Shtylylov2006-02-071-0/+10
| | | | | | | | | | | | | I've noticed that PCI clock was incorrectly reported as 66 MHz while being mere 33 MHz on RBTX4937 board -- this was due to the different encoding of the PCI divisor field in CCFG register between TX4927 and TX4937 chips... Also, RBTX49x7 was printed out as a CPU name (e.g., "CPU is RBTX4937"); and some debug printk() were duplicating each other... Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] TX49 MFC0 bug workaroundAtsushi Nemoto2006-02-071-6/+17
| | | | | | | | | | | | | | If mfc0 $12 follows store and the mfc0 is last instruction of a page and fetching the next instruction causes TLB miss, the result of the mfc0 might wrongly contain EXL bit. ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008 Workaround: mask EXL bit of the result or place a nop before mfc0. It doesn't harm to always clear those bits, so we change the code to do so. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] MIPS R2 optimized endianess swapping.Ralf Baechle2006-02-071-0/+29
| | | | | | From Franck Bui-Huu <vagabon.xyz@gmail.com> with modifications by me. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove buggy inline version of memscan.Ralf Baechle2006-02-071-22/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove wrong __user tags.Atsushi Nemoto2006-02-071-2/+1
| | | | | | | This fixes sparse warnings 'dereference of noderef expression'. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Cleanup fls implementation.Ralf Baechle2006-02-071-26/+32
| | | | | | | fls was the only called of flz, so fold flz into fls, same for the __ilog2 call. Delete the now unused flz function. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] local_irq_restore wasn't safe to be used in other macros mode.Ralf Baechle2006-02-071-2/+2
| | | | | | It always left the assembler in reorder mode possibly causing disaster. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Build blast_cache routines from templateAtsushi Nemoto2006-02-071-350/+50
| | | | | | | | | Build blast_xxx, blast_xxx_page, blast_xxx_page_indexed from template. Easier to maintaina and saves 300 lines. Generated code should be unchanged. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Au1200: Make KGDB compileSergei Shtylylov2006-02-071-0/+4
| | | | | | | | AMD Au1200 SOC just doesn't have UART3, so KGDB won't even compile for it as is, here's the fix to make KGDB use UART1. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] TX49x7: Fix timer register #define'sSergei Shtylylov2006-02-071-11/+10
| | | | | | | | Fix the #define's for TX4927/37 timer reg's to match the datasheets (those Signed-off-by: Konstantin Baydarov <kbaidarov@mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Bullet proof uaccess.h against 4.0.1 miss-compilation.Ralf Baechle2006-02-071-35/+36
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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