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* sh: Move zero page param defs somewhere sensible.Paul Mundt2007-10-301-0/+14
| | | | | | Follows s390 and others. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use generic SMP_CACHE_BYTES/L1_CACHE_ALIGN.Paul Mundt2007-10-302-4/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Correct pte_page() breakage.Paul Mundt2007-10-302-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As noted by David: pte_page() is a macro defined as follows; include/asm-sh/pgtable.h #define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) include/asm-sh/page.h #define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) So as you can see the phys_to_page() macro doesn't wrap the 'phys' parameter in parentheses so we end up with; pte_val(x)&PTE_PHYS_MASK >> PAGE_SHIFT Which is not what we wanted as '>>' has a higher precedence than bitwise AND. I dug into the git repository and I believe this bug was added with this commit (104b8deaa5c0144cccfc7d914413ff80c7176af1); 2006-03-27 KAMEZAWA Hiroyuki [PATCH] unify pfn_to_page: sh pfn_to_page -#define phys_to_page(phys) (mem_map + (((phys)-__MEMORY_START) >> PAGE_SHIFT)) -#define page_to_phys(page) (((page - mem_map) << PAGE_SHIFT) + __MEMORY_START) +#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) +#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) Reported-by: David ADDISON <david.addison@st.com> Reported-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh/sh64: fixup dma-mapping for new sg layoutJens Axboe2007-10-231-7/+5
| | | | Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* Add CONFIG_DEBUG_SG sg validationJens Axboe2007-10-221-0/+3
| | | | | | | Add a Kconfig entry which will toggle some sanity checks on the sg entry and tables. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* Change table chaining layoutJens Axboe2007-10-221-1/+1
| | | | | | | | | | | | | | | | | Change the page member of the scatterlist structure to be an unsigned long, and encode more stuff in the lower bits: - Bits 0 and 1 zero: this is a normal sg entry. Next sg entry is located at sg + 1. - Bit 0 set: this is a chain entry, the next real entry is at ->page_link with the two low bits masked off. - Bit 1 set: this is the final entry in the sg entry. sg_next() will return NULL when passed such an entry. It's thus important that sg table users use the proper accessors to get and set the page member. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* Fix misspellings of "system", "controller", "interrupt" and "necessary".Robert P. J. Day2007-10-192-2/+2
| | | | | | | | Fix the various misspellings of "system", controller", "interrupt" and "[un]necessary". Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
* forbid asm/bitops.h direct inclusionJiri Slaby2007-10-191-0/+5
| | | | | | | | | | | | | forbid asm/bitops.h direct inclusion Because of compile errors that may occur after bit changes if asm/bitops.h is included directly without e.g. linux/kernel.h which includes linux/bitops.h, forbid direct inclusion of asm/bitops.h. Thanks to Adrian Bunk. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Cc: Adrian Bunk <bunk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* remove unused flush_tlb_pgtablesBenjamin Herrenschmidt2007-10-191-6/+0
| | | | | | | | | | Nobody uses flush_tlb_pgtables anymore, this patch removes all remaining traces of it from all archs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* bitops: introduce lock opsNick Piggin2007-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce test_and_set_bit_lock / clear_bit_unlock bitops with lock semantics. Convert all architectures to use the generic implementation. Signed-off-by: Nick Piggin <npiggin@suse.de> Acked-By: David Howells <dhowells@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Bryan Wu <bryan.wu@analog.com> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Richard Curnow <rc@rc0.org.uk> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp> Cc: Andi Kleen <ak@muc.de> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* increase AT_VECTOR_SIZE to terminate saved_auxv properlyOlaf Hering2007-10-172-0/+2
| | | | | | | | | | | | | | | | | | | | | | | include/asm-powerpc/elf.h has 6 entries in ARCH_DLINFO. fs/binfmt_elf.c has 14 unconditional NEW_AUX_ENT entries and 2 conditional NEW_AUX_ENT entries. So in the worst case, saved_auxv does not get an AT_NULL entry at the end. The saved_auxv array must be terminated with an AT_NULL entry. Make the size of mm_struct->saved_auxv arch dependend, based on the number of ARCH_DLINFO entries. Signed-off-by: Olaf Hering <olh@suse.de> Cc: Roland McGrath <roland@redhat.com> Cc: Jakub Jelinek <jakub@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Remove dma_cache_(wback|inv|wback_inv) functionsRalf Baechle2007-10-172-26/+1
| | | | | | | | | | | | | | | | | | | | dma_cache_(wback|inv|wback_inv) were the earliest attempt on a generalized cache managment API for I/O purposes. Originally it was basically the raw MIPS low level cache API exported to the entire world. The API has suffered from a lack of documentation, was not very widely used unlike it's more modern brothers and can easily be replaced by dma_cache_sync. So remove it rsp. turn the surviving bits back into an arch private API, as discussed on linux-arch. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Paul Mackerras <paulus@samba.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Kyle McMartin <kyle@parisc-linux.org> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* remove include/asm-*/ipc.hAdrian Bunk2007-10-171-1/+0
| | | | | | | | | | | | All asm/ipc.h files do only #include <asm-generic/ipc.h>. This patch therefore removes all include/asm-*/ipc.h files and moves the contents of include/asm-generic/ipc.h to include/linux/ipc.h. Signed-off-by: Adrian Bunk <bunk@kernel.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* cleanup floppy.hJan Beulich2007-10-171-4/+0
| | | | | | | | | AUTO_DMA and FLOPPY_MOTOR_MASK in include/asm-*/floppy.h are dead symbols - remove them. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* remove strict ansi check from __u64 in asm/types.hOlaf Hering2007-10-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit targets. GCC can be made to warn about usage of long long types with ISO C90 (-ansi), but only with -pedantic. You can write this in a way that even then it doesn't cause warnings, namely by: #ifdef __GNUC__ __extension__ typedef __signed__ long long __s64; __extension__ typedef unsigned long long __u64; #endif The __extension__ keyword in front of this switches off any pedantic warnings for this expression. Signed-off-by: Olaf Hering <olh@suse.de> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* kill DECLARE_MUTEX_LOCKEDChristoph Hellwig2007-10-171-1/+0
| | | | | | | | | | | | | DECLARE_MUTEX_LOCKED was used for semaphores used as completions and we've got rid of them. Well, except for one in libusual that the maintainer explicitly wants to keep as semaphore. So convert that useage to an explicit sema_init and kill of DECLARE_MUTEX_LOCKED so that new code is reminded to use a completion. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: "Satyam Sharma" <satyam.sharma@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* x86: optimize page faults like all other achitectures and kill notifier cruftChristoph Hellwig2007-10-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | x86(-64) are the last architectures still using the page fault notifier cruft for the kprobes page fault hook. This patch converts them to the proper direct calls, and removes the now unused pagefault notifier bits aswell as the cruft in kprobes.c that was related to this mess. I know Andi didn't really like this, but all other architecture maintainers agreed the direct calls are much better and besides the obvious cruft removal a common way of dealing with kprobes across architectures is important aswell. [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: fix sparc64] Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Andi Kleen <ak@suse.de> Cc: <linux-arch@vger.kernel.org> Cc: Prasanna S Panchamukhi <prasanna@in.ibm.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds2007-10-1333-270/+705
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (124 commits) sh: allow building for both r2d boards in same binary. sh: fix r2d board detection sh: Discard .exit.text/.exit.data at runtime. sh: Fix up some section alignments in linker script. sh: Fix SH-4 DMAC CHCR masking. sh: Rip out left-over nommu cond syscall cruft. sh: Make kgdb i-cache flushing less inept. sh: kgdb section mismatches and tidying. sh: cleanup struct irqaction initializers. sh: early_printk tidying. video: pvr2fb: Add TV (RGB) support to Dreamcast PVR driver. sh: Conditionalize gUSA support. sh: Follow gUSA preempt changes in __switch_to(). sh: Tidy up gUSA preempt handling. sh: __copy_user() optimizations for small copies. sh: clkfwk: Support multi-level clock propagation. sh: Fix URAM start address on SH7785. sh: Use boot_cpu_data for CPU probe. sh: Support extended mode TLB on SH-X3. sh: Bump MAX_ACTIVE_REGIONS for SH7785. ...
| * sh: Fix SH-4 DMAC CHCR masking.Adrian McMenamin2007-10-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | This patch fixes the DMA cascade by masking the correct bits. Tested and working with Dreamcast PVR2 DMA. With this patch applied the existing mainline code in arch/sh/drivers/dma/dma-sh.c works, whereas before I was patching that to get round this problem. Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Make kgdb i-cache flushing less inept.Paul Mundt2007-10-031-12/+0
| | | | | | | | | | | | | | | | | | | | | | kgdb had its own ranged I-cache flushing routine that attempted to duplicate the flush_icache_range() functionality, but managed to do an explicit D-cache writeback & invalidate twice on SH-4. This is a no-op for SH-3, and the flush_icache_range() semantics already do what kgdb was feebly attempting to do already, so just move over to that and kill off the wrapper. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: kgdb section mismatches and tidying.Paul Mundt2007-10-031-10/+2
| | | | | | | | | | | | | | | | | | The kgdb console setup was callable from a left-over deferred initialization path, which in turn depends on __init symbols. Since the deferred initialization was removed some time ago, kill off the rest of those remnants and move kgdb_init() and friends to __init. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Use boot_cpu_data for CPU probe.Paul Mundt2007-09-271-1/+0
| | | | | | | | | | | | | | | | | | | | This moves off of smp_processor_id() and only sets the probe information for the boot CPU directly. This will be copied out for the secondaries, so there's no reason to do this each time. This also allows for some header tidying. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: processor.h needs smp.hPaul Mundt2007-09-271-0/+1
| | | | | | | | | | | | Trivial build fix for SH-2. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Define _ebss for uClinux MTD map driver.Paul Mundt2007-09-241-0/+1
| | | | | | | | | | | | | | The uClinux MTD device uses _ebss, add the symbol and corresponding export. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Bring SMP support back from the dead.Paul Mundt2007-09-212-11/+24
| | | | | | | | | | | | | | | | | | | | | | There was a very preliminary bunch of SMP code scattered around for the SH7604 microcontrollers from way back when, and it has mostly suffered bitrot since then. With the tree already having been slowly getting prepped for SMP, this plugs in most of the remaining platform-independent bits. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - initial SMP support.Magnus Damm2007-09-211-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | This implements initial support for the SMP INTC (particularly INTC2) controllers. These are largely implemented as conventional blocks, with register sets grouped together at fixed strides relative to the CPU id. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Kill off special boot_cpu_data.Paul Mundt2007-09-211-7/+2
| | | | | | | | | | | | | | | | This consolidates the cpu_data definitions and gets rid of the special boot_cpu_data. It's made a wrapper to the boot CPU, in order to keep the existing in-tree users happy. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Add maple bus support for the SEGA Dreamcast.Adrian McMenamin2007-09-211-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Maple bus is SEGA's proprietary serial bus for peripherals (keyboard, mouse, controller etc). The bus is capable of some (limited) hotplugging and operates at up to 2 M/bits. Drivers of one sort or another existed/exist for 2.4 and a rudimentary port, which didn't support the 2.6 device driver model was also in existence. This driver - for the bus logic itself and for the keyboard (other drivers will follow) are based on the code and concepts of those old drivers but have lots of completely rewritten parts. I have the maple bus code as a built in now as that seems the sane and rational way to handle something like that - you either want the bus or you don't. Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Fix up extended mode TLB for SH-X2+ cores.Paul Mundt2007-09-213-55/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot, correspondingly, the PGD also has to be 64-bits, so fix that up. The kernel and user permission bits really are decoupled in early cuts of the silicon, which means that we also have to set corresponding kernel permissions on user pages or we end up with user pages that the kernel simply can't touch (!). Finally, with those things corrected, really enable MMUCR.ME and correct the PTEA value (this simply needs to be the upper 32-bits of the PTE, with the size and protection bit encoding). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Magic Panel R2 board support.Markus Brunner2007-09-211-0/+67
| | | | | | | | | | | | | | | | | | This adds support for the SH7720 (SH3-DSP) based Magic Panel R2 board. Signed-off-by: Markus Brunner <super.firetwister@gmail.com> Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: dma: Fix CONFIG_SYSFS=n build.Paul Mundt2007-09-211-5/+0
| | | | | | | | | | | | Trivial build fix for when sysfs is disabled. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: dma: Fix up build for SH7709 support.Kristoffer Ericson2007-09-211-1/+1
| | | | | | | | | | | | | | Trivial build fixes for SH7709. Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Fix OFFCHIP_IRQ_BASE compile error.Kristoffer Ericson2007-09-211-0/+1
| | | | | | | | | | | | | | | | | | | | HP6xx uses OFFCHIP_IRQ_BASE to know the base irq number where non cpu interrupts should start. This define was in irq.h before, but since rework got lost. It really belongs inside hd64461.h since the hp6xx wont work without it. Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: add writesb(), readsb(), writesw() and readsw() to io.hMagnus Damm2007-09-211-0/+26
| | | | | | | | | | | | | | | | | | | | | | This patch adds inline versions of writesb(), readsb(), writesw() and readsw() to include/asm-sh/io.h. Stolen from include/asm-avr32/io.h. These functions are needed to compile certain device drivers such as ax88796. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - rework higlander irq code for r7780mp and r7785rpMagnus Damm2007-09-211-19/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the highlander irq code for r7780mp and r7785rp. The same strategy as for the new R2D code is used here - the board specific interrupts are now starting from HL_FPGA_IRQ_BASE. The code for r7780rp is not touched due to lack of hardware. Tested with CF, AX88796 on r7780mp and r7785rp. The touch switch interrupt has also been tested on r7780mp. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - irl mode update for sh7780 and sh7785Magnus Damm2007-09-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains the following fixes and improvements: - Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780. - Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking. - Good old IRQ_MODE_IRLnnnn should not register any intc controller. - plat_irq_setup_pins() now selects IRL or IRQ mode. - the holding function is now disabled using ICR0. By default all external pin interrupts are disabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Overhaul spinlocks and rwlocks for SH-4A SMP.Paul Mundt2007-09-212-46/+146
| | | | | | | | | | | | | | | | | | | | This rips out some of the old spinlock and rwlock behaviour that the SH-2 parts were using and reworks them for LL/SC semantics on the SH-4A. This is primarily only useful for SH-X3 multi-cores, but can also be used for building CONFIG_SMP=y testing kernels on SH-4A UP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: heartbeat driver update.Paul Mundt2007-09-211-0/+17
| | | | | | | | | | | | | | | | | | Add some flags for the heartbeat driver, and kill off some duplication in the bit positions for the boards that don't have special cases. This also allows for variable access widths and inversion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - primary priority masking fixesMagnus Damm2007-09-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains various intc fixes for problems reported by Markus Brunner on the linuxsh-dev mailing list: http://marc.info/?l=linuxsh-dev&m=118701948224991&w=1 Apart from added comments, the fixes are: - add intc_set_priority() function prototype to hw_irq.h - fix off-by-one error in intc_set_priority() - make sure _INTC_WIDTH() is set for primary priority masking Big thanks to Markus for finding these problems. Version two fixes a compile error and an inverted primary check. Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Markus Brunner <super.firetwister@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - mark data structures as __initdataMagnus Damm2007-09-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | With the intc core improved it is now possible to put the intc data structures in the initdata section. Version two of this patch puts the __initdata inside DECLARE_INTC_DESC() and removes the __initdata included in the board specific r2d code. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - convert board specific r2d codeMagnus Damm2007-09-211-35/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the board specific interrupt code for r2d to make use of intc. While at it we improve the Kconfig to avoid confusion. - Two sets of interrupt tables exist - one for R2D-1 and one for R2D-PLUS. - R2D-1 and R2D-PLUS use the same irq constants. - R2D-1 has AX88796 support, R2D-PLUS does not hook up that IRQ. - R2D-PLUS has KEY support, R2D-1 does not hook up that IRQ. - The number and order of IRQ values are disconnected from register bits. - Interrupt sources now start from IRQ 100. - The machvec demux function converts from irlm IRQ 0-14 to IRQ 100++. Tested on R2D-1 and R2D-PLUS boards. Version 2 adds CONFIG_RTS7751R2D_1 and CONFIG_RTS7751R2D_PLUS together with intc structured as __initdata. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - rework core codeMagnus Damm2007-09-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the intc core, implementing the following features: - Support dual priority registers - one set and one clear register - All 8/16/32 bit register combinations are now supported - Both single mask and single enable bitmap register are supported - Add code to set interrupt priority - Speedup sense and priority configuration code - Allocate data using bootmem, allows intc data structures to be __initdata - Save memory - allocated memory footprint is smaller than intc structures Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - add a clear register to struct intc_prio_regMagnus Damm2007-09-211-1/+1
| | | | | | | | | | | | | | | | We need a secondary register member in struct intc_prio_reg to support dual priority registers used by ipi on x3. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Add SH7720 CPU support.Markus Brunner2007-09-216-10/+30
| | | | | | | | | | | | | | | | This adds support for the SH7720 (SH3-DSP) CPU. Signed-off by: Markus Brunner <super.firetwister@gmail.com> Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Add gpio.h stubs for PFC definitions.Markus Brunner2007-09-212-0/+85
| | | | | | | | | | | | | | | | | | | | This adds the PFC definitions for SH-3, as well as consolidating the gpio.h mess within sh-sci. Stub in sh64, as it's the odd one out between the sh-sci architectures (sh, sh64, h8300) in this capacity. Signed-off by: Markus Brunner <super.firetwister@gmail.com> Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: x3proto: ILSEL IRQ support.Paul Mundt2007-09-211-0/+45
| | | | | | | | | | | | | | | | This adds functionality for the on-board ILSEL IRQs that chain IRL mode events. Many on-board devices (ethernet, usb, etc.) rely on ILSEL IRQs directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: remove intc2 codeMagnus Damm2007-09-211-18/+0
| | | | | | | | | | | | | | There is no point in keeping around the now unused intc2 code. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - convert voyagergx codeMagnus Damm2007-09-211-7/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the sh-specific voyagergx interrupt code to make use of intc. A lot of "interesting" old cruft gets replaced with intc tables and some simple demux code. - All interrupt sources in the sm501 data sheet are now in the header. - The number and order of IRQ values are disconnected from register bits. - Interrupt sources now start from IRQ 200. - set_irq_chained_handler() is now used to hook up the demux function. In the future it would probably make sense to move the interrupt demuxer into into the mfd driver, but this is probably a nice step in the right direction until that happens. Tested on a R2D-1 board using the serial port hooked up to the sm501. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - add single bitmap register supportMagnus Damm2007-09-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds single bitmap register support to intc. The current code only handles 16 and 32 bit registers where a set bit means interrupt enabled, but this is easy to extend in the future. The INTC_IRQ() macro is also added to provide a way to hook in interrupt controllers for FPGAs in boards or companion chips. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: intc - remove redundant irq code for sh03, snapgear and titanMagnus Damm2007-09-213-22/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes redundant board specific interrupt code for boards using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode" aka IRLM. Three boards are affected: sh03, snapgear and titan. The right way to do this is to use cpu specific code provided by intc. A nice side effect is that sh03 now compiles, board not BROKEN any more. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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