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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Sort of on the quieter side this time, which is probably due more to
me not catching up as quickly on patch review than anything else.
Overall it seems normal though, a few small changes to the core,
mostly small non-critical fixes here and there as well as driver
updates for new and existing hardware support.
The biggest things are the TI clk driver rework to lay the groundwork
for clkctrl support in the next merge window and the AmLogic
audio/graphics clk support.
Core:
- clk_possible_parents debugfs file so we know which parents a clk
could possibly have
- Fix to make clk rate change notifiers stop on the first failure
instead of continuing
New Drivers:
- Mediatek MT6797 SoCs
- hi655x PMIC clks
- AmLogic Meson SoC i2s and spdif audio clks and Mali graphics clks
- Allwinner H5 SoCs and PRCM hardware
Updates:
- Nvidia Tegra T210 cleanups and non-critical fixes
- TI OMAP cleanups in preparation for clkctrl support
- trivial fixes like kcalloc(), devm_* conversions, and seq_puts()
- ZTE zx296718 SoC VGA clks
- Rockchip clk-ids, fixups, and rename of rk1108 to rv1108
- IDT VersaClock 5P49V5935 support
- Renesas R-Car H3 and M3-W IMR clks and ES2.0 rev of R-Car H3
support"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (151 commits)
clk: x86: pmc-atom: Checking for IS_ERR() instead of NULL
clk: ti: divider: try to fix ti_clk_register_divider
clk: mvebu: Use kcalloc() in two functions
clk: mvebu: Use kcalloc() in of_cpu_clk_setup()
clk: nomadik: Delete error messages for a failed memory allocation in two functions
clk: nomadik: Use seq_puts() in nomadik_src_clk_show()
clk: Improve a size determination in two functions
clk: Replace four seq_printf() calls by seq_putc()
clk: si5351: Delete an error message for a failed memory allocation in si5351_i2c_probe()
clk: si5351: Use devm_kcalloc() in si5351_i2c_probe()
clk: at91: Use kcalloc() in of_at91_clk_pll_get_characteristics()
reset: mediatek: Add MT2701 ethsys reset controller include file
clk: mediatek: add mt2701 ethernet reset
clk: hi6220: Add the hi655x's pmic clock
clk: ti: fix building without legacy omap3
clk: ti: fix linker error with !SOC_OMAP4
clk: hi3620: Fix a typo in one variable name
clk: hi3620: Delete error messages for a failed memory allocation in two functions
clk: hi3620: Use kcalloc() in hi3620_mmc_clk_init()
clk: hisilicon: Delete error messages for failed memory allocations in hisi_clk_init()
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Add the missing reset bits of the ethsys core to the mt2701-reset include
file, so that we can reference them from within a devicetree file.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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* clk-mt6797:
clk: mediatek: add mt6797 clock IDs
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Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next
Pull Allwinner clock patches for 4.12 from Maxime Ripard:
Support for the new H5 SoC and the PRCM block found in a number of SoCs as
well, plus the usual chunk of fixes and minor enhancements.
* tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: Display index when clock registration fails
clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor
clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks
clk: sunxi-ng: mult: Support PLL lock detection
clk: sunxi-ng: add support for PRCM CCUs
dt-bindings: update device tree binding for Allwinner PRCM CCUs
clk: sunxi-ng: sun5i: Fix mux width for csi clock
clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs
clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver
clk: sunxi-ng: gate: Support common pre-dividers
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SoCs after A31 has a clock controller module in the PRCM part.
Support the clock controller module on H3/5 and A64 now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Allwinner H5 is a SoC that features a design which keeps the peripheral
compatible with H3, so that it have also a CCU like the one on H3 --
only one bus gate/reset is added, and the mmc sample/output phases are
removed because of MMC controller update.
Add its support in our existing H3 CCU driver.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into clk-next
Same great taste as the previous pull request, but now with 50% less DT
bikeshedding!
Amlogic clock driver updates for v4.12
- meson8: add some new PLLs
- new clocks for Mali
- misc fixes.
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
Pull Tegra clk driver updates from Thierry Reding:
This contains a bunch of fixes and cleanups, mostly to the Tegra210
clock driver.
* tag 'tegra-for-4.12-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (24 commits)
clk: tegra: Don't reset PLL-CX if it is already enabled
clk: tegra: Add missing Tegra210 clocks
clk: tegra: Propagate clk_out_x rate to parent
clk: tegra: Fix build warnings on Tegra20/Tegra30
clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on
clk: tegra: Add SATA seq input control
clk: tegra: Add Tegra210 special resets
clk: tegra: Rework pll_u
clk: tegra: Implement reset control reset
clk: tegra: Fix disable unused for clocks sharing enable bit
clk: tegra: Handle UTMIPLL IDDQ
clk: tegra: Add aclk
clk: tegra: Add super clock mux/divider
clk: tegra: Define Tegra210 DMIC clocks
clk: tegra: Fix constness for peripheral clocks
clk: tegra: Define Tegra210 DMIC sync clocks
clk: tegra: Add CEC clock
clk: tegra: Fix type for m field
clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation
clk: tegra: Don't warn for PLL defaults unnecessarily
...
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iqc1, iqc2, tegra_clk_pll_a_out_adsp, tegra_clk_pll_a_out0_out_adsp, adsp
and adsp neon were not modelled. dp2 wasn't modelled for Tegra210.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra210 has 2 special resets which don't follow the normal pattern:
DVCO and ADSP. Add them in this patch.
Changelog:
v2: add DT bindings file
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This clock clocks the ADSP Cortex-A9.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra210 has 3 DMIC inputs which can be clocked from the recovered clock
of several other audio inputs (eg. i2s0, i2s1, ...). To model this, we
add a 3 new clocks similar to the audio* clocks which handle the same
function for the I2S and SPDIF clocks.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This clock is used to clock the HDMI CEC interface.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The 2 ISP clocks (ispa and ispb) share a mux/divider control. So model
this as 1 mux/divider clock and child gate clocks.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:
General rockchip clock changes for 4.12. Contains some new clock-ids
as well as fixups of the clock-ids on rk3368 timers, which were unused
and completely wrong (more and differently named timers).
Also there is one new clock on rk3328 using the muxgrf type, a fix for
pll enablement which should wait for the pll to lock before continuing,
some more critical clocks and the rename of the rk1108 to rv1108, as the
soc seems to have been using a preliminary name before its actual release.
The plan is to have the driver changes (pinctrl, clk) go through the
respective maintainer trees and once everything landed in mainline do
the rename of the devicetree files. With the dts-include change in the
clock rename, we also keep everything compiling and thus bisectability.
* tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add pll_wait_lock for pll_enable
clk: rockchip: rename RK1108 to RV1108
dt-bindings: rk1108-cru: rename RK1108 to RV1108
clk: rockchip: mark some rk3368 core-clks as critical
clk: rockchip: export SCLK_TIMERXX id for timers on rk3368
clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328
clk: rockchip: add clock ids for timer10-15 of RK3368 SoCs
clk: rockchip: fix up rk3368 timer-ids
clk: rockchip: add rk3328 clk_mac2io_ext ID
clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399
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Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[include rename in rk1108.dtsi to prevent compile errors]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The timer-ids are wrong compared to the manual, probably due a simple
copy-paste mistake from the otherwise very similar rk3288. And there
are even more timers in the system than the ones wrongly listed here.
Timer-Ids were unused both in clock-driver as well as devicetree
till now, so fixing them won't break anything.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add support for the Clock Pulse Generator / Module Standby and
Software Reset module on revision ES2.0 of the R-Car H3 SoC, which
differs from ES1.x in some areas.
- Add IMR clocks for R-Car H3 and M3-W,
- Add workaround for PLL0/2/4 errata on R-Car H3 ES1.0,
- Small fixes and cleanups.
* tag 'clk-renesas-for-v4.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0
clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
clk: renesas: cpg-mssr: Add support for fixing up clock tables
clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0
clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
clk: renesas: r8a7796: Reformat core clock table
clk: renesas: r8a7795: Reformat core clock table
clk: renesas: r8a7796: Correct name of watchdog clock
clk: renesas: r8a7795: Correct name of watchdog clock
clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACs
clk: renesas: r8a7796: Add IMR clocks
clk: renesas: r8a7795: Add IMR clocks
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Add all R-Car H3 ES2.0 Clock Pulse Generator Core Clock Outputs, as
listed in Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3
Hardware User's Manual rev. 0.53E.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The debug APB clock is absent in hi6220 driver, so this patch is to add
support for it.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Olof Johansson:
"Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch
of smaller changes, but also some new platforms that are worth
mentioning:
- Rockchip RK3399 platforms for Chromebooks, including Samsung
Chromebook Plus (Kevin)
- Orange Pi PC2 (Allwinner H5)
- Freescale LS2088A and LS1088A SoCs
- Expanded support for Nvidia Tegra186 (and Jetson TX2)"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits)
arm64: dts: Add basic DT to support Spreadtrum's SP9860G
arm64: dts: exynos: Use - instead of @ for DT OPP entries
arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board
arm64: dts: juno: add information about L1 and L2 caches
arm64: dts: juno: fix few unit address format warnings
arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
arm64: marvell: dts: add crypto engine description for 7k/8k
arm64: dts: marvell: add sdhci support for Armada 7K/8K
arm64: dts: marvell: add eMMC support for Armada 37xx
arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
arm64: dts: hisi: add SAS nodes for the hip07 SoC
arm64: dts: hisi: add RoCE nodes for the hip07 SoC
arm64: dts: hisi: add network related nodes for the hip07 SoC
arm64: dts: hisi: add mbigen nodes for the hip07 SoC
arm64: dts: rockchip: fix the memory size of PX5 Evaluation board
arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
...
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into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.12
- Reset the hi6220 mmc hosts to avoid hang
- Add the binding for the hi3798cv200 SoC and the poplar board
- Add basic dts files to support the hi3798cv200 poplar board
- Enable the Mbigen, XGE, RoCE and SAS for the hip07 d05 board
- Add driver strength MACRO for the hi3660 SoC
- Add the pinctrl dtsi file for hikey960 board to configure the pins
* tag 'hisi-arm64-dt-for-4.12' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
arm64: dts: hisi: add SAS nodes for the hip07 SoC
arm64: dts: hisi: add RoCE nodes for the hip07 SoC
arm64: dts: hisi: add network related nodes for the hip07 SoC
arm64: dts: hisi: add mbigen nodes for the hip07 SoC
arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
arm64: dts: hi6220: Reset the mmc hosts
Signed-off-by: Olof Johansson <olof@lixom.net>
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Extend drive strength levels of the pins for Hi3660 Soc.
Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64
Amlogic 64-bit DT updates for v4.12
- pinctrl: new pins for audio
- clocks: more clocks exposed for GFX, audio
- new board: Khadas Vim (S905X)
- new board: HwaCom AmazeTV (S905X)
- ethernet phy: add GPIO resets
* tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (41 commits)
ARM64: dts: meson-gx: Add support for HDMI output
ARM64: dts: meson-gx: Add shared CMA dma memory pool
ARM64: dts: meson-gxbb-odroidc2: Enable SARADC node
dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
clk: meson-gxbb: Expose GP0 dt-bindings clock id
clk: meson-gxbb: Add MALI clock IDS
dt-bindings: clk: gxbb: expose i2s output clock gates
ARM64: dts: meson-gxl: add spdif output pins
ARM64: dts: meson-gxl: add i2s output pins
ARM64: dts: meson-gxbb: add spdif output pins
ARM64: dts: meson-gxbb: add i2s output pins
ARM64: dts: meson-gxbb: Add USB Hub GPIO hog
ARM: dts: meson8b: Add gpio-ranges properties
ARM: dts: meson8: Add gpio-ranges properties
ARM64: dts: meson-gxl: Add gpio-ranges properties
ARM64: dts: meson-gxbb: Add gpio-ranges properties
ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
ARM64: dts: meson-gxl: Add missing pinctrl pins groups
ARM64: dts: meson-gx: Prepend GX generic compatible like other nodes
ARM64: dts: meson-gx: empty line cleanup
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch exposes the GP0 PLL clock id in the dt bindings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490178747-14837-5-git-send-email-narmstrong@baylibre.com
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Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490177935-9646-2-git-send-email-narmstrong@baylibre.com
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Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20170309104154.28295-10-jbrunet@baylibre.com
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs:
Reset subsystem, merged through arm-soc by tradition:
- Make bool drivers explicitly non-modular
- New support for i.MX7 and Arria10 reset controllers
PATA driver for Palmchip BK371 (acked by Tejun)
Power domain drivers for i.MX (GPC, GPCv2)
- Moved out of mach-imx for GPC
- Bunch of tweaks, fixes, etc
PMC support for Tegra186
SoC detection support for Renesas RZ/G1H and RZ/G1N
Move Tegra flow controller driver from mach directory to drivers/soc
- (Power management / CPU power driver)
Misc smaller tweaks for other platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (60 commits)
soc: pm-domain: Fix the mangled urls
soc: renesas: rcar-sysc: Add support for R-Car H3 ES2.0
soc: renesas: rcar-sysc: Add support for fixing up power area tables
soc: renesas: Register SoC device early
soc: imx: gpc: add workaround for i.MX6QP to the GPC PD driver
dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible
soc: imx: gpc: add defines for domain index
soc: imx: Add GPCv2 power gating driver
dt-bindings: Add GPCv2 power gating driver
ARM/clk: move the ICST library to drivers/clk
ARM: plat-versatile: remove stale clock header
ARM: keystone: Drop PM domain support for k2g
soc: ti: Add ti_sci_pm_domains driver
dt-bindings: Add TI SCI PM Domains
PM / Domains: Do not check if simple providers have phandle cells
PM / Domains: Add generic data pointer to genpd data struct
soc/tegra: Add initial flowctrl support for Tegra132/210
soc/tegra: flowctrl: Add basic platform driver
soc/tegra: Move Tegra flowctrl driver
ARM: tegra: Remove unnecessary inclusion of flowctrl header
...
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers
Pull "Keystone mangled URLs fixed" from Santosh Shilimkar
* 'for_4.12/soc-pmdomain-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: pm-domain: Fix the mangled urls
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Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Renesas ARM Based SoC Sysc Updates for v4.12
* Add support for R-Car H3 ES2.0
* tag 'renesas-sysc-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Add support for R-Car H3 ES2.0
soc: renesas: rcar-sysc: Add support for fixing up power area tables
soc: renesas: Register SoC device early
base: soc: Allow early registration of a single SoC device
base: soc: Let soc_device_match() return no match when called too early
Signed-off-by: Olof Johansson <olof@lixom.net>
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Power area A2VC0 was removed in revision ES2.0, cfr. R-Car Gen3 Hardware
User's Manual rev. 0.53E.
Hence remove it from the power area table when not running on ES1.x.
This is in line with the goal to:
1. Support both the ES1.x and ES2.0 SoC revisions in a single binary
for now,
2. Make it clear which code supports ES1.x, so it can easily be
identified and removed later, when production SoCs are deemed
ubiquitous.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers updates for 4.12:
- A series from Lucas Stach which partly rewrites the imx gpc driver
to support multiple power domains, and moves the related code from
imx platform into drivers folder.
- A series from Dong Aisheng which fixes the issues with Lucas' code
changes and improves things.
- Add workaround for i.MX6QP hardware erratum ERR009619 that is PRE
clocks may be stalled during the power up sequencing of the PU power
domain.
- Add imx-gpcv2 driver to support power domains managed by GPCv2 IP
block found on i.MX7 series of SoCs.
* tag 'imx-drivers-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: add workaround for i.MX6QP to the GPC PD driver
dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible
soc: imx: gpc: add defines for domain index
soc: imx: Add GPCv2 power gating driver
dt-bindings: Add GPCv2 power gating driver
soc: imx: gpc: remove unnecessary readable_reg callback
dt-bindings: imx-gpc: correct the DOMAIN_INDEX using
soc: imx: gpc: keep PGC_X_CTRL name align with reference manual
soc: imx: gpc: fix comment when power up domain
soc: imx: gpc: fix imx6sl gpc power domain regression
soc: imx: gpc: fix domain_index sanity check issue
soc: imx: gpc: fix the wrong using of regmap cache
soc: imx: gpc: fix gpc clk get error handling
soc: imx: move PGC handling to a new GPC driver
dt-bindings: add multidomain support to i.MX GPC DT binding
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add DT bindings for power domain driver for GPCv2 IP block found in
i.MX7 SoCs.
Cc: yurovsky@gmail.com
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <dongas86@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers
ARM SOC PM domain support for 4.12
Dave Gerlach (5):
PM / Domains: Add generic data pointer to genpd data struct
PM / Domains: Do not check if simple providers have phandle cells
dt-bindings: Add TI SCI PM Domains
soc: ti: Add ti_sci_pm_domains driver
ARM: keystone: Drop PM domain support for k2g
* tag 'arm-soc-pmdomain' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: Drop PM domain support for k2g
soc: ti: Add ti_sci_pm_domains driver
dt-bindings: Add TI SCI PM Domains
PM / Domains: Do not check if simple providers have phandle cells
PM / Domains: Add generic data pointer to genpd data struct
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add a generic power domain implementation, TI SCI PM Domains, that
will hook into the genpd framework and allow the TI SCI protocol to
control device power states.
Also, provide macros representing each device index as understood
by TI SCI to be used in the device node power-domain references.
These are identifiers for the K2G devices managed by the PMMC.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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next/drivers
Reset controller changes for v4.12
- make reset drivers with bool Kconfig options explicitly non-modular
- fix uniphier non-static symbol warnings
- fix socfpga nr_resets property
- new drivers for the Arria10 and i.MX7 system reset controllers
- fix sunxi 64-bit compilation
* tag 'reset-for-4.12-1' of git://git.pengutronix.de/git/pza/linux:
reset: sunxi: fix for 64-bit compilation
reset: Add Altera Arria10 SR Reset Controller
dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets
reset: Add i.MX7 SRC reset driver
reset-socfpga: Fix nr_resets property
reset: uniphier: fix non static symbol warnings
reset: pistachio: make it explicitly non-modular
reset: ath79: make it explicitly non-modular
reset: oxnas: make it explicitly non-modular
reset: meson: make it explicitly non-modular
Signed-off-by: Olof Johansson <olof@lixom.net>
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The Arria10 System Resource Chip reset controller handles the
Arria10 peripheral PHYs. This patch adds the offsets for
these PHYs.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Add reset controller driver exposing various reset faculties,
implemented by System Reset Controller IP block.
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Device-tree updates from Olof Johansson:
"Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
Major new platforms:
- Gemini has been ported to DT, so a handful of "new" platforms moved
over from board files
- Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288
SoM and RDK
- A bunch of embedded platforms, several Linksys platforms, Synology
DS116,
- Motorola Droid4 (really old OMAP-based phone) support is added.
Some refactorings, i.e. Allwinner H3/H5 support is commonalized.
And lots of smaller changes, cleanups, etc. See shortlog for more
description
We're adding ability to cross-include DT files between arm and arm64,
by creating appropriate links in the dt-include directory, and using
arm/ and arm64/ as include prefixes. This will avoid other local hacks
such as per-file links between the two arch trees (this broke for
external mirroring of DT contents). Now they can just provide their
own appropriate dt-include hierarcy per platform"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits)
ARM: dts: exynos: Use - instead of @ for DT OPP entries
arm: spear6xx: add DT description of the ADC on SPEAr600
arm: spear6xx: remove unneeded pinctrl properties in spear600-evb
arm: spear6xx: switch spear600-evb to the new flash partition DT binding
arm: spear6xx: fix spaces in spear600-evb.dts
arm: spear6xx: use node labels in spear600-evb.dts
arm: spear6xx: add labels to various nodes in spear600.dtsi
ARM: dts: vexpress: fix few unit address format warnings
ARM: dts: at91: sama5d3_xplained: not all ADC channels are available
ARM: dts: at91: sama5d3_xplained: fix ADC vref
ARM: dts: at91: add envelope detector mux to the Axentia TSE-850
ARM: dts: armada-38x: label USB and SATA nodes
ARM: dts: imx6q-utilite-pro: add hpd gpio
ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
ARM: dts: imx: add Gateworks Ventana GW5903 support
ARM: dts: i.MX25: add AIPS control registers
ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
ARM: dts: imx7-colibri: remove 1.8V fixed regulator
ARM: dts: imx7-colibri: allow to disable Ethernet rail
...
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.12
Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board
Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs
* tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
ARM: dts: r8a7790: Drop _clk suffix from external CAN clock node name
ARM: dts: genmai: Enable rtc and rtc_x1 clock
ARM: dts: rskrza1: add rtc DT support
ARM: dts: rskrza1: set rtc_x1 clock value
ARM: dts: r7s72100: add rtc to device tree
ARM: dts: r7s72100: add RTC_X clock inputs to device tree
ARM: dts: r7s72100: add rtc clock to device tree
ARM: dts: koelsch: Correct clock frequency of X2 DU clock input
ARM: dts: r8a7794: Add Z2 clock
ARM: dts: r8a7792: Correct Z clock
ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
ARM: dts: r7s72100: fix ethernet clock parent
ARM: dts: silk: Correct clock of DU1
ARM: dts: alt: Correct clock of DU1
ARM: dts: r8a7794: Correct clock of DU1
ARM: dts: r8a7794: Add DU1 clock to device tree
ARM: dts: r7s72100: add power-domains to sdhi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add the realtime clock functional clock source.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
fixed divider.
This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.
Hence:
- Remove the Z clock output from the cpg_clocks node, as this implied
a programmable clock,
- Add the Z clock as a fixed factor clock,
- Let the first CPU node point to the new Z clock,
- Remove the Z clock index from the bindings (this definition was used
by r8a7792.dtsi only, and was not a contract between DT and driver).
Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add the missing module clock for the second channel of the display unit.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.12, round 1
Highlights:
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- ADD RTC support on STM32F746 MCU
- Enable RTC on STM32F746 Eval board
- Enable clocks on STM32F746 MCU
- Enable DMA, pwm1 and pwm3 on STM32F429I Eval
- Add support of STM32H743 MCU and his Eval board
- Enable USB HS and FS on STM32F469 Disco board
* tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
dt-bindings: Document the STM32 USB OTG DWC2 core binding
ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-disco
ARM: dts: stm32: Enable USB FS on stm32f469-disco
ARM: dts: stm32: Add USB FS support for STM32F429 MCU
ARM: dts: stm32: Add STM32H743 MCU and STM32H743i-EVAL board
ARM: dts: stm32: Enable pwm1 and pwm3 on stm32f429i-eval
ARM: dts: stm32: Enable dma by default on stm32f4 adc
ARM: dts: stm32: enable RTC on stm32746g-eval
ARM: dts: stm32: Add RTC support for STM32F746 MCU
ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f746
dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include file
ARM: dts: stm32: Enable clocks for STM32F746 MCU
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch lists STM32F7's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.12
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
* tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
ARM: dts: silk: Drop superfluous status update for frequency override
ARM: dts: alt: Drop superfluous status update for frequency override
ARM: dts: gose: Drop superfluous status update for frequency override
ARM: dts: porter: Drop superfluous status update for frequency override
ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
ARM: dts: lager: Drop superfluous status update for frequency override
ARM: dts: marzen: Drop superfluous status update for frequency override
ARM: dts: bockw: Drop superfluous status update for frequency override
ARM: dts: porter: Always use status "okay" to enable devices
ARM: dts: r8a7793: Add INTC-SYS clock to device tree
ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Add INTC-SYS clock to device tree
ARM: dts: r8a7792: Add INTC-SYS clock to device tree
ARM: dts: r8a7791: Add INTC-SYS clock to device tree
ARM: dts: r8a7790: Add INTC-SYS clock to device tree
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
ARM: dts: r7s72100: Add watchdog timer
ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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