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2015-08-28drm/i915: Update DRIVER_DATE to 20150828Daniel Vetter1-1/+1
2015-08-26Partially revert "drm/i915: Use full atomic modeset."Maarten Lankhorst3-1/+7
2015-08-26drm/i915: gen 9 can check for unclaimed registers tooPaulo Zanoni2-0/+8
2015-08-26drm/i915: Force CL2 off in CHV x1 PHYVille Syrjälä2-0/+10
2015-08-26drm/i915: Enable DPIO SUS clock gating on CHVVille Syrjälä2-1/+6
2015-08-26drm/i915: Force common lane on for the PPS kick on CHVVille Syrjälä1-3/+13
2015-08-26drm/i915: Trick CL2 into life on CHV when using pipe B with port BVille Syrjälä4-0/+78
2015-08-26drm/i915: Implement PHY lane power gating for CHVVille Syrjälä5-59/+221
2015-08-26drm/i915: Move DPLL ref/cri/VGA mode frobbing to the disp2d well enableVille Syrjälä1-21/+24
2015-08-26drm/i915: Make some string arrays constVille Syrjälä1-2/+2
2015-08-26drm/i915: Use ARRAY_SIZE() instead of hand rolling itVille Syrjälä3-4/+3
2015-08-26drm/i915: Fix some gcc warningsVille Syrjälä1-2/+2
2015-08-26drm/i915/bxt: Use correct live status register for BXT platformJani Nikula1-0/+25
2015-08-26drm/i915: split g4x_digital_port_connected to g4x and vlv variantsJani Nikula1-31/+39
2015-08-26drm/i915: split ibx_digital_port_connected to ibx and cpt variantsJani Nikula1-35/+43
2015-08-26drm/i915: add common intel_digital_port_connected functionJani Nikula1-19/+22
2015-08-26drm/i915: add MISSING_CASE annotation to ibx_digital_port_connectedJani Nikula1-2/+8
2015-08-26drm/i915: make g4x_digital_port_connected return boolean statusJani Nikula1-15/+11
2015-08-26drm/i915: move ibx_digital_port_connected to intel_dp.cJani Nikula3-55/+53
2015-08-26drm/i915: DVO pixel clock checkMika Kahola1-0/+7
2015-08-26drm/i915: DSI pixel clock checkMika Kahola1-0/+3
2015-08-26drm/i915: LVDS pixel clock checkMika Kahola1-0/+3
2015-08-26drm/i915: Store max dotclockMika Kahola2-0/+21
2015-08-26drm/i915: Add vlv_dport_to_phy()Ville Syrjälä1-2/+16
2015-08-26drm/i915: Move VLV/CHV prepare_pll laterVille Syrjälä1-9/+5
2015-08-26drm/i915: Add locking around chv_phy_control_init()Ville Syrjälä1-0/+2
2015-08-26drm/i915: Move DPIO port init earlierVille Syrjälä2-22/+20
2015-08-26drm/i915: Add encoder->post_pll_disable() hooks and move CHV clock buffer dis...Ville Syrjälä4-11/+51
2015-08-26drm/i915: Always program unique transition scale for CHVVille Syrjälä2-41/+42
2015-08-26drm/i915: Always program m2 fractional value on CHVVille Syrjälä1-2/+1
2015-08-26drm/i915: fix driver's versions of WARN_ON & WARN_ON_ONCEDave Gordon1-2/+2
2015-08-26drm/i915: Put back lane_count into intel_dp and add link_rate tooVille Syrjälä4-31/+33
2015-08-26drm/i915/bxt: don't allow cached GEM mappings on A steppingImre Deak1-0/+9
2015-08-26drm/i915/bxt: work around HW coherency issue when accessing GPU seqnoImre Deak2-8/+63
2015-08-26drm/i915: Also call frontbuffer flip when disabling planes.Rodrigo Vivi1-1/+1
2015-08-26drm/i915: Change SRM, LRM instructions to use correct lengthArun Siluvery4-13/+13
2015-08-25doc: drm: Fix mis-spelling of i915_guc_submission includesGraham Whaley1-2/+2
2015-08-14drm/i915: remove excessive scaler debugging messagesJani Nikula2-5/+0
2015-08-14drm/i915: Debugfs interface for GuC submission statisticsDave Gordon1-0/+76
2015-08-14drm/i915: Integrate GuC-based command submissionAlex Dai7-29/+142
2015-08-14drm/i915: Interrupt routing for GuC submissionDave Gordon2-2/+60
2015-08-14drm/i915: Implementation of GuC submission clientDave Gordon4-3/+725
2015-08-14drm/i915: Enable GuC firmware logAlex Dai3-0/+76
2015-08-14drm/i915: Prepare for GuC-based command submissionAlex Dai4-1/+148
2015-08-14drm/i915: Expose one LRC function for GuC submission modeDave Gordon2-5/+7
2015-08-14drm/i915: Debugfs interface to read GuC load statusAlex Dai1-0/+39
2015-08-14drm/i915: GuC-specific firmware loaderAlex Dai9-9/+650
2015-08-14drm/i915: Kill intel_dp->{link_bw, rate_select}Ville Syrjälä3-27/+27
2015-08-14drm/i915: Don't use link_bw to select between TP1 and TP3Ville Syrjälä1-2/+2
2015-08-14drm/i915: Move intel_dp->lane_count into pipe_configVille Syrjälä6-28/+61
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