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* Pull ngam-maule-steiner into release branchTony Luck2005-08-3010-82/+891
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| * [IA64] altix: Abstract irq_affinity at the sn pci providerMark Maule2005-08-261-0/+1
| | | | | | | | | | | | | | | | Altix patch to abstract irq_affinity down to the pci provider level since different SGI hardware implements this in different ways. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] SGI SN remove redundant partition SAL callRuss Anderson2005-08-252-50/+1
| | | | | | | | | | | | | | | | | | | | Clean up of SGI SN partitioning related code. The SN_SAL_GET_SN_INFO SAL call returns the partition ID, making the SN_SAL_SYSCTL_PARTITION_GET SAL call redundant. Remove sn_partid and use sn_partition_id. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] - SGI SN hwperf enhancements -Mark Goodwin2005-08-251-0/+10
| | | | | | | | | | | | | | | | | | Add a new exported function for determining the nearest node with CPUs for I/O nodes and fix a bug where the hwperf dynamic misc device was being registered before misc_init(). Signed-off-by: Mark Goodwin <markgw@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] - SGI SN hwperf enhancements - export_pci_topologyMark Goodwin2005-08-251-5/+4
| | | | | | | | | | | | | | Bugfix to export PCI topology information in /proc/sgi_sn/sn_topology. Signed-off-by: Mark Goodwin <markgw@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] - New SN hardware support - ptc_fixesJack Steiner2005-08-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Shub2 provides a much improved mechanism for issuing internode TLB purges. Add code to support the newer mechanism. There is also some debug code (disabled) that is useful for testing. Collect statistics on the number, type & duration of TLB purges. This data will be useful for making future improvements in the algorithms. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] - New SN hardware support - cpu_relaxJack Steiner2005-08-181-1/+2
| | | | | | | | | | | | | | Add a few missing calls to "hint @pause". Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] - New SN hardware support - addr_macrosJack Steiner2005-08-181-18/+56
| | | | | | | | | | | | | | | | | | | | | | | | Update the SN address macros so that they work on both shub1 and shub2. Most of the code to support shub2 was added last year but this patch fixes a few bugs and adds macros to help generate both processor-specific physical addresses & numalink physical addresses. More cleanup & optimization will be done later. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] sn pci provider for TIOCE (pciMark Maule2005-08-123-1/+808
| | | | | | | | | | | | | | | | Altix patch to add an SN pci provider for TIOCE, which is SGI's PCI Express implementation. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] add support for TIO huge-windowMark Maule2005-08-121-2/+3
| | | | | | | | | | | | | | | | | | Altix patch to add TIO "huge-window" address support to sn_dma_flush(). Update copyright in affected files. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] abstract force_interrupt() mechanismMark Maule2005-08-122-1/+1
| | | | | | | | | | | | | | | | Altix patch to abstract the force_interrupt() mechanism away from the pcibr provider. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] altix: cosmetic rename of SGI_PCIBR_ERRORMark Maule2005-08-121-2/+1
| | | | | | | | | | | | | | | | Cosmetic altix patch to rename SGI_PCIBR_ERROR to something more generic and remove a duplicate #define. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] Altix only: Add PCI Domain number support.Colin Ngam2005-08-121-1/+2
| | | | | | | | | | | | | | This patch enables PCI Domain numbering on Altix. Signed-off-by: Colin Ngam <cngam@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | Pull pending-2.6.14 into release branchTony Luck2005-08-301-1/+1
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| * | [IA64] fix IO_SPACE_SPARSE_ENCODING macro ambiguityBjorn Helgaas2005-08-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Parenthesize "p" to avoid ambiguity. No callers have a problem today; this is just to clean up the bad form. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | Pull acpi-p-state into release branchTony Luck2005-08-292-0/+26
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| * | | [IA64] Add ACPI based P-state supportVenkatesh Pallipadi2005-08-272-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch to support P-state transitions on ia64. This driver is based on ACPI, and uses the ACPI processor driver interface to find out the P-state support information for the processor. This driver plugs into generic cpufreq infrastructure. Once this driver is loaded successfully, ondemand/userspace governor can be used to change the CPU frequency dynamically based on load or on request from userspace process. Refer : ACPI specification - http://www.acpi.info P-state related PAL calls - http://developer.intel.com/design/itanium/downloads/24869909.pdf Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | Pull lameter-rwsem-limit into release branchTony Luck2005-08-291-17/+18
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| * | | | [IA64] Remove rwsem limitation of 32k waitersChristoph Lameter2005-08-231-17/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We ran into the limit with the maximum number of waiters at one of our sites. This patch increases the number of possible waiters from 2^15 to 2^31 by using a long for the counter in struct rw_semaphore. S390 and alpha already do this. Signed-off-by: Christoph Lameter <clameter@sgi.com> Acked-by: Kenneth Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | Pull mm-context-fix into release branchTony Luck2005-08-292-25/+37
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| * | | | | [IA64] Fix race in mm-context wrap-around logic.David Mosberger-Tang2005-08-132-25/+37
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch below should fix a race which could cause stale TLB entries. Specifically, when 2 CPUs ended up racing for entrance to wrap_mmu_context(). The losing CPU would find that by the time it acquired ctx.lock, mm->context already had a valid value, but then it failed to (re-)check the delayed TLB flushing logic and hence could end up using a context number when there were still stale entries in its TLB. The fix is to check for delayed TLB flushes only after mm->context is valid (non-zero). The patch also makes GCC v4.x happier by defining a non-volatile variant of mm_context_t called nv_mm_context_t. Signed-off-by: David Mosberger-Tang <David.Mosberger@acm.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | Pull lameter-spinlock-optimization into release branchTony Luck2005-08-291-9/+24
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| * | | | | [IA64] Spinlock optimizationsChristoph Lameter2005-08-111-9/+24
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Nontemporal store for spin unlock. A nontemporal store will not update the LRU setting for the cacheline. The cacheline with the lock may therefore be evicted faster from the cpu caches. Doing so may be useful since it increases the chance that the exclusive cache line has been evicted when another cpu is trying to acquire the lock. The time between dropping and reacquiring a lock on the same cpu is typically very small so the danger of the cacheline being evicted is negligible. 2. Avoid semaphore operation in write_unlock and use nontemporal store write_lock uses a cmpxchg like the regular spin_lock but write_unlock uses clear_bit which requires a load and then a loop over a cmpxchg. The following patch makes write_unlock simply use a nontemporal store to clear the highest 8 bits. We will then still have the lower 3 bytes (24 bits) left to count the readers. Doing the byte store will reduce the number of possible readers from 2^31 to 2^24 = 16 million. These patches were discussed already: http://marc.theaimsgroup.com/?t=111472054400001&r=1&w=2 http://marc.theaimsgroup.com/?l=linux-ia64&m=111401837707849&w=2 The nontemporal stores will only work using GCC. If a compiler is used that does not support inline asm then fallback C code is used. This will preserve the byte store but not be able to do the nontemporal stores. Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | [PATCH] x86_64: Tell VM about holes in nodesAndi Kleen2005-08-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some nodes can have large holes on x86-64. This fixes problems with the VM allowing too many dirty pages because it overestimates the number of available RAM in a node. In extreme cases you can end up with all RAM filled with dirty pages which can lead to deadlocks and other nasty behaviour. This patch just tells the VM about the known holes from e820. Reserved (like the kernel text or mem_map) is still not taken into account, but that should be only a few percent error now. Small detail is that the flat setup uses the NUMA free_area_init_node() now too because it offers more flexibility. (akpm: lotsa thanks to Martin for working this problem out) Cc: Martin Bligh <mbligh@mbligh.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | [PATCH] ppc64: Fix issue with gcc 4.0 compiled kernelsAnton Blanchard2005-08-271-3/+4
| |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I recently had a BUG_ON() go off spuriously on a gcc 4.0 compiled kernel. It turns out gcc-4.0 was removing a sign extension while earlier gcc versions would not. Thinking this to be a compiler bug, I submitted a report: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23422 It turns out we need to cast the input in order to tell gcc to sign extend it. Thanks to Andrew Pinski for his help on this bug. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | [PATCH] m68k: fix broken macros causing compile errorsAndreas Schwab2005-08-241-3/+3
| |_|/ |/| | | | | | | | | | | | | | | | | Add parens around macro parameters. Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] Fix IXP4xx CLOCK_TICK_RATEDeepak Saxena2005-08-241-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As pointed out in the following thread, the CLOCK_TICK_RATE setting for IXP4xx is incorrect b/c the HW ignores the lowest 2 bits of the LATCH value. http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2005-August/030950.html Tnx to George Anziger and Egil Hjelmeland for finding the issue. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] s390 __CHECKER__ ifdefsAl Viro2005-08-241-19/+2
| | | | | | | | | | | | | | | | | | | | | remove the bogus games with explicit ifdefs on __CHECKER__ Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] qualifiers in return types - easy casesAl Viro2005-08-244-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | a bunch of functions switched from volatile to __attribute__((noreturn)) and from const to __attribute_pure__ Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] m32r smp.h gcc4 fixesAl Viro2005-08-241-2/+0
| | | | | | | | | | | | | | | | | | | | | extern on physid_2_cpu[] does not belong in smp.h - the thing is static. Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] alpha xchg fixAl Viro2005-08-241-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | alpha xchg has to be a macro - alpha disables always_inline and if that puppy does not get inlined, we immediately blow up on undefined reference. Happens even on gcc3; with gcc4 that happens a _lot_. Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] Kconfig fix (ISA_DMA_API and sound/*)Al Viro2005-08-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | fixed kconfig dependencies on ISA_DMA_API for parts of sound/* that rely on it. Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6Linus Torvalds2005-08-232-2/+21
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| * | | [AX25]: UID fixesRalf Baechle2005-08-231-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o Brown paperbag bug - ax25_findbyuid() was always returning a NULL pointer as the result. Breaks ROSE completly and AX.25 if UID policy set to deny. o While the list structure of AX.25's UID to callsign mapping table was properly protected by a spinlock, it's elements were not refcounted resulting in a race between removal and usage of an element. Signed-off-by: Ralf Baechle DL5RB <ralf@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | [NET]: Fix socket bitop damageRalf Baechle2005-08-231-0/+5
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The socket flag cleanups that went into 2.6.12-rc1 are basically oring the flags of an old socket into the socket just being created. Unfortunately that one was just initialized by sock_init_data(), so already has SOCK_ZAPPED set. As the result zapped sockets are created and all incoming connection will fail due to this bug which again was carefully replicated to at least AX.25, NET/ROM or ROSE. In order to keep the abstraction alive I've introduced sock_copy_flags() to copy the socket flags from one sockets to another and used that instead of the bitwise copy thing. Anyway, the idea here has probably been to copy all flags, so sock_copy_flags() should be the right thing. With this the ham radio protocols are usable again, so I hope this will make it into 2.6.13. Signed-off-by: Ralf Baechle DL5RB <ralf@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Auto-update from upstreamTony Luck2005-08-228-30/+51
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| * | Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-08-201-0/+5
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| | * | [SPARC64]: Move kernel unaligned trap handlers into assembler file.David S. Miller2005-08-201-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GCC 4.x really dislikes the games we are playing in unaligned.c, and the cleanest way to fix this is to move things into assembler. Noted by Al Viro. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | Fix nasty ncpfs symlink handling bug.Linus Torvalds2005-08-201-4/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This bug could cause oopses and page state corruption, because ncpfs used the generic page-cache symlink handlign functions. But those functions only work if the page cache is guaranteed to be "stable", ie a page that was installed when the symlink walk was started has to still be installed in the page cache at the end of the walk. We could have fixed ncpfs to not use the generic helper routines, but it is in many ways much cleaner to instead improve on the symlink walking helper routines so that they don't require that absolute stability. We do this by allowing "follow_link()" to return a error-pointer as a cookie, which is fed back to the cleanup "put_link()" routine. This also simplifies NFS symlink handling. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6Linus Torvalds2005-08-191-1/+5
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| | * | [PATCH] serverworks: add support for new southbridge IDENarendra Sankar2005-08-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BCM5785 (HT1000) is a Opteron Southbridge from Serverworks/Broadcom that incorporates a single channel ATA100 IDE controller that is functionally identical to the Serverworks CSB6 IDE controller. This patch adds support for the new PCI device ID and also the support for this controller. Signed-off-by: Narendra Sankar <nsankar@broadcom.com> Acked-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@elka.pw.edu.pl>
| | * | [PATCH] ide: add support for Netcell Revolution to pci-ide generic driverMatt Gillette2005-08-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for Netcell Revolution to pci-ide generic driver by including it in the list of devices matched. Includes the Revolution in the list of simplex devices forced into DMA mode. Signed-off-by: Matt Gillette <matt.gillette@netcell.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@elka.pw.edu.pl>
| | * | [PATCH] ide: fix PCI_DEVIEC_ID_APPLE_UNI_N_ATA spellingGrant Coady2005-08-181-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Grant Coady <gcoady@gmail.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@elka.pw.edu.pl>
| * | | [PATCH] ppc32: Fix PPC440SP SRAM controller DCRsMatt Porter2005-08-181-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the incorrect DCR base value for the 440SP SRAM controller. Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | | [PATCH] ppc32: fix ppc4xx stb03xxx dma buildMatt Porter2005-08-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes build on 4xx stb03xxx when general purpose dma engine support is enabled. Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | | [PATCH] SH64: inotify and ioprio syscallsRobert Love2005-08-181-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add inotify and ioprio syscall stubs to SH64. Signed-off-by: Robert Love <rml@novell.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | | [PATCH] SH: inotify and ioprio syscallsRobert Love2005-08-181-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add inotify and ioprio syscall stubs to SH. Signed-off-by: Robert Love <rml@novell.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | | [PATCH] NFS: Introduce the use of inode->i_lock to protect fields in nfsiChuck Lever2005-08-181-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Down the road we want to eliminate the use of the global kernel lock entirely from the NFS client. To do this, we need to protect the fields in the nfs_inode structure adequately. Start by serializing updates to the "cache_validity" field. Note this change addresses an SMP hang found by njw@osdl.org, where processes deadlock because nfs_end_data_update and nfs_revalidate_mapping update the "cache_validity" field without proper serialization. Test plan: Millions of fsx ops on SMP clients. Run Nick Wilson's breaknfs program on large SMP clients. Signed-off-by: Chuck Lever <cel@netapp.com> Cc: Trond Myklebust <trond.myklebust@fys.uio.no> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | | [PATCH] NFS: use atomic bitops to manipulate flags in nfsi->flagsChuck Lever2005-08-181-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce atomic bitops to manipulate the bits in the nfs_inode structure's "flags" field. Using bitops means we can use a generic wait_on_bit call instead of an ad hoc locking scheme in fs/nfs/inode.c, so we can remove the "nfs_i_wait" field from nfs_inode at the same time. The other new flags field will continue to use bitmask and logic AND and OR. This permits several flags to be set at the same time efficiently. The following patch adds a spin lock to protect these flags, and this spin lock will later cover other fields in the nfs_inode structure, amortizing the cost of using this type of serialization. Test plan: Millions of fsx ops on SMP clients. Signed-off-by: Chuck Lever <cel@netapp.com> Cc: Trond Myklebust <trond.myklebust@fys.uio.no> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | | [PATCH] NFS: split nfsi->flags into two fieldsChuck Lever2005-08-181-11/+16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain bits in nfsi->flags can be manipulated with atomic bitops, and some are better manipulated via logical bitmask operations. This patch splits the flags field into two. The next patch introduces atomic bitops for one of the fields. Test plan: Millions of fsx ops on SMP clients. Signed-off-by: Chuck Lever <cel@netapp.com> Cc: Trond Myklebust <trond.myklebust@fys.uio.no> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>