summaryrefslogtreecommitdiffstats
path: root/include (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-kgdbLinus Torvalds2008-04-187-0/+402
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-kgdb: kgdb: always use icache flush for sw breakpoints kgdb: fix SMP NMI kgdb_handle_exception exit race kgdb: documentation fixes kgdb: allow static kgdbts boot configuration kgdb: add documentation kgdb: Kconfig fix kgdb: add kgdb internal test suite kgdb: fix several kgdb regressions kgdb: kgdboc pl011 I/O module kgdb: fix optional arch functions and probe_kernel_* kgdb: add x86 HW breakpoints kgdb: print breakpoint removed on exception kgdb: clocksource watchdog kgdb: fix NMI hangs kgdb: fix kgdboc dynamic module configuration kgdb: document parameters x86: kgdb support consoles: polling support, kgdboc kgdb: core uaccess: add probe_kernel_write()
| * kgdb: add documentationJason Wessel2008-04-171-21/+31
| | | | | | | | | | | | | | Add in the kgdb documentation for kgdb. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * kgdb: clocksource watchdogJason Wessel2008-04-171-0/+1
| | | | | | | | | | | | | | | | In order to not trip the clocksource watchdog, kgdb must touch the clocksource watchdog on the return to normal system run state. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * kgdb: fix NMI hangsJason Wessel2008-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the hang regression with kgdb when the NMI interrupt comes in while the master core is returning from an exception. Adjust the NMI logic such that KGDB will not stop NMI exceptions from occurring by in general returning NOTIFY_DONE. It is not possible to distinguish the debug NMI sync vs the normal NMI apic interrupt so kgdb needs to catch the unknown NMI if it the debugger was previously active on one of the cpus. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: kgdb supportIngo Molnar2008-04-171-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | simplified and streamlined kgdb support on x86, both 32-bit and 64-bit, based on patch from: Subject: kgdb: core-lite From: Jason Wessel <jason.wessel@windriver.com> [ and countless other authors - see the patch for details. ] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
| * consoles: polling support, kgdbocJason Wessel2008-04-172-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | polled console handling support, to access a console in an irq-less way while in debug or irq context. absolutely zero impact as long as CONFIG_CONSOLE_POLL is disabled. (which is the default) [ jan.kiszka@siemens.com: lots of cleanups ] [ mingo@elte.hu: redesign, splitups, cleanups. ] Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
| * kgdb: coreJason Wessel2008-04-171-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | kgdb core code. Handles the protocol and the arch details. [ mingo@elte.hu: heavily modified, simplified and cleaned up. ] [ xemul@openvz.org: use find_task_by_pid_ns ] Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
| * uaccess: add probe_kernel_write()Ingo Molnar2008-04-171-0/+22
| | | | | | | | | | | | | | | | | | | | add probe_kernel_read() and probe_kernel_write(). Uninlined and restricted to kernel range memory only, as suggested by Linus. Signed-off-by: Ingo Molnar <mingo@elte.hu> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
* | Merge branch 'for-linus' of ↵Linus Torvalds2008-04-18175-4279/+5290
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: (613 commits) x86: standalone trampoline code x86: move suspend wakeup code to C x86: coding style fixes to arch/x86/kernel/acpi/sleep.c x86: setup_trampoline() - fix section mismatch warning x86: section mismatch fixes, #1 x86: fix paranoia about using BIOS quickboot mechanism. x86: print out buggy mptable x86: use cpu_online() x86: use cpumask_of_cpu() x86: remove unnecessary tmp local variable x86: remove unnecessary memset() x86: use ioapic_read_entry() and ioapic_write_entry() x86: avoid redundant loop in io_apic_level_ack_pending() x86: remove superfluous initialisation in boot code. x86: merge mpparse_{32,64}.c x86: unify mp_register_gsi x86: unify mp_config_acpi_legacy_irqs x86: unify mp_register_ioapic x86: unify uniq_io_apic_id x86: unify smp_scan_config ...
| * | x86: move suspend wakeup code to CPavel Machek2008-04-172-13/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move wakeup code to .c, so that video mode setting code can be shared between boot and wakeup. Remove nasty assembly code in 64-bit case by re-using trampoline code. Stack setup was fixed to clear high 16bits of %esp, maybe that fixes some machines. .c code sharing and morse code was done H. Peter Anvin, Sam Ravnborg reviewed kbuild related stuff, and it seems okay to him. Rafael did some cleanups. [rjw: * Made the patch stop breaking compilation on x86-32 * Added arch/x86/kernel/acpi/sleep.h * Got rid of compiler warnings in arch/x86/kernel/acpi/sleep.c * Fixed 32-bit compilation on x86-64 systems * Added include/asm-x86/trampoline.h and fixed the non-SMP compilation on 64-bit x86 * Removed arch/x86/kernel/acpi/sleep_32.c which was not used * Fixed some breakage caused by the integration of smpboot.c done under us in the meantime] Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move mp_register_lapic_address to boot.cAlexey Starikovskiy2008-04-171-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move mp_register_lapic to boot.cAlexey Starikovskiy2008-04-171-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move up & smp variables to setup.cAlexey Starikovskiy2008-04-171-1/+2
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move mp_ioapic_routing to boot.cAlexey Starikovskiy2008-04-171-0/+7
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: don't set IO APIC features if IO APIC is not enabledAlexey Starikovskiy2008-04-172-3/+2
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: clean up non-smp usage of cpu mapsMike Travis2008-04-172-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup references to the early cpu maps for the non-SMP configuration and remove some functions called for SMP configurations only. Cc: Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: uv fixIngo Molnar2008-04-171-1/+1
| | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: support for new UV apicJack Steiner2008-04-172-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UV supports really big systems. So big, in fact, that the APICID register does not contain enough bits to contain an APICID that is unique across all cpus. The UV BIOS supports 3 APICID modes: - legacy mode. This mode uses the old APIC mode where APICID is in bits [31:24] of the APICID register. - x2apic mode. This mode is whitebox-compatible. APICIDs are unique across all cpus. Standard x2apic APIC operations (Intel-defined) can be used for IPIs. The node identifier fits within the Intel-defined portion of the APICID register. - x2apic-uv mode. In this mode, the APICIDs on each node have unique IDs, but IDs on different node are not unique. For example, if each mode has 32 cpus, the APICIDs on each node might be 0 - 31. Every node has the same set of IDs. The UV hub is used to route IPIs/interrupts to the correct node. Traditional APIC operations WILL NOT WORK. In x2apic-uv mode, the ACPI tables all contain a full unique ID (note: exact bit layout still changing but the following is close): nnnnnnnnnnlc0cch n = unique node number l = socket number on board c = core h = hyperthread Only the "lc0cch" bits are written to the APICID register. The remaining bits are supplied by having the get_apic_id() function "OR" the extra bits into the value read from the APICID register. (Hmmm.. why not keep the ENTIRE APICID register in per-cpu data....) The x2apic-uv mode is recognized by the MADT table containing: oem_id = "SGI" oem_table_id = "UV-X" Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: define the macros and tables for blade functionsJack Steiner2008-04-171-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add UV macros for converting between cpu numbers, blade numbers and node numbers. Note that these are used ONLY within x86_64 UV modules, and are not for general kernel use. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: define the macros and tables for the basic UV infrastructure.Jack Steiner2008-04-171-0/+210
| | | | | | | | | | | | | | | | | | | | | Define the macros and tables for the basic UV infrastructure. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: add UV specific header for MMR definitionsJack Steiner2008-04-171-0/+373
| | | | | | | | | | | | | | | | | | | | | | | | Definitions of UV MMRs. Note: this file is auto-generated by hardware design tools. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: increase size of APICIDJack Steiner2008-04-172-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Increase the number of bits in an apicid from 8 to 32. By default, MP_processor_info() gets the APICID from the mpc_config_processor structure. However, this structure limits the size of APICID to 8 bits. This patch allows the caller of MP_processor_info() to optionally pass a larger APICID that will be used instead of the one in the mpc_config_processor struct. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: add functions to determine if platform is a UV platformJack Steiner2008-04-172-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add functions that can be used to determine if an x86_64 system is a SGI "UV" system. UV systems come in 3 types and are identified by the OEM ID in the MADT. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: change GET_APIC_ID() from an inline function to an out-of-line functionJack Steiner2008-04-174-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a function to read the local APIC_ID. This change is in preparation for additional changes to the APICID functions that will come in a later patch. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: replace most VM86 flags with flags from processor-flags.hgorcunov@gmail.com2008-04-171-8/+2
| | | | | | | | | | | | | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: cleanup - rename VM_MASK to X86_VM_MASKgorcunov@gmail.com2008-04-172-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames VM_MASK to X86_VM_MASK (which in turn defined as alias to X86_EFLAGS_VM) to better distinguish from virtual memory flags. We can't just use X86_EFLAGS_VM instead because it is also used for conditional compilation Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: cleanup replace most vm86 flags with flags from processor-flags.h, fixIngo Molnar2008-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | - fix build error - fix CONFIG_HEADERS_CHECK error Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: sparsemem: reduce i386 PAE section sizeJeremy Fitzhardinge2008-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A 1G section size makes memory hotplug too coarse in a virtual environment. Retuce it by a factor of 2 to 512M. I would have liked to make it smaller, but it runs out of reserved flags in the page flags. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Yasunori Goto <y-goto@jp.fujitsu.com> Cc: Christoph Lameter <clameter@sgi.com> Cc: Dave Hansen <dave@linux.vnet.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: merge smp_32.h and smp_64.h into smp.hGlauber Costa2008-04-173-29/+5
| | | | | | | | | | | | | | | | | | | | | | | | Merge what's left from smp_32.h and smp_64.h into smp.h By now, they're basically extern definitions. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: merge SMP definitions of smp.hGlauber Costa2008-04-173-49/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | we merge everything that is inside CONFIG_SMP to smp.h. They differ a little bit, so we use CONFIG_X86_32_SMP and CONFIG_X86_64_SMP as markers. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: split safe_smp_processor_idGlauber Costa2008-04-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This implementation in x86_64 is clean and consistent, but we sacrifice it for the sake of being equal to i386 (since the other way around would be harder). Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: merge includes in smp.hGlauber Costa2008-04-173-29/+13
| | | | | | | | | | | | | | | | | | | | | move all include directives from smp_{32,64}.h to smp.h. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: surround apic headers in apic definitionsGlauber Costa2008-04-171-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Although those constants are always defined in x86_64, and will have the effect of just including the headers in the very way we did before, I'm doing this in a separate patch to be conservative and avoid surprises. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: merge hard/logical_smp_processor_idGlauber Costa2008-04-173-54/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code is now the same between i386 and x86_64. We already know what happens when it reaches this point: They go away from the arch-specific headers, and suddenly appears in the common header. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: provide bogus hard_smp_processor_idGlauber Costa2008-04-171-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | We provide a bogus macro for x86_64 in case CONFIG_X86_LOCAL_APIC is not set. It will always be set for x86_64, so the effect is just to make the code equal to i386. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: surround hard_smp_processor_id in APIC_DEFINITIONGlauber Costa2008-04-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | APIC_DEFINITION is not defined in x86_64, so in practice, we keep our old code here. But as a nice side effect, the code is now equal to smp_32.h. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: mpparse, move generic processor info to apic_32.c fixIngo Molnar2008-04-171-0/+2
| | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move generic_processor_info to apic_32.cAlexey Starikovskiy2008-04-171-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: add comments to describe the new api's in cacheflush.hArjan van de Ven2008-04-171-8/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new cacheflush.h API's didn't have any comments describing how they're to be used yet and the conventions around these functions. This patch adds comments to this effect; in order for that to be a logical series, some prototypes had to move around. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: simplify sync_test_bit(), improveJeremy Fitzhardinge2008-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Using a naked parameterless macro could lead to other tokens being unexpectedly replaced. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86 floppy: kill off the 'register' keyword from headerJesper Juhl2008-04-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compilers became generally better at optimizing code than humans, the register keyword became mostly useless. For the floppy driver it certainly is since it's so slow compared to the rest of the system that optimizing access to a single variable or two isn't going to make any real difference So let's just leave it to the compiler - it'll do a better job anyway. This patch does away with a few register keywords in the x86 floppy driver. Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move apic declarations to mach_apic.hGlauber Costa2008-04-172-63/+46
| | | | | | | | | | | | | | | | | | | | | take them out of the x86_64-specific asm/mach_apic.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move ipi definitions to mach_ipi.hGlauber Costa2008-04-172-3/+10
| | | | | | | | | | | | | | | | | | | | | take them out of the x86_64-only asm/mach_apic.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: split large page mapping for AMD TSEGAndi Kleen2008-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On AMD SMM protected memory is part of the address map, but handled internally like an MTRR. That leads to large pages getting split internally which has some performance implications. Check for the AMD TSEG MSR and split the large page mapping on that area explicitely if it is part of the direct mapping. There is also SMM ASEG, but it is in the first 1MB and already covered by the earlier split first page patch. Idea for this came from an earlier patch by Andreas Herrmann On a RevF dual Socket Opteron system kernbench shows a clear improvement from this: (together with the earlier patches in this series, especially the split first 2MB patch) [lower is better] no split stddev split stddev delta Elapsed Time 87.146 (0.727516) 84.296 (1.09098) -3.2% User Time 274.537 (4.05226) 273.692 (3.34344) -0.3% System Time 34.907 (0.42492) 34.508 (0.26832) -1.1% Percent CPU 322.5 (38.3007) 326.5 (44.5128) +1.2% => About 3.2% improvement in elapsed time for kernbench. With GB pages on AMD Fam1h the impact of splitting is much higher of course, since it would split two full GB pages (together with the first 1MB split patch) instead of two 2MB pages. I could not benchmark a clear difference in kernbench on gbpages, so I kept it disabled for that case That was only limited benchmarking of course, so if someone was interested in running more tests for the gbpages case that could be revisited (contributions welcome) I didn't bother implementing this for 32bit because it is very unlikely the 32bit lowmem mapping overlaps into the TSEG near 4GB and the 2MB low split is already handled for both. [ mingo@elte.hu: do it on gbpages kernels too, there's no clear reason why it shouldnt help there. ] Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: andreas.herrmann3@amd.com Cc: mingo@elte.hu Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: re-add rdmsrl_safeAndi Kleen2008-04-172-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RDMSR for 64bit values with exception handling. Makes it easier to deal with 64bit valued MSRs. The old 64bit code base had that too as checking_rdmsrl(), but it got dropped somehow. Signed-off-by: Andi Kleen <andi@firstfloor.org> Cc: andreas.herrmann3@amd.com Cc: mingo@elte.hu Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: add set_memory_4k to pageattr.cAndi Kleen2008-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new function to force split large pages into 4k pages. This is needed for some followup optimizations. I had to add a new field to cpa_data to pass down the information that try_preserve_large_page should not run. Right now no set_page_4k() because I didn't need it and all the specialized users I have in mind would be more comfortable with pure addresses. I also didn't export it because it's unlikely external code needs it. Signed-off-by: Andi Kleen <ak@suse.de> Cc: andreas.herrmann3@amd.com Cc: mingo@elte.hu Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: account overlapped mappings in max_pfn_mappedAndi Kleen2008-04-172-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When end_pfn is not aligned to 2MB (or 1GB) then the kernel might map more memory than end_pfn. Account this in max_pfn_mapped. Signed-off-by: Andi Kleen <ak@suse.de> Cc: andreas.herrmann3@amd.com Cc: mingo@elte.hu Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: replace the now useless max_pfn_mapped defineThomas Gleixner2008-04-171-3/+1
| | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: implement true end_pfn_mapped for 32bitAndi Kleen2008-04-172-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even on 32bit 2MB pages can map more memory than is in the true max_low_pfn if end_pfn is not highmem and not aligned to 2MB. Add a end_pfn_map similar to x86-64 that accounts for this fact. This is important for code that really needs to know about all mapping aliases. Signed-off-by: Andi Kleen <ak@suse.de> Cc: andreas.herrmann3@amd.com Cc: mingo@elte.hu Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: don't set up early exception handlers for external interruptsAndi Kleen2008-04-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All of early setup runs with interrupts disabled, so there is no need to set up early exception handlers for vectors >= 32 This saves some minor text size. Signed-off-by: Andi Kleen <ak@suse.de> Cc: mingo@elte.hu Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 20:55:56 +0100