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2021-06-10net: axienet: Use devm_platform_get_and_ioremap_resource()Yang Yingliang1-5/+2
2021-06-10net: w5100: Use devm_platform_get_and_ioremap_resource()Yang Yingliang1-6/+1
2021-06-10net: ixp4xx_hss: add braces {} to all arms of the statementPeng Li1-2/+2
2021-06-10net: ixp4xx_hss: fix the comments style issuePeng Li1-5/+7
2021-06-10net: ixp4xx_hss: remove redundant spacesPeng Li1-15/+15
2021-06-10net: ixp4xx_hss: add some required spacesPeng Li1-4/+4
2021-06-10net: ixp4xx_hss: move out assignment in if conditionPeng Li1-23/+43
2021-06-10net: ixp4xx_hss: fix the code style issue about "foo* bar"Peng Li1-3/+3
2021-06-10net: ixp4xx_hss: add blank line after declarationsPeng Li1-0/+5
2021-06-10net: ixp4xx_hss: remove redundant blank linesPeng Li1-11/+0
2021-06-10tipc:subscr.c: fix a spelling mistakegushengxian1-1/+1
2021-06-10tipc: socket.c: fix the use of copular verbgushengxian1-1/+1
2021-06-10node.c: fix the use of indefinite articlegushengxian1-1/+1
2021-06-10af_unix: remove the repeated word "and"gushengxian1-1/+1
2021-06-10vsock/vmci: remove the repeated word "be"gushengxian1-1/+1
2021-06-10net: davinci_emac: Use devm_platform_get_and_ioremap_resource()Yang Yingliang1-3/+2
2021-06-10net: ethernet: ti: cpsw: Use devm_platform_get_and_ioremap_resource()Yang Yingliang2-4/+2
2021-06-10net: phy: probe for C45 PHYs that return PHY ID of zero in C22 spaceWong Vee Khee1-0/+12
2021-06-10netlink: simplify NLMSG_DATA with NLMSG_HDRLENChen Li1-2/+3
2021-06-10net/mlx5: Bridge, add tracepointsVlad Buslov4-50/+247
2021-06-10net/mlx5: Bridge, filter tagged packets that didn't match tagged fgVlad Buslov3-5/+141
2021-06-10net/mlx5: Bridge, support pvid and untagged vlan configurationsVlad Buslov2-16/+167
2021-06-10net/mlx5: Bridge, match FDB entry vlan tagVlad Buslov3-10/+181
2021-06-10net/mlx5: Bridge, implement infrastructure for vlansVlad Buslov3-3/+286
2021-06-10net/mlx5: Bridge, dynamic entry ageingVlad Buslov3-13/+193
2021-06-10net/mlx5: Bridge, handle FDB eventsVlad Buslov4-4/+424
2021-06-10net/mlx5: Bridge, add offload infrastructureVlad Buslov10-0/+540
2021-06-10net/mlx5e: Refactor mlx5e_eswitch_{*}rep() helpersVlad Buslov2-5/+5
2021-06-10net/mlx5: Create TC-miss priority and tableVlad Buslov4-1/+26
2021-06-10net/mlx5: DR, Support EMD tag in modify header for STEv1Yevgeny Kliteynik1-0/+8
2021-06-10net/mlx5: DR, Added support for INSERT_HEADER reformat typeYevgeny Kliteynik7-26/+150
2021-06-10net/mlx5: Added new parameters to reformat contextYevgeny Kliteynik10-53/+86
2021-06-10net/mlx5: DR, Allow encap action for RX for supporting devicesYevgeny Kliteynik5-14/+93
2021-06-10net/mlx5: DR, Split reformat state to Encap and DecapYevgeny Kliteynik1-34/+35
2021-06-10net/mlx5: mlx5_ifc support for header insert/removeYevgeny Kliteynik3-6/+50
2021-06-10net: ipa: use bitmap to check for missing regionsAlex Elder1-8/+5
2021-06-10net: ipa: flag duplicate memory regionsAlex Elder1-0/+9
2021-06-10net: ipa: validate memory regions based on versionAlex Elder1-0/+61
2021-06-10net: ipa: introduce ipa_mem_id_optional()Alex Elder2-10/+53
2021-06-10net: ipa: pass memory configuration data to ipa_mem_valid()Alex Elder1-15/+14
2021-06-10net: ipa: validate memory regions at init timeAlex Elder1-4/+4
2021-06-10net: ipa: separate region range check from other validationAlex Elder1-3/+26
2021-06-10net: ipa: separate memory validation from initializationAlex Elder1-8/+32
2021-06-10net: ipa: validate memory regions unconditionallyAlex Elder1-14/+3
2021-06-10net: ipa: store memory region id in descriptorAlex Elder6-1/+106
2021-06-10net: ipa: define IPA_MEM_END_MARKERAlex Elder4-2/+5
2021-06-10net: dsa: sja1105: Fix assigned yet unused return code rcColin Ian King1-1/+1
2021-06-10stmmac: prefetch right addressMatteo Croce1-1/+1
2021-06-10mlxsw: thermal: Fix null dereference of NULL temperature parameterColin Ian King1-2/+2
2021-06-10net: ethernet: rmnet: Always subtract MAP headerKristian Evensen1-2/+3