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2006-03-21[CRYPTO] twofish: Use rol32/ror32 where appropriateDenis Vlasenko1-10/+11
2006-03-20[SPARC64]: Update defconfig.David S. Miller1-11/+14
2006-03-20[SPARC64]: Fix 2 bugs in huge page support.David S. Miller2-4/+176
2006-03-20[SPARC64]: CONFIG_BLK_DEV_RAM fixAndrew Morton1-1/+1
2006-03-20[SPARC64]: Optimized TSB table initialization.David S. Miller4-1/+72
2006-03-20[SPARC64]: Allow CONFIG_MEMORY_HOTPLUG to build.David S. Miller1-0/+18
2006-03-20[SPARC64]: Use SLAB caches for TSB tables.David S. Miller3-25/+69
2006-03-20[SPARC64]: Don't kill the page allocator when growing a TSB.David S. Miller1-8/+35
2006-03-20[SPARC64]: Randomize mm->mmap_base when PF_RANDOMIZE is set.David S. Miller1-2/+14
2006-03-20[SPARC64]: Increase top of 32-bit process stack.David S. Miller5-15/+21
2006-03-20[SPARC64]: Top-down address space allocation for 32-bit tasks.David S. Miller4-10/+189
2006-03-20[SPARC64] bbc_i2c: Fix cpu check and add missing module license.David S. Miller1-1/+3
2006-03-20[SPARC64]: Fix and re-enable dynamic TSB sizing.David S. Miller5-118/+203
2006-03-20[SUNSU]: Fix missing spinlock initialization.David S. Miller1-0/+2
2006-03-20[TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.David S. Miller1-0/+4
2006-03-20[SPARC64]: First cut at VIS simulator for Niagara.David S. Miller3-1/+901
2006-03-20[SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.David S. Miller4-90/+12
2006-03-20[SPARC64]: Add SMT scheduling support for Niagara.David S. Miller3-0/+29
2006-03-20[SPARC64]: Fix 32-bit truncation which broke sparsemem.David S. Miller1-10/+8
2006-03-20[SPARC64]: Move over to sparsemem.David S. Miller7-54/+123
2006-03-20[SPARC64]: Fix new context version SMP handling.David S. Miller10-46/+63
2006-03-20[SPARC64]: Bulletproof MMU context locking.David S. Miller3-5/+7
2006-03-20[SPARC64]: kzalloc() conversionEric Sesterhenn11-58/+27
2006-03-20[SPARC64]: Fix loop termination in mark_kpte_bitmap()David S. Miller1-1/+4
2006-03-20[SPARC64]: Simplify TSB insert checks.David S. Miller2-23/+6
2006-03-20[SPARC64]: More SUN4V cpu mondo bug fixing.David S. Miller1-16/+24
2006-03-20[SPARC64]: Fix sun4v mna winfixup handling.David S. Miller1-4/+4
2006-03-20[SPARC64]: Fix mini RTC driver reading.David S. Miller1-0/+2
2006-03-20[SPARC64]: Do not allow mapping pages within 4GB of 64-bit VA hole.David S. Miller3-24/+73
2006-03-20[SPARC64]: Fix _PAGE_EXEC handling.David S. Miller3-8/+15
2006-03-20[SPARC64]: Fix typo in SUN4V D-TLB miss handler.David S. Miller1-1/+1
2006-03-20[SPARC64]: Kill bogus function externs in asm/pgtable.hDavid S. Miller1-24/+0
2006-03-20[SPARC64]: Add mini-RTC driver for Starfire and SUN4V.David S. Miller1-0/+279
2006-03-20[SPARC64]: Fix bugs in SUN4V cpu mondo dispatch.David S. Miller3-57/+161
2006-03-20[SPARC64]: Fix bugs in SMP TLB context version expiration handling.David S. Miller1-6/+10
2006-03-20[SPARC64]: Fix indexing into kpte_linear_bitmap.David S. Miller1-0/+1
2006-03-20[SPARC64]: Use 13-bit context size always.David S. Miller1-13/+1
2006-03-20[SPARC64]: Avoid dcache-dirty page state management on sun4v.David S. Miller2-23/+30
2006-03-20[SPARC64]: Bulletproof hypervisor TLB flushing.David S. Miller2-26/+80
2006-03-20[SPARC64]: Report mondo error correctly in hypervisor_xcall_deliver().David S. Miller1-1/+1
2006-03-20[SPARC64]: Niagara optimized XOR functions for RAID.David S. Miller3-5/+342
2006-03-20[SPARC64]: Fix binfmt_aout32.c build.Andrew Morton1-1/+1
2006-03-20[SPARC64]: destroy_context() needs to disable interrupts.David S. Miller1-2/+3
2006-03-20[SPARC64]: Fix TLB context allocation with SMT style shared TLBs.David S. Miller4-25/+50
2006-03-20[SPARC64]: Put syscall tables after trap table.David S. Miller1-1/+2
2006-03-20[SPARC64]: Export _PAGE_E and _PAGE_CACHE to modules.David S. Miller1-0/+4
2006-03-20[SPARC64]: Fix %tstate ASI handling in start_thread{,32}()David S. Miller1-3/+4
2006-03-20[SPARC64]: Drop %gl to 0 before re-enabling PSTATE_IE in rtrapDavid S. Miller1-1/+2
2006-03-20[SPARC64]: Create a seperate kernel TSB for 4MB/256MB mappings.David S. Miller3-6/+48
2006-03-20[SPARC64]: Make use of Niagara 256MB PTEs for kernel mappings.David S. Miller2-15/+96