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2017-11-14clk: hisilicon: Delete an error message for a failed memory allocation in his...Markus Elfring1-3/+1
2017-11-14clk: hi3660: fix incorrect uart3 clock freqencyZhong Kaihua1-1/+1
2017-11-02clk: qcom: clk-smd-rpm: add msm8996 rpmclksRajendra Nayak4-0/+101
2017-11-02clk: qcom: Implement RPM clocks for MSM8660/APQ8060Linus Walleij1-0/+93
2017-11-02clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCCLinus Walleij2-0/+5
2017-11-02clk: qcom: Elaborate on "active" clocks in the RPM clock bindingsLinus Walleij1-0/+8
2017-11-02clk: qcom: Remove unused RCG opsGeorgi Djakov2-82/+0
2017-11-02clk: at91: utmi: set the mainck rateLudovic Desroches2-14/+83
2017-11-02clk: qcom: common: Migrate to devm_* APIs for resets and clk providersStephen Boyd1-24/+2
2017-11-02clk: Add devm_of_clk_add_hw_provider()/del_provider() APIsStephen Boyd3-0/+66
2017-11-02clk: make clk_init_data constBhumika Goyal6-55/+55
2017-11-02clk: imx: make clk_ops constBhumika Goyal4-5/+5
2017-11-02clk: mmp: make clk_ops constBhumika Goyal3-3/+3
2017-11-02clk: hisilicon: make clk_ops constBhumika Goyal3-4/+4
2017-11-02clk: mxs: make clk_ops constBhumika Goyal2-2/+2
2017-11-02clk: sirf: make clk_ops constBhumika Goyal1-6/+6
2017-11-02clk: spear: make clk_ops constBhumika Goyal4-5/+5
2017-11-02CLK: SPEAr: make aux_clk_masks structures constBhumika Goyal3-3/+3
2017-11-02CLK: SPEAr: make structure field and function argument as constBhumika Goyal2-3/+3
2017-11-02clk: sunxi: explicitly request exclusive reset controlPhilipp Zabel1-1/+1
2017-11-02clk: sunxi: fix build warningCorentin LABBE1-2/+0
2017-11-01clk: hi6220: mark clock cs_atb_syspll as criticalLeo Yan1-1/+1
2017-11-01clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init()Nicolin Chen1-2/+2
2017-11-01clk: tegra: dfll: Fix drvdata overwriting issueNicolin Chen3-13/+11
2017-11-01clk: tegra: Fix cclk_lp divisor registerMichał Mirosław1-1/+1
2017-11-01clk: tegra: Bump SCLK clock rate to 216 MHzDmitry Osipenko1-1/+1
2017-11-01clk: tegra: Use common definition of APBDMA clock gateDmitry Osipenko1-5/+1
2017-11-01clk: tegra: Correct parent of the APBDMA clockDmitry Osipenko1-1/+1
2017-11-01clk: tegra: Add AHB DMA clock entryDmitry Osipenko4-0/+4
2017-11-01clk: tegra: Mark APB clock as criticalJon Hunter1-1/+1
2017-10-20clk: renesas: rcar-gen3: Restore R clock during resumeGeert Uytterhoeven1-2/+11
2017-10-20clk: renesas: rcar-gen3: Restore SDHI clocks during resumeGeert Uytterhoeven1-13/+50
2017-10-20clk: renesas: div6: Restore clock state during resumeGeert Uytterhoeven3-4/+40
2017-10-20clk: renesas: cpg-mssr: Add support to restore core clocks during resumeGeert Uytterhoeven6-11/+23
2017-10-20clk: renesas: cpg-mssr: Restore module clocks during resumeGeert Uytterhoeven1-0/+84
2017-10-20MAINTAINERS: Add git repository to Renesas clock driver sectionGeert Uytterhoeven1-0/+1
2017-10-20clk: renesas: cpg-mssr: Add du1 clock to R8A7745Fabrizio Castro1-0/+1
2017-10-20clk: renesas: rz: clk-rz is meant for RZ/A1Geert Uytterhoeven2-3/+3
2017-10-20clk: meson: gxbb: Add VPU and VAPB clocks dataNeil Armstrong1-0/+292
2017-10-20clk: meson: gxbb: Add VPU and VAPB clockidsNeil Armstrong2-1/+16
2017-10-19clk: tegra: Make tegra_clk_pll_params __ro_after_initBhumika Goyal1-8/+8
2017-10-19clk: tegra: Fix sor1_out clock implementationThierry Reding2-16/+47
2017-10-19clk: tegra: Use tegra_clk_register_periph_data()Thierry Reding4-13/+4
2017-10-19clk: tegra: Add peripheral clock registration helperThierry Reding2-0/+11
2017-10-19clk: tegra: Check BPMP response return codeTimo Alho1-5/+10
2017-10-17clk: sunxi-ng: sun4i: Export video PLLsJonathan Liu2-2/+4
2017-10-17clk: sunxi-ng: Add A83T display clocksMaxime Ripard1-8/+13
2017-10-17dt-bindings: clock: tegra: Add sor1_out clockThierry Reding1-0/+1
2017-10-17firmware: tegra: Propagate error code to callerTimo Alho2-6/+17
2017-10-16clk: samsung: Add a separate driver for Exynos4412 ISP clocksMarek Szyprowski2-0/+180