linux - linux

	Commit message (Expand)	Author	Files	Lines
2018-06-02	clk: bcm: Update and add Stingray clock entries	Pramod Kumar	1	-15/+120
2018-06-02	dt-bindings: clk: Update Stingray binding doc	Pramod Kumar	2	-19/+31
2018-06-02	clk-si544: Properly round requested frequency to nearest match	Mike Looijmans	1	-0/+1
2018-06-02	clk: ingenic: jz4770: Add 150us delay after enabling VPU clock	Paul Cercueil	1	-1/+1
2018-06-02	clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock	Paul Cercueil	1	-2/+2
2018-06-02	clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle	Paul Cercueil	1	-1/+2
2018-06-02	clk: ingenic: jz4770: Change OTG from custom to standard gated clock	Paul Cercueil	1	-37/+5
2018-06-02	clk: ingenic: Support specifying "wait for clock stable" delay	Paul Cercueil	2	-0/+5
2018-06-02	clk: ingenic: Add support for clocks whose gate bit is inverted	Paul Cercueil	2	-2/+5
2018-06-02	clk: use match_string() helper	Yisheng Xie	1	-6/+2
2018-06-02	clk: bcm2835: use match_string() helper	Yisheng Xie	1	-7/+6
2018-06-02	clk: Return void from debug_init op	Stephen Boyd	4	-21/+16
2018-06-02	clk: remove clk_debugfs_add_file()	Greg Kroah-Hartman	2	-18/+0
2018-06-02	clk: tegra: no need to check return value of debugfs_create functions	Greg Kroah-Hartman	1	-31/+11
2018-06-02	clk: davinci: no need to check return value of debugfs_create functions	Greg Kroah-Hartman	1	-6/+1
2018-06-02	clk: bcm2835: no need to check return value of debugfs_create functions	Greg Kroah-Hartman	1	-4/+2
2018-06-02	clk: no need to check return value of debugfs_create functions	Greg Kroah-Hartman	1	-99/+30
2018-06-02	clk: imx6: add EPIT clock support	Colin Didier	2	-1/+5
2018-06-01	clk: mvebu: use correct bit for 98DX3236 NAND	Chris Packham	1	-1/+1
2018-06-01	clk/driver/hisi: Consolidate the Kconfig for the CLOCK_STUB	Daniel Lezcano	1	-5/+8
2018-06-01	clk: imx7d: reset parent for mipi csi root	Rui Miguel Silva	1	-0/+2
2018-06-01	clk: imx7d: fix mipi dphy div parent	Rui Miguel Silva	1	-1/+1
2018-06-01	clk: qcom: gcc-msm8996: Disable halt check on UFS clocks	Bjorn Andersson	1	-0/+2
2018-06-01	clk: aspeed: Add 24MHz fixed clock	Lei YU	2	-1/+9
2018-06-01	ARM: dts: imx7: correct enet ipg clock	Anson Huang	2	-2/+2
2018-06-01	clk: imx7d: correct enet clock CCGR registers	Anson Huang	2	-6/+8
2018-06-01	clk: imx7d: correct enet phy ref clock gates	Anson Huang	1	-2/+1
2018-06-01	clk: imx6sl: correct ocram_podf clock type	Anson Huang	1	-1/+1
2018-06-01	clk: imx6sx: disable unnecessary clocks during clock initialization	Anson Huang	1	-6/+1
2018-06-01	clk: qcom: Add video clock controller driver for SDM845	Amit Nischal	3	-0/+370
2018-06-01	dt-bindings: clock: Introduce QCOM Video clock bindings	Amit Nischal	2	-0/+54
2018-06-01	clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk	Manu Gautam	1	-0/+4
2018-06-01	clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabled	Rajendra Nayak	2	-12/+12
2018-06-01	clk: qcom: Register the gdscs before the clocks	Rajendra Nayak	1	-16/+16
2018-06-01	clk: qcom: gdsc: Add support for ALWAYS_ON gdscs	Rajendra Nayak	2	-0/+9
2018-06-01	clk: berlin: switch to SPDX license identifier	Jisheng Zhang	9	-108/+9
2018-05-30	clk: davinci: Fix link errors when not all SoCs are enabled	David Lechner	5	-7/+65
2018-05-30	clk: davinci: psc: allow for dev == NULL	David Lechner	6	-18/+57
2018-05-30	clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE	David Lechner	3	-6/+21
2018-05-30	clk: davinci: pll: allow dev == NULL	David Lechner	9	-137/+259
2018-05-30	clk: davinci: psc-dm365: fix few clocks	Sekhar Nori	1	-3/+16
2018-05-30	clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled	Sekhar Nori	1	-1/+1
2018-05-30	clk: davinci: psc-dm355: fix ASP0/1 clkdev lookups	David Lechner	1	-2/+2
2018-05-30	clk: davinci: pll-dm355: fix SYSCLKn parent names	David Lechner	1	-5/+5
2018-05-30	clk: davinci: pll-dm355: drop pll2_sysclk2	David Lechner	1	-4/+1
2018-05-23	clk: rockchip: remove deprecated gate-clk code and dt-binding	Heiko Stuebner	3	-176/+0
2018-05-22	clk: rockchip: use match_string() helper	Yisheng Xie	1	-11/+5
2018-05-21	clk: meson: axg: let mpll clocks round closest	Jerome Brunet	1	-0/+4
2018-05-21	clk: meson: mpll: add round closest support	Jerome Brunet	2	-5/+22
2018-05-21	clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL	Martin Blumenstingl	1	-0/+7