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2019-06-26pwm: meson: Don't duplicate the polarity internallyMartin Blumenstingl1-15/+8
2019-06-26pwm: meson: Change MISC_CLK_SEL_WIDTH to MISC_CLK_SEL_MASKMartin Blumenstingl1-2/+2
2019-06-26pwm: meson: Use GENMASK and FIELD_PREP for the lo and hi valuesMartin Blumenstingl1-2/+6
2019-06-26pwm: meson: Use devm_clk_get_optional() to get the input clockMartin Blumenstingl1-8/+3
2019-06-26pwm: meson: Unify the parameter list of meson_pwm_{enable, disable}Martin Blumenstingl1-8/+7
2019-06-26pwm: jz4740: Force TCU2 channels to return to their init levelPaul Cercueil1-1/+9
2019-06-25pwm: jz4740: Apply configuration atomicallyPaul Cercueil1-25/+12
2019-06-25pwm: jz4740: Remove unused devicetree compatible stringsPaul Cercueil1-2/+0
2019-06-25dt-bindings: pwm: jz47xx: Remove unused compatible stringsPaul Cercueil1-4/+1
2019-06-25pwm: meson: Fix the G12A AO clock parents orderNeil Armstrong1-2/+11
2019-06-25pwm: meson: Update with SPDX Licence identifierNeil Armstrong1-51/+1
2019-06-25pwm: stm32: Use 3 cells ->of_xlate()Fabrice Gasnier1-0/+2
2019-06-25dt-bindings: pwm: stm32: Add #pwm-cellsFabrice Gasnier1-0/+3
2019-06-25pwm: Add consumer device linkFabrice Gasnier2-5/+51
2019-06-25pwm: stm32-lp: Add power management supportFabrice Gasnier1-0/+25
2019-06-25dt-bindings: pwm: stm32-lp: Document pin control sleep stateFabrice Gasnier1-3/+6
2019-06-25pwm: sifive: Add a driver for SiFive SoC PWMYash Shah3-0/+351