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2016-09-21clk: mediatek: clk-mt8173: Unmap region obtained by of_iomapArvind Yadav1-1/+3
2016-09-21clk: sunxi-ng: Fix reset offset for the A23 and A33Maxime Ripard2-16/+16
2016-09-21clk: at91: sckc: optimize boot timeAlexandre Belloni1-1/+1
2016-09-21clk: at91: Add sama5d4 sckc supportAlexandre Belloni2-1/+102
2016-09-21clk: at91: move slow clock controller clocks to sckc.cAlexandre Belloni3-388/+363
2016-09-21clk: imx6: initialize GPU clocksLucas Stach1-0/+18
2016-09-21clk: imx6: fix i.MX6DL clock tree to reflect realityLucas Stach2-13/+19
2016-09-21clk: imx53: Add clocks configurationKalle Kankare2-1/+34
2016-09-17clk: uniphier: add clock data for UniPhier SoCsMasahiro Yamada7-0/+550
2016-09-17clk: uniphier: add core support code for UniPhier clock driverMasahiro Yamada11-0/+536
2016-09-17clk: bcm: Add driver for BCM53573 ILP clockRafał Miłecki3-0/+185
2016-09-17clk: Add USB3 PHY reset linesVivek Gautam2-0/+4
2016-09-17clk: zx: fix pointer case warningsArnd Bergmann1-10/+10
2016-09-17clk/Renesas-MSTP: Use kmalloc_array() in cpg_mstp_clocks_init()Markus Elfring1-1/+1
2016-09-17clk: zx296718: use builtin_platform_driver to simplify the codeWei Yongjun1-5/+1
2016-09-17clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clkChen-Yu Tsai1-1/+1
2016-09-17clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLsChen-Yu Tsai1-10/+10
2016-09-17clk: sunxi-ng: sun6i-a31: Set CLK_SET_RATE_PARENT for display output clocksChen-Yu Tsai1-9/+13
2016-09-17drivers: clk: st: Handle clk synchronous mode for video clocksGabriel Fernandez2-2/+37
2016-09-17drivers: clk: st: Add clock propagation for audio clocksGabriel Fernandez2-1/+27
2016-09-17drivers: clk: st: Add fs660c32 synthesizer algorithmGabriel Fernandez1-69/+111
2016-09-17drivers: clk: st: Simplify clock binding of STiH4xx platformsGabriel Fernandez7-88/+65
2016-09-17drivers: clk: st: Remove stih415-416 clock supportGabriel Fernandez10-1639/+37
2016-09-15clk: at91: Migrate to clk_hw based registration and OF APIsStephen Boyd13-199/+277
2016-09-15clk: bcm2835: Migrate to clk_hw based registration and OF APIsStephen Boyd2-55/+58
2016-09-15clk: iproc: Make clocks visible optionsJon Mason3-6/+32
2016-09-14clk: xgene: Add PMD clockHoan Tran1-0/+221
2016-09-14Documentation: dt: xgene: Add PMD clock bindingHoan Tran1-0/+18
2016-09-14clk: zx: register ZX296718 clocksJun Nie5-0/+1248
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie2-9/+16
2016-09-14clk: zx: register ZX296718 clocksJun Nie5-0/+1248
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie2-9/+16
2016-09-14clk-kona-setup: Use kmalloc_array() in parent_process()Markus Elfring1-2/+2
2016-09-14ARM: clk-imx35: annotate clk enum with number valuesUwe Kleine-König1-14/+16
2016-09-14ARM: clk-imx35: fix name for ckil clkUwe Kleine-König1-1/+1
2016-09-14clk: meson: fix CLKID_GCLK_VENCI_INT typoArnd Bergmann1-1/+1
2016-09-14clk: mmp: add missing header dependenciesBaoyou Xie1-0/+1
2016-09-14meson: clk: Use builtin_platform_driver to simplify the codeWei Yongjun1-5/+1
2016-09-12clk: renesas: r8a7796: Add CMT clocksBui Duc Phuc1-0/+4
2016-09-12clk: renesas: r8a7795: Add CMT clocksBui Duc Phuc1-0/+4
2016-09-12clk: renesas: r8a7796: Add RAVB clockLaurent Pinchart1-0/+1
2016-09-10clk: sunxi-ng: Add hardware dependencyJean Delvare1-0/+1
2016-09-10clk: sunxi-ng: Add A23 CCUMaxime Ripard4-0/+751
2016-09-10clk: sunxi-ng: Add A33 CCU supportMaxime Ripard7-0/+1071
2016-09-10clk: sunxi-ng: Add N-class clocks supportMaxime Ripard4-0/+173
2016-09-10clk: sunxi-ng: mux: Add mux table macroMaxime Ripard1-13/+13
2016-09-10clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard5-33/+55
2016-09-10clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structureMaxime Ripard1-0/+14
2016-09-10clk: sunxi-ng: div: Add mux table macrosMaxime Ripard1-7/+21
2016-09-09clk: rk808: Pass the right pointer as the get_hw contextTomeu Vizoso1-1/+1