summaryrefslogtreecommitdiffstats
path: root/security (unfollow)
Commit message (Expand)AuthorFilesLines
2022-10-13riscv: enable software resend of irqsConor Dooley1-0/+1
2022-10-13RISC-V: Re-enable counter access from userspacePalmer Dabbelt1-2/+5
2022-10-13riscv: vdso: fix NULL deference in vdso_join_timens() when vforkJisheng Zhang2-4/+10
2022-10-13riscv: Add cache information in AUX vectorGreentime Hu2-1/+7
2022-10-13soc: sifive: ccache: define the macro for the register shiftsZong Li1-5/+11
2022-10-13soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixesBen Dooks1-7/+10
2022-10-13soc: sifive: ccache: reduce printing on initBen Dooks1-14/+11
2022-10-13soc: sifive: ccache: determine the cache level from dtsZong Li1-1/+5
2022-10-13soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.Greentime Hu8-264/+272
2022-10-13dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cacheZong Li1-5/+23
2022-10-13riscv: check for kernel config option in t-head memory types errataHeiko Stuebner1-0/+3
2022-10-13riscv: use BIT() marco for cpufeature probingHeiko Stuebner1-2/+2
2022-10-13riscv: use BIT() macros in t-head errata initHeiko Stuebner1-2/+2
2022-10-13riscv: drop some idefs from CMO initializationHeiko Stuebner3-17/+14
2022-10-13riscv: cleanup svpbmt cpufeature probingHeiko Stuebner1-8/+5
2022-10-13riscv: Pass -mno-relax only on lld < 15.0.0Fangrui Song1-0/+2
2022-10-13RISC-V: Avoid dereferening NULL regs in die()Palmer Dabbelt1-3/+6
2022-10-13dt-bindings: riscv: add new riscv,isa strings for emulatorsConor Dooley1-3/+2
2022-10-13dt-bindings: interrupt-controller: sifive,plic: add legacy riscv compatibleConor Dooley1-0/+5
2022-10-13dt-bindings: timer: sifive,clint: add legacy riscv compatibleConor Dooley1-6/+12
2022-10-12doc: RISC-V: Document that misaligned accesses are supportedPalmer Dabbelt2-0/+7
2022-10-12riscv: always honor the CONFIG_CMDLINE_FORCE when parsing dtbWenting Zhang1-2/+2
2022-10-11dt-bindings: riscv: update microchip.yaml's maintainershipConor Dooley2-2/+3
2022-10-11MAINTAINERS: update polarfire soc clock bindingConor Dooley1-1/+1
2022-10-07riscv: dts: microchip: fix fabric i2c reg sizeConor Dooley1-1/+1
2022-10-07riscv: enable THP_SWAP for RV64Jisheng Zhang1-0/+1
2022-10-07RISC-V: Print SSTC in canonical orderPalmer Dabbelt1-1/+1
2022-10-07Revert "drm/sched: Use parent fence instead of finished"Dave Airlie1-2/+2
2022-10-06mailbox: qcom-ipcc: flag IRQ NO_THREADEric Chanudet1-1/+2
2022-10-06mailbox: pcc: Fix spelling mistake "Plaform" -> "Platform"Colin Ian King1-1/+1
2022-10-06mailbox: bcm-ferxrm-mailbox: Fix error check for dma_map_sgJack Wang1-4/+4
2022-10-06mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock supportRobert Marko1-1/+1
2022-10-06dt-bindings: mailbox: qcom: correct clocks for IPQ6018 and IPQ8074Robert Marko1-12/+34
2022-10-06dt-bindings: mailbox: qcom: set correct #clock-cellsRobert Marko1-1/+16
2022-10-06mailbox: mpfs: account for mbox offsets while sendingConor Dooley1-4/+3
2022-10-06mailbox: mpfs: fix handling of the reg propertyConor Dooley1-10/+14
2022-10-06dt-bindings: mailbox: fix the mpfs' reg propertyConor Dooley1-4/+11
2022-10-06mailbox: imx: fix RST channel supportPeng Fan1-5/+5
2022-10-06riscv: compat: s/failed/unsupported if compat mode isn't supportedJisheng Zhang1-1/+1
2022-10-05power: supply: ab8500: remove unused static local variableTom Rix1-2/+0
2022-10-05docs:kselftest: fix kselftest_module.h path of example moduleHoi Pok Wu1-1/+1
2022-10-05cpufreq: amd-pstate: Add explanation for X86_AMD_PSTATE_UTMeng Li2-0/+9
2022-10-05selftests/cpu-hotplug: Add log info when test successZhao Gongyi1-1/+1
2022-10-05selftests/cpu-hotplug: Reserve one cpu online at leastZhao Gongyi1-18/+22
2022-10-05selftests/cpu-hotplug: Delete fault injection related codeZhao Gongyi2-82/+6
2022-10-05selftests/cpu-hotplug: Use return instead of exitZhao Gongyi1-5/+8
2022-10-05selftests/cpu-hotplug: Correct log infoZhao Gongyi1-1/+1
2022-10-05cpufreq: amd-pstate: modify type in argument 2 for filp_openMeng Li1-1/+1
2022-10-05Documentation: amd-pstate: Add unit test introductionMeng Li1-0/+76
2022-10-05selftests: amd-pstate: Add test trigger for amd-pstate driverMeng Li4-0/+66