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2020-10-02mtd: parsers: bcm63xx: Do not make it modularFlorian Fainelli1-1/+1
With commit 91e81150d388 ("mtd: parsers: bcm63xx: simplify CFE detection"), we generate a reference to fw_arg3 which is the fourth firmware/command line argument on MIPS platforms. That symbol is not exported and would cause a linking failure. The parser is typically necessary to boot a BCM63xx-based system anyway so having it be part of the kernel image makes sense, therefore make it 'bool' instead of 'tristate'. Fixes: 91e81150d388 ("mtd: parsers: bcm63xx: simplify CFE detection") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929172726.30469-1-f.fainelli@gmail.com
2020-10-02mtd: spear_smi: Enable compile testingMiquel Raynal1-1/+1
This driver does not contain any architecture specific code, enable compile testing it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200928155715.14370-1-miquel.raynal@bootlin.com
2020-10-02mtd: maps: vmu-flash: fix typos for struct memcardBernard Zhao1-2/+2
Change struct memcard`s element "removeable" -> "removable". Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200922112814.26761-1-bernard@vivo.com
2020-10-02mtd: physmap: Add Baikal-T1 physically mapped ROM supportSerge Semin5-0/+160
Baikal-T1 Boot Controller provides an access to a RO storages, which are physically mapped into the SoC MMIO space. In particularly there are Internal ROM embedded into the SoC with a pre-installed firmware, externally attached SPI flash (also accessed in the read-only mode) and a memory region, which mirrors one of them in accordance with the currently enabled system boot mode (also called Boot ROM). This commit adds the Internal ROM support to the physmap driver of the MTD kernel subsystem. The driver will create the Internal ROM MTD as long as it is defined in the system dts file. The physically mapped SPI flash region will be used to implement the SPI-mem interface. The mirroring memory region won't be accessible directly since it's redundant due to both bootable regions being exposed anyway. Note we had to create a dedicated code for the ROMs since read from the corresponding memory regions must be done via the dword-aligned addresses. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru> Cc: Lee Jones <lee.jones@linaro.org> Cc: linux-mips@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200920111445.21816-1-Sergey.Semin@baikalelectronics.ru
2020-10-02mtd: maps: vmu-flash: simplify the return expression of probe_maple_vmuLiu Shixin1-6/+1
Simplify the return expression. Signed-off-by: Liu Shixin <liushixin2@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200919100854.1639267-1-liushixin2@huawei.com
2020-09-30mtd: onenand: simplify the return expression of onenand_transfer_auto_oobLiu Shixin1-7/+2
Simplify the return expression. Signed-off-by: Liu Shixin <liushixin2@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200921082441.2591669-1-liushixin2@huawei.com
2020-09-30mtd: rawnand: cadence: remove a redundant dev_err callLiu Shixin1-6/+2
There is an error message within devm_ioremap_resource already, so remove the dev_err call to avoid a redundant error message. Signed-off-by: Liu Shixin <liushixin2@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200921013805.1724606-1-liushixin2@huawei.com
2020-09-30mtd: rawnand: ams-delta: Fix non-OF build warningJanusz Krzysztofik1-0/+2
Commit 7c2f66a960fc ("mtd: rawnand: ams-delta: Add module device tables") introduced an OF module device table but wrapped a reference to it with of_match_ptr() which resolves to NULL in non-OF configs. That resulted in a clang compiler warning on unused variable in non-OF builds. Fix it. drivers/mtd/nand/raw/ams-delta.c:373:34: warning: unused variable 'gpio_nand_of_id_table' [-Wunused-const-variable] static const struct of_device_id gpio_nand_of_id_table[] = { ^ 1 warning generated. Fixes: 7c2f66a960fc ("mtd: rawnand: ams-delta: Add module device tables") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200919080403.17520-1-jmkrzyszt@gmail.com
2020-09-30mtd: rawnand: Don't overwrite the error code from nand_set_ecc_soft_ops()Tudor Ambarus1-3/+1
The error code received from nand_set_ecc_soft_ops() was overwritten, drop this redundant assignment and use the error code received from the callee. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200917075213.532161-4-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: Introduce nand_set_ecc_on_host_ops()Tudor Ambarus1-53/+61
There were too many levels of indentation and the code was hard to read. Introduce a new function, similar to nand_set_ecc_soft_ops(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200917075213.532161-3-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: atmel: Check return values for nand_read_data_opAlex Dewar1-2/+8
In atmel_nand_pmecc_read_pg(), nand_read_data_op() is called twice without the return values being checked for errors. Add these checks. Signed-off-by: Alex Dewar <alex.dewar90@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200914214245.14626-1-alex.dewar90@gmail.com
2020-09-30mtd: rawnand: vf610: Remove unused function vf610_nfc_transfer_size()YueHaibing1-5/+0
commit ecc40b8df59a ("mtd: rawnand: vf610_nfc: remove old hooks") left behind this, remove it. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200909134318.36340-1-yuehaibing@huawei.com
2020-09-30mtd: rawnand: qcom: Simplify with dev_err_probe()Krzysztof Kozlowski1-16/+8
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200901142535.12819-6-krzk@kernel.org
2020-09-30mtd: rawnand: marvell: Fix and update kerneldocKrzysztof Kozlowski1-7/+16
Fix kerneldoc comments and add missing documentation for members to fix W=1 compile warnings like: drivers/mtd/nand/raw/marvell_nand.c:251: warning: cannot understand function prototype: 'struct marvell_hw_ecc_layout ' drivers/mtd/nand/raw/marvell_nand.c:342: warning: Function parameter or member 'layout' not described in 'marvell_nand_chip' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200901142535.12819-5-krzk@kernel.org
2020-09-30mtd: rawnand: marvell: Simplify with dev_err_probe()Krzysztof Kozlowski1-4/+1
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200901142535.12819-4-krzk@kernel.org
2020-09-30mtd: rawnand: gpmi: Simplify with dev_err_probe()Krzysztof Kozlowski1-4/+2
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200901142535.12819-3-krzk@kernel.org
2020-09-30mtd: rawnand: atmel: Simplify with dev_err_probe()Krzysztof Kozlowski1-7/+3
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200901142535.12819-2-krzk@kernel.org
2020-09-30mtd: onenand: Simplify with dev_err_probe()Krzysztof Kozlowski1-4/+1
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200901142535.12819-1-krzk@kernel.org
2020-09-30mtd: rawnand: marvell: Support panic_write for mtdoopsChris Packham1-5/+33
Under a panic context we can't get an interrupt. Actively poll for the RB status when performing a panic_write. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200828011237.22066-1-chris.packham@alliedtelesis.co.nz
2020-09-30mtd: spinand: gigadevice: Add support for GD5F4GQ4xCHauke Mehrtens1-0/+49
This adds support for the following 4GiB chips: GD5F4GQ4RCYIG 1.8V GD5F4GQ4UCYIG 3.3V The datasheet can be found here: https://www.novitronic.ch/sixcms/media.php/2/DS-00173-GD5F4GQ4xCxIG-Rev1.574695.pdf The GD5F4GQ4UCYIGT (3.3V) version is used on the Imagination Technologies Creator Ci40 (Marduk), the 1.8V version was not tested. This device only works in single SPI mode and not in dual or quad mode for me on this board. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200820165121.3192-4-hauke@hauke-m.de
2020-09-30mtd: spinand: gigadevice: Add QE BitHauke Mehrtens1-5/+5
The following GigaDevice chips have the QE BIT in the feature flags, I checked the datasheets, but did not try this. * GD5F1GQ4xExxG * GD5F1GQ4xFxxG * GD5F1GQ4UAYIG * GD5F4GQ4UAYIG The Quad operations like 0xEB mention that the QE bit has to be set. Fixes: c93c613214ac ("mtd: spinand: add support for GigaDevice GD5FxGQ4xA") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200820165121.3192-3-hauke@hauke-m.de
2020-09-30mtd: spinand: gigadevice: Only one dummy byte in QUADIOHauke Mehrtens1-2/+2
The datasheet only lists one dummy byte in the 0xEH operation for the following chips: * GD5F1GQ4xExxG * GD5F1GQ4xFxxG * GD5F1GQ4UAYIG * GD5F4GQ4UAYIG Fixes: c93c613214ac ("mtd: spinand: add support for GigaDevice GD5FxGQ4xA") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200820165121.3192-2-hauke@hauke-m.de
2020-09-30mtd: rawnand: vf610: disable clk on error handling path in probeEvgeny Novikov1-2/+4
vf610_nfc_probe() does not invoke clk_disable_unprepare() on one error handling path. The patch fixes that. Found by Linux Driver Verification project (linuxtesting.org). Fixes: 6f0ce4dfc5a3 ("mtd: rawnand: vf610: Avoid a potential NULL pointer dereference") Signed-off-by: Evgeny Novikov <novikov@ispras.ru> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200806072634.23528-1-novikov@ispras.ru
2020-09-30mtd: rawnand: oxnas: cleanup/simplify codePavel Machek1-2/+1
Simplify oxnas_nand_probe. Signed-off-by: Pavel Machek (CIP) <pavel@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200724083825.GA31437@amd
2020-09-30mtd: spinand: macronix: Add support for MX31UF1GE4BCYouChing Lin1-0/+10
The Macronix MX31UF1GE4BC is a 1.8V, 1Gbit (128MB) serial NAND flash device. Validated by read, erase, read back, write and read back on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host (driver/spi/spi-mxic.c). Signed-off-by: YouChing Lin <ycllin@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1595404978-31079-3-git-send-email-ycllin@mxic.com.tw
2020-09-30mtd: spinand: macronix: Add support for MX31LF1GE4BCYouChing Lin1-0/+10
The Macronix MX31LF1GE4BC is a 3V, 1Gbit (128MB) serial NAND flash device. Validated by read, erase, read back, write and read back on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host (driver/spi/spi-mxic.c). Signed-off-by: YouChing Lin <ycllin@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1595404978-31079-2-git-send-email-ycllin@mxic.com.tw
2020-09-30mtd: rawnand: pasemi: Make pasemi_device_ready() staticWei Yongjun1-1/+1
The sparse tool complains as follows: drivers/mtd/nand/raw/pasemi_nand.c:71:5: warning: symbol 'pasemi_device_ready' was not declared. Should it be static? This function is not used outside of pasemi_nand.c, so this commit marks it static. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200721151657.41027-1-weiyongjun1@huawei.com
2020-09-30mtd: rawnand: stm32_fmc2: fix a buffer overflowChristophe Kerello1-1/+1
This patch solves following static checker warning: drivers/mtd/nand/raw/stm32_fmc2_nand.c:350 stm32_fmc2_nfc_select_chip() error: buffer overflow 'nfc->data_phys_addr' 2 <= 2 The CS value can only be 0 or 1. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1595325127-32693-1-git-send-email-christophe.kerello@st.com
2020-09-30mtd: rawnand: atmel: Get rid of the legacy interface implementationBoris Brezillon1-197/+1
Now that exec_op() is implemented, we can get rid of all the legacy hooks. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200720131356.1579073-7-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: atmel: Convert the driver to exec_op()Boris Brezillon1-0/+267
Both SMC and HSMC are converted to exec_op(). Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200720131356.1579073-6-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: atmel: Use nand_prog_page_end_op()Boris Brezillon1-14/+2
The nand_prog_page_end_op() sequence is open-coded in atmel_hsmc_nand_pmecc_write_pg(). Let's use the generic helper here. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200720131356.1579073-5-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: atmel: Use nand_{write,read}_data_op()Boris Brezillon1-5/+5
Use the nand_{write,read}_data_op() helpers instead of calling the atmel_nand_{read,write}_buf() functions directly. This will ease the transition to exec_op(). Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200720131356.1579073-4-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: atmel: Drop redundant nand_read_page_op()Boris Brezillon1-4/+1
The legacy page read path in atmel_hsmc_nand_pmecc_read_pg() issues a nand_read_page_op() that's already issued by atmel_nand_pmecc_read_pg(). Let's get rid of the unneeded one. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200720131356.1579073-3-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: atmel: Enable the NFC controller at probe timeBoris Brezillon1-6/+6
No need to enable it everytime select_chip() is called. If we really care about PM, we should implement runtime PM hooks and disable the controller and all its clocks when the controller has been unused for some time. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200720131356.1579073-2-tudor.ambarus@microchip.com
2020-09-30mtd: rawnand: Use the NAND framework user_conf object for ECC flagsMiquel Raynal6-13/+15
Instead of storing the ECC flags in chip->ecc.options, use nanddev->ecc.user_conf.flags. There is currently only one to save: NAND_ECC_MAXIMIZE. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-21-miquel.raynal@bootlin.com
2020-09-30mtd: rawnand: Use the ECC framework user input parsing bitsMiquel Raynal2-84/+70
Many helpers are generic to all NAND chips, they should not be raw-NAND specific, so use the generic ones. To avoid moving all the raw NAND core "history" into the generic NAND layer, we keep a part of this parsing in the raw NAND core to ensure backward compatibility. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-20-miquel.raynal@bootlin.com
2020-09-30mtd: rawnand: Use the ECC framework nand_ecc_is_strong_enough() helperMiquel Raynal1-38/+1
Plus, the new helper has a more "english" name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-19-miquel.raynal@bootlin.com
2020-09-30mtd: rawnand: Use the ECC framework OOB layoutsMiquel Raynal9-176/+20
No need to have our own in the raw NAND core. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-18-miquel.raynal@bootlin.com
2020-09-29mtd: spi-nor: winbond: Add support for w25q64jwmIkjoon Jang1-0/+9
Add support Winbond w25q{64,128,256}jwm which are identical to existing w25q32jwm except for their sizes. This was tested with w25q64jwm, basic erase/write/readback and lock/unlock both lower/upper blocks were okay. Signed-off-by: ikjn@chromium.org <ikjn@chromium.org> Signed-off-by: Xingyu Wu <wuxy@bitland.corp-partner.google.com> Signed-off-by: ST Lin <stlin2@winbond.com> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Ikjoon Jang <ikjn@chromium.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200928060631.2090541-1-ikjn@chromium.org
2020-09-29mtd: spi-nor: intel-spi: Add support for Intel Alder Lake-S SPI serial flashMika Westerberg1-0/+1
Intel Alder Lake-S has the same SPI serial flash controller as Cannon Lake. Add Alder Lake-S PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200925095109.51148-1-mika.westerberg@linux.intel.com
2020-09-29mtd: spi-nor: macronix: Add SECT_4K to mx25l12805dRobert Marko1-1/+1
According to the mx25l12805d datasheet it supports using 4K or 64K sectors. So lets add the SECT_4K to enable 4K sector usage. Datasheet: https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200915100623.708736-1-robert.marko@sartura.hr
2020-09-29mtd: spi-nor: Prefer asynchronous probeDouglas Anderson1-0/+1
On my system the spi_nor_probe() took ~6 ms at bootup. That's not a lot, but every little bit adds up to a slow bootup. While we can get this out of the boot path by making it a module, there are times where it is convenient (or even required) for this to be builtin the kernel. Let's set that we prefer async probe so that we don't block other drivers from probing while we are probing. This is a tiny little change that is almost guaranteed to be safe for anything that is able to run as a module, which SPI_NOR is. Specifically modules are already probed asynchronously. Also: since other things in the system may have enabled asynchronous probe the system may already be doing other things during our probe. There is a small possibility that some other driver that was a client of SPI_NOR didn't handle -EPROBE_DEFER and was relying on probe ordering and only worked when the SPI_NOR and the SPI bus were builtin. In that case the other driver has a bug that's waiting to hit and the other driver should be fixed. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200902160002.1.I658d1c0db9adfeb9a59bc55e96a19e192c959e55@changeid
2020-09-28mtd: rawnand: Make use of the ECC frameworkMiquel Raynal2-0/+2
Just enable the ECC framework with raw NAND so that we can drop, one by one, all the unnecessary/redundant definitions. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-17-miquel.raynal@bootlin.com
2020-09-28mtd: nand: Use the new generic ECC objectMiquel Raynal1-7/+7
Embed a generic NAND ECC high-level object in the nand_device structure to carry all the ECC engine configuration/data. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-16-miquel.raynal@bootlin.com
2020-09-28mtd: rawnand: Use nanddev_get/set_ecc_requirements() when relevantMiquel Raynal16-86/+144
Instead of accessing ->strength/step_size directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-15-miquel.raynal@bootlin.com
2020-09-28mtd: nand: Create helpers to set/extract the ECC requirementsMiquel Raynal1-0/+24
Despite its current name, the eccreq field actually encodes both the NAND requirements and the final ECC configuration. That works fine when using on-die ECC since those 2 concepts match perfectly, but it starts being a problem as soon as we use on-host ECC engines, where we're not guaranteed to have a perfect match. Let's hide the ECC requirements access behind helpers so we can later split those 2 concepts. As the structures have not been clarified yet, these helpers access the same internal variable as nanddev_get_ecc_conf() for now. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-14-miquel.raynal@bootlin.com
2020-09-28mtd: spinand: Use nanddev_get_ecc_conf() when relevantMiquel Raynal3-9/+10
Instead of accessing ->strength/step_size directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-13-miquel.raynal@bootlin.com
2020-09-28mtd: nand: Create a helper to extract the ECC configurationMiquel Raynal1-0/+10
Despite its current name, the eccreq field actually encodes both the NAND requirements and the final ECC configuration. That works fine when using on-die ECC since those 2 concepts match perfectly, but it starts being a problem as soon as we use on-host ECC engines, where we're not guaranteed to have a perfect match. Let's hide the ECC configuration access behind a helper so we can later split those 2 concepts. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-12-miquel.raynal@bootlin.com
2020-09-28mtd: rawnand: Use the new ECC engine type enumerationMiquel Raynal78-213/+239
Mechanical switch from the legacy "mode" enumeration to the new "engine type" enumeration in drivers and board files. The device tree parsing is also updated to return the new enumeration from the old strings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
2020-09-28mtd: rawnand: Separate the ECC engine type and the ECC byte placementMiquel Raynal10-48/+71
The use of "syndrome" placement should not be encoded in the ECC engine mode/type. Create a "placement" field in NAND chip and change all occurrences of the NAND_ECC_HW_SYNDROME enumeration to be just NAND_ECC_HW and possibly a placement entry like NAND_ECC_PLACEMENT_INTERLEAVED. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-10-miquel.raynal@bootlin.com
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