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2012-11-11drm/i915: implement WaForceL3Serialization on VLV and IVBJesse Barnes1-0/+4
2012-11-11drm/i915: implement WaDisableDopClockGatingisable on VLV and IVBJesse Barnes4-1/+26
2012-11-11drm/i915: implement WaDisableL3CacheAging on VLVJesse Barnes2-1/+2
2012-11-11drm/i915: fix Haswell FDI link disable pathPaulo Zanoni3-3/+30
2012-11-11drm/i915: fix Haswell FDI link training codePaulo Zanoni3-65/+82
2012-11-11drm/i915: remove HAS_eDP as unnecessary and inconsistent indirectionJani Nikula1-5/+5
2012-11-11drm/i915: set the correct number of FDI lanes on HaswellPaulo Zanoni1-2/+3
2012-11-11drm/i915: kill pch_init_clock_gating indirectionDaniel Vetter2-41/+38
2012-11-11drm/i915: implement WADP0ClockGatingDisableDaniel Vetter2-0/+10
2012-11-11drm/i915: CPT+ pch transcoder workaroundDaniel Vetter3-17/+27
2012-11-11drm/i915: drop unnecessary check from fdi_link_train codeDaniel Vetter1-9/+5
2012-11-11drm/i915: check whether the pch is the soulmate of the cpuDaniel Vetter1-0/+4
2012-11-11drm/i915: move panel connectors to the frontDaniel Vetter1-11/+7
2012-11-11drm: add helper to sort panels to the head of the connector listDaniel Vetter2-0/+20
2012-11-11drm/i915: don't assert disabled FDI before disabling the FDIPaulo Zanoni1-7/+2
2012-11-11drm/i915: don't call intel_disable_pch_pll on Haswell/LPTPaulo Zanoni1-1/+0
2012-11-11drm/i915: implement timing override workarounds on LPTPaulo Zanoni1-0/+10
2012-11-11drm/i915: use CPU and PCH transcoders on lpt_disable_pch_transcoderPaulo Zanoni1-10/+8
2012-11-11drm/i915: Add SURFLIVE register definitionsVille Syrjälä1-0/+7
2012-11-11drm/i915: use PIPECONF_INTERLACE_MASK_HSW on lpt_enable_pch_transcoderPaulo Zanoni1-1/+2
2012-11-11drm/i915: don't assert_pch_ports_disabled on LPTPaulo Zanoni1-3/+0
2012-11-11drm/i915: don't rely on previous values when setting LPT TRANSCONFPaulo Zanoni1-3/+2
2012-11-11drm/i915: use CPU and PCH transcoders on lpt_enable_pch_transcoderPaulo Zanoni1-15/+9
2012-11-11drm/i915: don't assert_pch_pll_enabled on lpt_enable_pch_transcoderPaulo Zanoni1-6/+0
2012-11-11drm/i915: remove IBX code from lpt_enable_pch_transcoderPaulo Zanoni1-14/+1
2012-11-11drm/i915: remove Haswell code from ironlake_enable_pch_transcoderPaulo Zanoni1-4/+0
2012-11-11drm/i915: fork lpt version of ironlake_{en, dis}able_pch_transcoderPaulo Zanoni1-2/+75
2012-11-11drm/i915: rename intel_{en, dis}able_transcoderPaulo Zanoni1-8/+8
2012-11-11drm/i915: use the CPU and PCH transcoders on lpt_pch_enablePaulo Zanoni1-9/+10
2012-11-11drm/i915: don't assert_panel_unlocked on LPTPaulo Zanoni1-2/+1
2012-11-11drm/i915: don't call ironlake_enable_pch_pll on lpt_pch_enablePaulo Zanoni1-9/+0
2012-11-11drm/i915: rename intel_enable_pch_pll to ironlake_enable_pch_pllPaulo Zanoni1-4/+4
2012-11-11drm/i915: remove ironlake bits from lpt_pch_enablePaulo Zanoni1-68/+1
2012-11-11drm/i915: remove Haswell/LPT bits from ironlake_pch_enablePaulo Zanoni1-6/+2
2012-11-11drm/i915: add lpt_pch_enablePaulo Zanoni1-1/+110
2012-11-11drm/i915: use intel_ddi_get_hw_state on CRT encoder tooPaulo Zanoni1-1/+4
2012-11-11drm/i915: don't set ADPA pipe select on LPTPaulo Zanoni1-1/+3
2012-11-11drm/i915: move encoder->mode_set calls to crtc_mode_setDaniel Vetter1-15/+15
2012-11-11drm/i915: Introduce intel_crtc_update_sarea_pos()Ville Syrjälä1-15/+28
2012-11-11drm/i915: Bad pixel formats can't reach the sprite codeVille Syrjälä1-6/+2
2012-11-11drm/i915: pixel_size == cppVille Syrjälä1-16/+3
2012-11-11drm/i915: Check the framebuffer offsetVille Syrjälä1-0/+4
2012-11-11drm/i915: Check framebuffer stride more thoroughlyVille Syrjälä1-0/+8
2012-11-11drm/i915: Fix display pixel format handlingVille Syrjälä2-37/+74
2012-11-11drm/i915: move more pte encoding to pte encodeBen Widawsky1-29/+27
2012-11-11drm/i915: Extract PPGTT pte encodingBen Widawsky1-5/+16
2012-11-11drm/i915: introduce gtt_pte_tBen Widawsky1-6/+8
2012-11-11drm/i915: Add dev to ppgttBen Widawsky2-2/+4
2012-11-11drm/i915: No LLC_MLC for HSW.Ben Widawsky1-3/+7
2012-11-11drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpathsMika Kuoppala1-1/+1