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2016-03-17clk: bcm2835: add missing PLL clock dividersMartin Sperl2-0/+37
2016-03-17clk: bcm2835: enable management of PCM clockMartin Sperl2-0/+8
2016-03-17clk: bcm2835: reorganize bcm2835_clock_array assignmentMartin Sperl1-459/+393
2016-03-17clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driverMartin Sperl2-75/+94
2016-03-17clk: bcm2835: expose raw clock-registers via debugfsMartin Sperl1-0/+101
2016-03-17clk: bcm2835: clean up coding style issuesMartin Sperl1-6/+2
2016-03-17clk: bcm2835: correctly enable fractional clock supportMartin Sperl1-6/+39
2016-03-17clk: bcm2835: divider value has to be 1 or moreMartin Sperl1-2/+3
2016-03-17clk: bcm2835: add locking to pll*_on/off methodsMartin Sperl1-0/+4
2016-03-17clk: bcm2835: pll_off should only update CM_PLL_ANARSTMartin Sperl1-2/+8
2016-03-16clk: bcm2835: fix check of error code returned by devm_ioremap_resource()Vladimir Zapolskiy1-2/+2
2016-03-16clk: renesas: div6: use RENESAS for #defineSimon Horman1-2/+2
2016-03-16clk: renesas: Rename header file renesas.hSimon Horman13-14/+14
2016-03-15clk: max77{686,802}: Remove CLK_IS_ROOTStephen Boyd2-5/+0
2016-03-15clk: versatile: Remove CLK_IS_ROOTStephen Boyd4-9/+6
2016-03-15clk: sunxi: Remove use of variable length arrayStephen Boyd1-2/+9
2016-03-04clk: fixed-rate: Remove CLK_IS_ROOTStephen Boyd1-2/+1
2016-03-04clk: qcom: Remove CLK_IS_ROOTStephen Boyd7-152/+2