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2022-08-13io_uring: make io_kiocb_to_cmd() typesafeStefan Metzmacher20-129/+134
2022-08-13fs: don't randomize struct kiocb fieldsKeith Busch1-5/+0
2022-08-12dt-bindings: chrome: google,cros-ec-typec: restrict allowed propertiesKrzysztof Kozlowski1-2/+13
2022-08-12dt-bindings: Drop Dan Murphy and Ricardo Rivera-MatosKrzysztof Kozlowski11-13/+11
2022-08-12dt-bindings: Drop Robert JonesKrzysztof Kozlowski2-2/+1
2022-08-12dt-bindings: Drop Beniamin Bia and Stefan PopaKrzysztof Kozlowski4-5/+2
2022-08-12dt-bindings: iio: Drop Bogdan PricopKrzysztof Kozlowski1-1/+1
2022-08-12dt-bindings: iio: Drop Joachim EastwoodKrzysztof Kozlowski2-2/+1
2022-08-12lib: remove lib/nodemask.cYury Norov1-23/+0
2022-08-12dt-bindings: gpio: sifive: add gpio-line-namesAtul Khare1-0/+4
2022-08-12wireguard: selftests: set CONFIG_NONPORTABLE on riscv32Jason A. Donenfeld1-0/+1
2022-08-12RISC-V: KVM: Support sstc extensionAtish Patra4-7/+153
2022-08-12block: Do not call blk_put_queue() if gendisk allocation failsRafael Mendonca1-3/+1
2022-08-12docs/zh_CN/LoongArch: Add I14 descriptionTiezhu Yang1-2/+2
2022-08-12docs/LoongArch: Add I14 descriptionTiezhu Yang1-1/+1
2022-08-12LoongArch: Update Loongson-3 default config fileHuacai Chen1-1/+33
2022-08-12LoongArch: Add USER_STACKTRACE supportQing Zhang3-0/+47
2022-08-12LoongArch: Add STACKTRACE supportQing Zhang8-6/+93
2022-08-12LoongArch: Add prologue unwinder supportQing Zhang6-1/+259
2022-08-12LoongArch: Add guess unwinder supportQing Zhang7-11/+200
2022-08-12LoongArch: Add vDSO syscall __vdso_getcpu()Huacai Chen6-12/+75
2022-08-12LoongArch: Add PCI controller supportHuacai Chen8-10/+321
2022-08-12LoongArch: Parse MADT to get multi-processor informationHuacai Chen4-7/+40
2022-08-12LoongArch: Jump to the link address before enable PGHuacai Chen1-8/+11
2022-08-12LoongArch: Requires __force attributes for any castsQing Zhang1-2/+2
2022-08-12LoongArch: Fix unsigned comparison with less than zeroYang Li1-1/+1
2022-08-12LoongArch: Adjust arch/loongarch/KconfigHuacai Chen1-1/+4
2022-08-12LoongArch: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACKHuacai Chen1-1/+1
2022-08-11RISC-V: Improve SBI definitionsAtish Patra1-2/+16
2022-08-11RISC-V: Move counter info definition to sbi header fileAtish Patra2-14/+14
2022-08-11RISC-V: Fix SBI PMU calls for RV32Atish Patra1-0/+10
2022-08-11RISC-V: Update user page mapping only once during startAtish Patra2-1/+1
2022-08-11RISC-V: Fix counter restart during overflow for RV32Atish Patra1-0/+5
2022-08-11RISC-V: Prefer sstc extension if availableAtish Patra1-1/+24
2022-08-11RISC-V: Enable sstc extension parsing from DTAtish Patra3-0/+3
2022-08-11RISC-V: Add SSTC extension CSR detailsAtish Patra1-0/+5
2022-08-11riscv:uprobe fix SR_SPIE set/clear handlingYipeng Zou1-6/+0
2022-08-11dt-bindings: riscv: fix SiFive l2-cache's cache-setsConor Dooley1-1/+5
2022-08-11riscv: ensure cpu_ops_sbi is declaredConor Dooley2-0/+3
2022-08-11RISC-V: cpu_ops_spinwait.c should include head.hBen Dooks1-0/+2
2022-08-11RISC-V: Declare cpu_ops_spinwait in <asm/cpu_ops.h>Ben Dooks2-3/+2
2022-08-11riscv: dts: starfive: correct number of external interruptsMark Kettenis1-1/+1
2022-08-11riscv: dts: sifive unmatched: Add PWM controlled LEDsEmil Renner Berthing1-0/+42