From ad24bde8f1025da014108493b595bed22d989efb Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 20 Jun 2012 15:55:24 -0500 Subject: ARM: OMAP3: Dynamically disable secure timer nodes for secure devices OMAP3 devices may or may not have security features enabled. Security enabled devices are known as high-secure (HS) and devices without security are known as general purpose (GP). For OMAP3 devices there are 12 general purpose timers available. On secure devices the 12th timer is reserved for secure usage and so cannot be used by the kernel, where as for a GP device it is available. We can detect the OMAP device type, secure or GP, at runtime via an on-chip register. Today, when not using DT, we do not register the 12th timer as a linux device if the device is secure. When using device tree, device tree is going to register all the timer devices it finds in the device tree blob. To prevent device tree from registering 12th timer on a secure OMAP3 device we can add a status property to the timer binding with the value "disabled" at boot time. Note that timer 12 on a OMAP3 device has a property "ti,timer-secure" to indicate that it will not be available on a secure device and so for secure OMAP3 devices, we search for timers with this property and then disable them. Using the prom_add_property() function to dynamically add a property was a recommended approach suggested by Rob Herring [1]. I have tested this on an OMAP3 GP device and faking it to pretend to be a secure device to ensure that any timers marked with "ti,timer-secure" are not registered on boot. I have also made sure that all timers are registered as expected on a GP device by default. [1] http://comments.gmane.org/gmane.linux.ports.arm.omap/79203 Signed-off-by: Jon Hunter --- arch/arm/mach-omap2/timer.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 69e46631a7cd..def9a0ebe42d 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -144,6 +144,41 @@ static struct clock_event_device clockevent_gpt = { .set_mode = omap2_gp_timer_set_mode, }; +static struct property device_disabled = { + .name = "status", + .length = sizeof("disabled"), + .value = "disabled", +}; + +static struct of_device_id omap_timer_match[] __initdata = { + { .compatible = "ti,omap2-timer", }, + { } +}; + +/** + * omap_dmtimer_init - initialisation function when device tree is used + * + * For secure OMAP3 devices, timers with device type "timer-secure" cannot + * be used by the kernel as they are reserved. Therefore, to prevent the + * kernel registering these devices remove them dynamically from the device + * tree on boot. + */ +void __init omap_dmtimer_init(void) +{ + struct device_node *np; + + if (!cpu_is_omap34xx()) + return; + + /* If we are a secure device, remove any secure timer nodes */ + if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { + for_each_matching_node(np, omap_timer_match) { + if (of_get_property(np, "ti,timer-secure", NULL)) + prom_add_property(np, &device_disabled); + } + } +} + static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, int gptimer_id, const char *fck_source) @@ -437,6 +472,7 @@ static inline void __init realtime_counter_init(void) clksrc_nr, clksrc_src) \ static void __init omap##name##_timer_init(void) \ { \ + omap_dmtimer_init(); \ omap2_gp_clockevent_init((clkev_nr), clkev_src); \ omap2_clocksource_init((clksrc_nr), clksrc_src); \ } -- cgit v1.2.3 From 373fe0bdf9911c4362942162a2b4d20e6f74da5b Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Thu, 6 Sep 2012 15:28:00 -0500 Subject: ARM: OMAP: Add function to request a timer by capability Currently OMAP timers can be requested by requesting any available or by a numerical device ID. If a specific timer is required because it has a particular capability, such as can interrupt the on-chip DSP in addition to the ARM CPU, then the user needs to know the device ID of the timer with this feature. Therefore, add a new API called omap_dm_timer_request_by_cap() that allows drivers to request a timer by capability. Signed-off-by: Jon Hunter --- arch/arm/plat-omap/dmtimer.c | 52 +++++++++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/dmtimer.h | 1 + 2 files changed, 53 insertions(+) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 938b50a33439..2574b86ad2dc 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -237,6 +237,58 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id) } EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific); +/** + * omap_dm_timer_request_by_cap - Request a timer by capability + * @cap: Bit mask of capabilities to match + * + * Find a timer based upon capabilities bit mask. Callers of this function + * should use the definitions found in the plat/dmtimer.h file under the + * comment "timer capabilities used in hwmod database". Returns pointer to + * timer handle on success and a NULL pointer on failure. + */ +struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap) +{ + struct omap_dm_timer *timer = NULL, *t; + unsigned long flags; + + if (!cap) + return NULL; + + spin_lock_irqsave(&dm_timer_lock, flags); + list_for_each_entry(t, &omap_timer_list, node) { + if ((!t->reserved) && ((t->capability & cap) == cap)) { + /* + * If timer is not NULL, we have already found one timer + * but it was not an exact match because it had more + * capabilites that what was required. Therefore, + * unreserve the last timer found and see if this one + * is a better match. + */ + if (timer) + timer->reserved = 0; + + timer = t; + timer->reserved = 1; + + /* Exit loop early if we find an exact match */ + if (t->capability == cap) + break; + } + } + spin_unlock_irqrestore(&dm_timer_lock, flags); + + if (timer && omap_dm_timer_prepare(timer)) { + timer->reserved = 0; + timer = NULL; + } + + if (!timer) + pr_debug("%s: timer request failed!\n", __func__); + + return timer; +} +EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_cap); + int omap_dm_timer_free(struct omap_dm_timer *timer) { if (unlikely(!timer)) diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 85868e98c11c..348f855d3dab 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -99,6 +99,7 @@ struct dmtimer_platform_data { int omap_dm_timer_reserve_systimer(int id); struct omap_dm_timer *omap_dm_timer_request(void); struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); +struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap); int omap_dm_timer_free(struct omap_dm_timer *timer); void omap_dm_timer_enable(struct omap_dm_timer *timer); void omap_dm_timer_disable(struct omap_dm_timer *timer); -- cgit v1.2.3 From 7dd9d502b6cb9f82c9726ea601276b666a93e95d Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 12 Sep 2012 11:40:58 -0500 Subject: ARM: OMAP3: Add generic machine descriptor for boards with OMAP3 GP devices OMAP3 devices may or may not have security features enabled. Security enabled devices are known as high-secure (HS) and devices without security are known as general purpose (GP). Some OMAP3 boards, such as the OMAP3 beagle board, only use GP devices and for GP devices there is a 12th timer available on-chip that can operate at 32kHz. The clock for 12th timer is generated by an internal oscillator and is unique this timer. Boards such as the beagle board use this timer as a 32kHz based clock-events timer because early versions of the board had a hardware problem preventing them from using other on-chip timers clocked by a external 32kHz clock. When booting with device-tree all OMAP3 devices use timer 1 by default for the clock-events timer. Therefore, add a generic machine descriptor for boards with OMAP3 GP devices so that they can use the 12th timer as the clock-events timer instead of the default. Signed-off-by: Jon Hunter --- arch/arm/mach-omap2/board-generic.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 601ecdfb1cf9..d69018028d96 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -97,6 +97,23 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .dt_compat = omap3_boards_compat, .restart = omap_prcm_restart, MACHINE_END + +static const char *omap3_gp_boards_compat[] __initdata = { + "ti,omap3-beagle", + NULL, +}; + +DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") + .reserve = omap_reserve, + .map_io = omap3_map_io, + .init_early = omap3430_init_early, + .init_irq = omap_intc_of_init, + .handle_irq = omap3_intc_handle_irq, + .init_machine = omap_generic_init, + .timer = &omap3_secure_timer, + .dt_compat = omap3_gp_boards_compat, + .restart = omap_prcm_restart, +MACHINE_END #endif #ifdef CONFIG_SOC_AM33XX -- cgit v1.2.3 From 9725f4451a9ccd159b1d13f63e05896cd9bce07d Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Mon, 14 May 2012 10:41:37 -0500 Subject: ARM: OMAP: Add DT support for timer driver In order to add device-tree support to the timer driver the following changes were made ... 1. Allocate system timers (used for clock-events and clock-source) based upon timer properties rather than using an hard-coded timer instance ID. To allow this a new helper function called omap_dmtimer_find_by_property() has been added for finding a timer with the particular properties in the device-tree blob. Please note that this is an internal helper function for system timers only to find a timer in the device-tree blob. This cannot be used by device drivers, another API has been added for that (see below). Timers that are allocated for system timers are dynamically disabled at boot time by adding a status property with the value "disabled" to the timer's device-tree node. Please note that when allocating system timers we now pass a timer ID and timer property. The timer ID is only be used for allocating a timer when booting without device-tree. Once device-tree migration is complete, all the timer ID references will be removed. 2. System timer resources (memory and interrupts) are directly obtained from the device-tree timer node when booting with device-tree, so that system timers are no longer reliant upon the OMAP HWMOD framework to provide these resources. 3. If DT blob is present, then let device-tree create the timer devices dynamically. 4. When device-tree is present the "id" field in the platform_device structure (pdev->id) is initialised to -1 and hence cannot be used to identify a timer instance. Due to this the following changes were made ... a). The API omap_dm_timer_request_specific() is not supported when using device-tree, because it uses the device ID to request a specific timer. This function will return an error if called when device-tree is present. Users of this API should use omap_dm_timer_request_by_cap() instead. b). When removing the DMTIMER driver, the timer "id" was used to identify the timer instance. The remove function has been modified to use the device name instead of the "id". 5. When device-tree is present the platform_data structure will be NULL and so check for this. 6. The OMAP timer device tree binding has the following optional parameters ... a). ti,timer-alwon --> Timer is in an always-on power domain b). ti,timer-dsp --> Timer can generate an interrupt to the on-chip DSP c). ti,timer-pwm --> Timer can generate a PWM output d). ti,timer-secure --> Timer is reserved on a secure OMAP device Search for the above parameters and set the appropriate timer attribute flags. Signed-off-by: Jon Hunter --- arch/arm/mach-omap2/timer.c | 147 ++++++++++++++++++++++++++++++++----------- arch/arm/plat-omap/dmtimer.c | 41 ++++++++++-- 2 files changed, 146 insertions(+), 42 deletions(-) diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index def9a0ebe42d..92447cd7a41a 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -37,6 +37,8 @@ #include #include #include +#include +#include #include #include @@ -66,11 +68,13 @@ #define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE #define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE #define OMAP3_SECURE_TIMER 12 +#define TIMER_PROP_SECURE "ti,timer-secure" #else #define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE #define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE #define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE #define OMAP3_SECURE_TIMER 1 +#define TIMER_PROP_SECURE "ti,timer-alwon" #endif #define REALTIME_COUNTER_BASE 0x48243200 @@ -155,6 +159,40 @@ static struct of_device_id omap_timer_match[] __initdata = { { } }; +/** + * omap_get_timer_dt - get a timer using device-tree + * @match - device-tree match structure for matching a device type + * @property - optional timer property to match + * + * Helper function to get a timer during early boot using device-tree for use + * as kernel system timer. Optionally, the property argument can be used to + * select a timer with a specific property. Once a timer is found then mark + * the timer node in device-tree as disabled, to prevent the kernel from + * registering this timer as a platform device and so no one else can use it. + */ +static struct device_node * __init omap_get_timer_dt(struct of_device_id *match, + const char *property) +{ + struct device_node *np; + + for_each_matching_node(np, match) { + if (!of_device_is_available(np)) { + of_node_put(np); + continue; + } + + if (property && !of_get_property(np, property, NULL)) { + of_node_put(np); + continue; + } + + prom_add_property(np, &device_disabled); + return np; + } + + return NULL; +} + /** * omap_dmtimer_init - initialisation function when device tree is used * @@ -172,43 +210,74 @@ void __init omap_dmtimer_init(void) /* If we are a secure device, remove any secure timer nodes */ if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { - for_each_matching_node(np, omap_timer_match) { - if (of_get_property(np, "ti,timer-secure", NULL)) - prom_add_property(np, &device_disabled); - } + np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure"); + if (np) + of_node_put(np); } } static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, int gptimer_id, - const char *fck_source) + const char *fck_source, + const char *property) { char name[10]; /* 10 = sizeof("gptXX_Xck0") */ + const char *oh_name; + struct device_node *np; struct omap_hwmod *oh; struct resource irq_rsrc, mem_rsrc; size_t size; int res = 0; int r; - sprintf(name, "timer%d", gptimer_id); - omap_hwmod_setup_one(name); - oh = omap_hwmod_lookup(name); + if (of_have_populated_dt()) { + np = omap_get_timer_dt(omap_timer_match, NULL); + if (!np) + return -ENODEV; + + of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); + if (!oh_name) + return -ENODEV; + + timer->irq = irq_of_parse_and_map(np, 0); + if (!timer->irq) + return -ENXIO; + + timer->io_base = of_iomap(np, 0); + + of_node_put(np); + } else { + if (omap_dm_timer_reserve_systimer(gptimer_id)) + return -ENODEV; + + sprintf(name, "timer%d", gptimer_id); + oh_name = name; + } + + omap_hwmod_setup_one(oh_name); + oh = omap_hwmod_lookup(oh_name); + if (!oh) return -ENODEV; - r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq_rsrc); - if (r) - return -ENXIO; - timer->irq = irq_rsrc.start; - - r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &mem_rsrc); - if (r) - return -ENXIO; - timer->phys_base = mem_rsrc.start; - size = mem_rsrc.end - mem_rsrc.start; + if (!of_have_populated_dt()) { + r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, + &irq_rsrc); + if (r) + return -ENXIO; + timer->irq = irq_rsrc.start; + + r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, + &mem_rsrc); + if (r) + return -ENXIO; + timer->phys_base = mem_rsrc.start; + size = mem_rsrc.end - mem_rsrc.start; + + /* Static mapping, never released */ + timer->io_base = ioremap(timer->phys_base, size); + } - /* Static mapping, never released */ - timer->io_base = ioremap(timer->phys_base, size); if (!timer->io_base) return -ENXIO; @@ -219,9 +288,7 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, omap_hwmod_enable(oh); - if (omap_dm_timer_reserve_systimer(gptimer_id)) - return -ENODEV; - + /* FIXME: Need to remove hard-coded test on timer ID */ if (gptimer_id != 12) { struct clk *src; @@ -231,8 +298,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, } else { res = __omap_dm_timer_set_source(timer->fclk, src); if (IS_ERR_VALUE(res)) - pr_warning("%s: timer%i cannot set source\n", - __func__, gptimer_id); + pr_warn("%s: %s cannot set source\n", + __func__, oh->name); clk_put(src); } } @@ -248,11 +315,12 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, } static void __init omap2_gp_clockevent_init(int gptimer_id, - const char *fck_source) + const char *fck_source, + const char *property) { int res; - res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); + res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property); BUG_ON(res); omap2_gp_timer_irq.dev_id = &clkev; @@ -356,7 +424,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id, { int res; - res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); + res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL); BUG_ON(res); __omap_dm_timer_load_start(&clksrc, @@ -468,12 +536,12 @@ static inline void __init realtime_counter_init(void) {} #endif -#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ +#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \ clksrc_nr, clksrc_src) \ static void __init omap##name##_timer_init(void) \ { \ omap_dmtimer_init(); \ - omap2_gp_clockevent_init((clkev_nr), clkev_src); \ + omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ omap2_clocksource_init((clksrc_nr), clksrc_src); \ } @@ -483,20 +551,23 @@ struct sys_timer omap##name##_timer = { \ }; #ifdef CONFIG_ARCH_OMAP2 -OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) +OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, "ti,timer-alwon", + 2, OMAP2_MPU_SOURCE) OMAP_SYS_TIMER(2) #endif #ifdef CONFIG_ARCH_OMAP3 -OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) +OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, "ti,timer-alwon", + 2, OMAP3_MPU_SOURCE) OMAP_SYS_TIMER(3) OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, - 2, OMAP3_MPU_SOURCE) + TIMER_PROP_SECURE, 2, OMAP3_MPU_SOURCE) OMAP_SYS_TIMER(3_secure) #endif #ifdef CONFIG_SOC_AM33XX -OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE) +OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon", + 2, OMAP4_MPU_SOURCE) OMAP_SYS_TIMER(3_am33xx) #endif @@ -508,7 +579,7 @@ static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, static void __init omap4_timer_init(void) { - omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE, "ti,timer-alwon"); omap2_clocksource_init(2, OMAP4_MPU_SOURCE); #ifdef CONFIG_LOCAL_TIMERS /* Local timers are not supprted on OMAP4430 ES1.0 */ @@ -534,7 +605,7 @@ static void __init omap5_timer_init(void) { int err; - omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE, "ti,timer-alwon"); omap2_clocksource_init(2, OMAP4_MPU_SOURCE); realtime_counter_init(); @@ -619,6 +690,10 @@ static int __init omap2_dm_timer_init(void) { int ret; + /* If dtb is there, the devices will be created dynamically */ + if (of_have_populated_dt()) + return -ENODEV; + ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); if (unlikely(ret)) { pr_err("%s: device registration failed.\n", __func__); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 2574b86ad2dc..b09e55632f4b 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -40,6 +40,8 @@ #include #include #include +#include +#include #include #include @@ -212,6 +214,13 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id) unsigned long flags; int ret = 0; + /* Requesting timer by ID is not supported when device tree is used */ + if (of_have_populated_dt()) { + pr_warn("%s: Please use omap_dm_timer_request_by_cap()\n", + __func__); + return NULL; + } + spin_lock_irqsave(&dm_timer_lock, flags); list_for_each_entry(t, &omap_timer_list, node) { if (t->pdev->id == id && !t->reserved) { @@ -466,7 +475,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) * use the clock framework to set the parent clock. To be removed * once OMAP1 migrated to using clock framework for dmtimers */ - if (pdata->set_timer_src) + if (pdata && pdata->set_timer_src) return pdata->set_timer_src(timer->pdev, source); fclk = clk_get(&timer->pdev->dev, "fck"); @@ -747,7 +756,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct dmtimer_platform_data *pdata = pdev->dev.platform_data; - if (!pdata) { + if (!pdata && !dev->of_node) { dev_err(dev, "%s: no platform data.\n", __func__); return -ENODEV; } @@ -776,11 +785,23 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) return -ENOMEM; } - timer->id = pdev->id; + if (dev->of_node) { + if (of_find_property(dev->of_node, "ti,timer-alwon", NULL)) + timer->capability |= OMAP_TIMER_ALWON; + if (of_find_property(dev->of_node, "ti,timer-dsp", NULL)) + timer->capability |= OMAP_TIMER_HAS_DSP_IRQ; + if (of_find_property(dev->of_node, "ti,timer-pwm", NULL)) + timer->capability |= OMAP_TIMER_HAS_PWM; + if (of_find_property(dev->of_node, "ti,timer-secure", NULL)) + timer->capability |= OMAP_TIMER_SECURE; + } else { + timer->id = pdev->id; + timer->capability = pdata->timer_capability; + timer->reserved = omap_dm_timer_reserved_systimer(timer->id); + } + timer->irq = irq->start; - timer->reserved = omap_dm_timer_reserved_systimer(timer->id); timer->pdev = pdev; - timer->capability = pdata->timer_capability; /* Skip pm_runtime_enable for OMAP1 */ if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { @@ -820,7 +841,8 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev) spin_lock_irqsave(&dm_timer_lock, flags); list_for_each_entry(timer, &omap_timer_list, node) - if (timer->pdev->id == pdev->id) { + if (!strcmp(dev_name(&timer->pdev->dev), + dev_name(&pdev->dev))) { list_del(&timer->node); ret = 0; break; @@ -830,11 +852,18 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev) return ret; } +static const struct of_device_id omap_timer_match[] = { + { .compatible = "ti,omap2-timer", }, + {}, +}; +MODULE_DEVICE_TABLE(of, omap_timer_match); + static struct platform_driver omap_dm_timer_driver = { .probe = omap_dm_timer_probe, .remove = __devexit_p(omap_dm_timer_remove), .driver = { .name = "omap_timer", + .of_match_table = of_match_ptr(omap_timer_match), }, }; -- cgit v1.2.3 From 9883f7c8dd21acb90697582ca331f3f8a66ac054 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Oct 2012 14:12:26 -0500 Subject: ARM: OMAP2+: Add device-tree support for 32kHz counter For OMAP devices, the 32kHz counter is the default clock-source for the kernel. However, this is not the only possible clock-source the kernel can use for OMAP devices. When booting with device-tree, if the 32kHz counter is the desired clock-source for the kernel, then parse the device-tree blob to ensure that the counter is present and if so map memory for the counter using the device-tree of_iomap() function so we are no longer reliant on the OMAP HWMOD framework to do this for us. Signed-off-by: Jon Hunter --- arch/arm/mach-omap2/timer.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 92447cd7a41a..0758bae3a57a 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -159,6 +159,11 @@ static struct of_device_id omap_timer_match[] __initdata = { { } }; +static struct of_device_id omap_counter_match[] __initdata = { + { .compatible = "ti,omap-counter32k", }, + { } +}; + /** * omap_get_timer_dt - get a timer using device-tree * @match - device-tree match structure for matching a device type @@ -377,10 +382,25 @@ static u32 notrace dmtimer_read_sched_clock(void) static int __init omap2_sync32k_clocksource_init(void) { int ret; + struct device_node *np = NULL; struct omap_hwmod *oh; void __iomem *vbase; const char *oh_name = "counter_32k"; + /* + * If device-tree is present, then search the DT blob + * to see if the 32kHz counter is supported. + */ + if (of_have_populated_dt()) { + np = omap_get_timer_dt(omap_counter_match, NULL); + if (!np) + return -ENODEV; + + of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); + if (!oh_name) + return -ENODEV; + } + /* * First check hwmod data is available for sync32k counter */ @@ -390,7 +410,13 @@ static int __init omap2_sync32k_clocksource_init(void) omap_hwmod_setup_one(oh_name); - vbase = omap_hwmod_get_mpu_rt_va(oh); + if (np) { + vbase = of_iomap(np, 0); + of_node_put(np); + } else { + vbase = omap_hwmod_get_mpu_rt_va(oh); + } + if (!vbase) { pr_warn("%s: failed to get counter_32k resource\n", __func__); return -ENXIO; -- cgit v1.2.3